周琰杰 (Zhou Yanjie)
unread,Dec 24, 2020, 3:38:39 AM12/24/20Sign in to reply to author
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to h...@goldelico.com, mips-creat...@googlegroups.com, pa...@boddie.org.uk, riccardo...@libero.it
According to the description of the document MD00086, the eretnc
instruction is only supported in processors after version 5.04, if
it is turned on by default in all MIPS r5 processors, it will cause
MIPS r5 processors prior to version 5.04 (such as Ingenic XBurst®2)
to work abnormally.
Signed-off-by: 周琰杰 (Zhou Yanjie) <
zhouy...@wanyeetech.com>
---
arch/mips/include/asm/stackframe.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index aa430a6c..deb613d 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -424,7 +424,7 @@
.macro RESTORE_SP_AND_RET docfi=0
RESTORE_SP \docfi
-#if defined(CONFIG_CPU_MIPSR5) || defined(CONFIG_CPU_MIPSR6)
+#ifdef CONFIG_CPU_MIPSR6
eretnc
#else
.set push
--
2.7.4