A guest event in Hacker Dojo with colleagues from the UK: Verilator and UVM
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Yuri Panchul
Mar 1, 2026, 10:45:40 PMMar 1
to SystemVerilog Meetups in Silicon Valley
Chips @ Dojo: Open Source Design Verification - brought to you by AsFigo & Yuri Panchul
Thu 5 Mar 2026 4:00 PM - 6:00 PM
Hacker Dojo 855 Maude Ave · Mountain View, CA, 94043
Cracking the UVM-Verilator Code: 50+ IPs, AI Guardrails, and the Open-Source North Star
The industry says UVM and Verilator don’t mix. We’re here to show you how we broke that rule. Join AsFigo at Hacker Dojo to see how we built a license-free, production-ready verification stack that scales.
What we’re covering:
* The UVM Breakthrough: How we ported 50+ production UVCs and codified 35+ non-obvious failure modes into AI guardrails.
* The Python Alternative: Andrew Bond (Axelera AI) dives into AVL, showing how Python-based verification is ready for production.
* The Cloud-Native Compile: A look at AWS Economics—the real-world price-to-performance mapping for scaling Verilator in the cloud.
* The SV Core: Yuri Panchul breaks down advanced SystemVerilog techniques and the bridge to open-source synthesis with Yosys.
Whether you are looking to slash licensing costs or build a deterministic AI-driven verification flow, come see the roadmap for the next generation of EDA.
Registration: https://www.tickettailor.com/events/asfigo/2091884
Read more at: blog.asfigo.com/2026/02/cracking-uvm-verilator-code-50-ips-ai.html
Hacker Dojo 855 Maude Ave · Mountain View, CA, 94043
Cracking the UVM-Verilator Code: 50+ IPs, AI Guardrails, and the Open-Source North Star
The industry says UVM and Verilator don’t mix. We’re here to show you how we broke that rule. Join AsFigo at Hacker Dojo to see how we built a license-free, production-ready verification stack that scales.
What we’re covering:
* The UVM Breakthrough: How we ported 50+ production UVCs and codified 35+ non-obvious failure modes into AI guardrails.
* The Python Alternative: Andrew Bond (Axelera AI) dives into AVL, showing how Python-based verification is ready for production.
* The Cloud-Native Compile: A look at AWS Economics—the real-world price-to-performance mapping for scaling Verilator in the cloud.
* The SV Core: Yuri Panchul breaks down advanced SystemVerilog techniques and the bridge to open-source synthesis with Yosys.
Whether you are looking to slash licensing costs or build a deterministic AI-driven verification flow, come see the roadmap for the next generation of EDA.
Registration: https://www.tickettailor.com/events/asfigo/2091884
Read more at: blog.asfigo.com/2026/02/cracking-uvm-verilator-code-50-ips-ai.html
More on Verilog Meetup, the host of the event: https://verilog-meetup.com
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