Moving your design from FPGA to ASIC using Verilog Meetup variant of the Tiny Tapeout template

[Yuri Panchul]

Please try the Verilog Meetup variation of the Tiny Tapeout template before the seminar - no installation is needed to do this, this is a web-only activity unless you want to modify the repo on your computer:

https://verilog-meetup.com/2025/10/20/from-fpga-to-asic-using-template/

Thank you,

Yuri Panchul