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SystemVerilog Meetups in Silicon Valley

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Jun 2

DDR4 Implementation and Verification RTL Assistance

Hello all, I am working on my Master's degree at Cal Poly, and my thesis involves the

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DDR4 Implementation and Verification RTL Assistance

Hello all, I am working on my Master's degree at Cal Poly, and my thesis involves the

Jun 2

Yuri Panchul, … Kevin Cameron8

May 28

Samsung is Hiring! 32 positions in California and Texas at the intersection of computer graphics and digital chip design

I'll try to get that one done today Later.... Kev. On Thu, May 28, 2026 at 11:37 AM Yuri Panchul

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Samsung is Hiring! 32 positions in California and Texas at the intersection of computer graphics and digital chip design

I'll try to get that one done today Later.... Kev. On Thu, May 28, 2026 at 11:37 AM Yuri Panchul

May 28

May 14

Plan for the Summer

Plan for the Summer for the Verilog Meetup and the related open source projects Yuri Panchul, 2025-05

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Plan for the Summer

Plan for the Summer for the Verilog Meetup and the related open source projects Yuri Panchul, 2025-05

May 14

May 5

IEEE Event: The Intelligence of the Machine. The Rigor of the Road!

Hi all, Wanted to share an upcoming IEEE technical forum focused on AI, automotive software, firmware

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IEEE Event: The Intelligence of the Machine. The Rigor of the Road!

Hi all, Wanted to share an upcoming IEEE technical forum focused on AI, automotive software, firmware

May 5

Apr 20

A prestigious ADA University in Azerbaijan is hiring faculty for rapid expansion

I got a letter from Professor Abzatdin Adamov, the Dean of the School of IT & Engineering (SITE)

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A prestigious ADA University in Azerbaijan is hiring faculty for rapid expansion

I got a letter from Professor Abzatdin Adamov, the Dean of the School of IT & Engineering (SITE)

Apr 20

Apr 19

Recording of Chips@Dojo meetup back on March 5

We uploaded the recording of Chips@Dojo meetup, a guest event at Hacker Dojo with Srinivasan

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Recording of Chips@Dojo meetup back on March 5

We uploaded the recording of Chips@Dojo meetup, a guest event at Hacker Dojo with Srinivasan

Apr 19

Apr 4

Verilog Meetup: the current and proposed projects as of 2025-12-25

The current high-priority items: 1. Gowin-based Brisbane Silicon board support package for basics-

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Verilog Meetup: the current and proposed projects as of 2025-12-25

The current high-priority items: 1. Gowin-based Brisbane Silicon board support package for basics-

Apr 4

Mar 22

Trying to account for all FPGA boards

Folks, I gave to somebody this board (Terasic DE23-Lite with Altera ) and cannot find it. I am trying

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Trying to account for all FPGA boards

Folks, I gave to somebody this board (Terasic DE23-Lite with Altera ) and cannot find it. I am trying

Mar 22

Mar 16

SNUG Silicon Valley published my article about the students and AI tools

SNUG Silicon Valley 2026, an influential conference on tools for chip design, published my paper that

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SNUG Silicon Valley published my article about the students and AI tools

SNUG Silicon Valley 2026, an influential conference on tools for chip design, published my paper that

Mar 16

Mar 1

A guest event in Hacker Dojo with colleagues from the UK: Verilator and UVM

Chips @ Dojo: Open Source Design Verification - brought to you by AsFigo & Yuri Panchul Thu 5 Mar

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A guest event in Hacker Dojo with colleagues from the UK: Verilator and UVM

Chips @ Dojo: Open Source Design Verification - brought to you by AsFigo & Yuri Panchul Thu 5 Mar

Mar 1

andrew, … Yuri Panchul3

Feb 22

Follow-up: Seeking Alpha-testers for HDL Forever

If you want to test SystemVerilog translation for simulation, you can get an example from one of our

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Follow-up: Seeking Alpha-testers for HDL Forever

If you want to test SystemVerilog translation for simulation, you can get an example from one of our

Feb 22

Yuri Panchul, Allen Baker2

Feb 22

The current schedule

Hi Yuri, yes, I'm interested to learn what I can do to help with the book. I apologize for being

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The current schedule

Hi Yuri, yes, I'm interested to learn what I can do to help with the book. I apologize for being

Feb 22

Jan 20

A new challenge for the startups working on AI-generated UVM testbenches

https://verilog-meetup.com/2026/01/20/ai-for-uvm/ One of the startups working in the AI for Verilog

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A new challenge for the startups working on AI-generated UVM testbenches

https://verilog-meetup.com/2026/01/20/ai-for-uvm/ One of the startups working in the AI for Verilog

Jan 20

Jan 13

The focus of the next three meetups is RISC-V examples for the textbook and the training in India

We are going to try a new format of Verilog Meetup starting this Sunday. During the last two years

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The focus of the next three meetups is RISC-V examples for the textbook and the training in India

We are going to try a new format of Verilog Meetup starting this Sunday. During the last two years

Jan 13

Jan 4

An article by Jason Yang about interfacing FPGA with ambient light sensor using SPI protocol

Huaxuan (Jason) Yang from UC Santa Cruz put an article to our website Verilog Meetup. Such articles

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An article by Jason Yang about interfacing FPGA with ambient light sensor using SPI protocol

Huaxuan (Jason) Yang from UC Santa Cruz put an article to our website Verilog Meetup. Such articles

Jan 4

12/25/25

Reviewing the output of an AI EDA tool that generates SVA

Review video: https://youtu.be/0z13arpzrT4 Abhishek Varma, MS in VLSI & Microelectronics, from

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Reviewing the output of an AI EDA tool that generates SVA

Review video: https://youtu.be/0z13arpzrT4 Abhishek Varma, MS in VLSI & Microelectronics, from

12/25/25

Jannifer Grace, Glenn Kirilow4

12/24/25

Jannifer* OK enough theatre for today. As we were... Ciao On Thu, Dec 25, 2025, 2:54 PM Glenn Kirilow

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Jannifer* OK enough theatre for today. As we were... Ciao On Thu, Dec 25, 2025, 2:54 PM Glenn Kirilow

12/24/25

12/4/25

Alpha-testing a new GUI for SystemVerilog + FPGA development created by Andrew DeKelaita

Colleagues: During the next Verilog Meetup on Sunday December 7 we are going to alpha-test a new tool

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Alpha-testing a new GUI for SystemVerilog + FPGA development created by Andrew DeKelaita

Colleagues: During the next Verilog Meetup on Sunday December 7 we are going to alpha-test a new tool

12/4/25

11/9/25

An update on soldering recommendations, with a video

Some FPGA boards we use for our Verilog Meetup are sold with unsoldered headers. I created an updated

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An update on soldering recommendations, with a video

Some FPGA boards we use for our Verilog Meetup are sold with unsoldered headers. I created an updated

11/9/25

11/5/25

The Verilog Meetup on November 9: two objectives

We usually just discuss the ongoing projects or introduce new people to RTL methodology during the

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The Verilog Meetup on November 9: two objectives

We usually just discuss the ongoing projects or introduce new people to RTL methodology during the

11/5/25

Yuri Panchul, Stanley To2

10/30/25

Verilog Meetup at Cal Poly report

Thanks everyone who attended and contributed! Yuri, thanks for bringing the Gowin hardware for us to

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Verilog Meetup at Cal Poly report

Thanks everyone who attended and contributed! Yuri, thanks for bringing the Gowin hardware for us to

10/30/25

10/20/25

Moving your design from FPGA to ASIC using Verilog Meetup variant of the Tiny Tapeout template

Please try the Verilog Meetup variation of the Tiny Tapeout template before the seminar - no

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Moving your design from FPGA to ASIC using Verilog Meetup variant of the Tiny Tapeout template

Please try the Verilog Meetup variation of the Tiny Tapeout template before the seminar - no

10/20/25

9/13/25

Maker Faire @ San Francisco Bay Area is coming! Who is volunteering to work in the booth? I can request extra exhibitor badges

Maker Faire @ San Francisco Bay Area is coming! Who is volunteering to work in the booth? I can

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Maker Faire @ San Francisco Bay Area is coming! Who is volunteering to work in the booth? I can request extra exhibitor badges

Maker Faire @ San Francisco Bay Area is coming! Who is volunteering to work in the booth? I can

9/13/25

8/31/25

Verilog Meetup updates

I put the current activities in the post: https://verilog-meetup.com/2025/08/28/status-2025-08-28/

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Verilog Meetup updates

I put the current activities in the post: https://verilog-meetup.com/2025/08/28/status-2025-08-28/

8/31/25

Yuri Panchul, … Eugene Wang3

8/24/25

Verilog Meetup project status as of 2025-08-23

tfran...@yahoo.com Get Outlook for Android From: mee...@googlegroups.com <meetsv@googlegroups.

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Verilog Meetup project status as of 2025-08-23

tfran...@yahoo.com Get Outlook for Android From: mee...@googlegroups.com <meetsv@googlegroups.

8/24/25

8/19/25

Samsung expands GPU team: open RTL Designer and Performance Architect positions

The team at Samsung that designs the Xclipse GPU in Galaxy phones with Exynos SoC – is doing

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Samsung expands GPU team: open RTL Designer and Performance Architect positions

The team at Samsung that designs the Xclipse GPU in Galaxy phones with Exynos SoC – is doing

8/19/25

8/14/25

A new SystemVerilog Microarchitecture Challenge for AI No.2. Adding the Flow Control.

I found that the SystemVerilog Microarchitecture Challenge for AI No.1 became obsolete as the new

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A new SystemVerilog Microarchitecture Challenge for AI No.2. Adding the Flow Control.

I found that the SystemVerilog Microarchitecture Challenge for AI No.1 became obsolete as the new

8/14/25

8/6/25

Separating the wheat from the chaff in AI-driven EDA startups

Not all AI entrepreneurs are the same. There are good guys who make prototypes of something useful,

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Separating the wheat from the chaff in AI-driven EDA startups

Not all AI entrepreneurs are the same. There are good guys who make prototypes of something useful,

8/6/25

yu...@panchul.com

8/5/25

Re: AXI UVM test bench

Shiva: I created a new repository where I put my old non-UVM Verification IP example https://github.

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Re: AXI UVM test bench

Shiva: I created a new repository where I put my old non-UVM Verification IP example https://github.

8/5/25

7/26/25

Photos from the OpenSauce event, and looking forward to the Maker Faire

OpenSauce is an atypical event, a sort of school science fair for the (mostly) adult participants. We

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Photos from the OpenSauce event, and looking forward to the Maker Faire

OpenSauce is an atypical event, a sort of school science fair for the (mostly) adult participants. We

7/26/25

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