Name of the Company : Indus Teqsite (Data Patterns)
Date of the Program : 25th March, 2015 (Wednesday)
Venue : Dr. V. Vasudevan Seminar Hall, TIFAC-CORE building
Reporting Time : 8.45 a.m.
Eligible Branches : Final year students of B. Tech. (CSE/ECE/EEE/ EIE) & MCA
Salary : CTC Rs.1,80,000/- annum
Hardware Design Engineer Trainee:
Qualification: B. Tech. (ECE/EEE/E&I) with 65% (7.25 CGPA) and above
B. Tech (no standing arrears) and 65% in 10th and 12th std.
Skill sets: Knowledge in basics of electronics, basics of digital electronics, LIC, Circuit theory,
Microprocessor and Microcontroller concepts
Written Test: Basics of Analog & Digital Electronics + Aptitude (90 minutes)
Software Engineer Trainee
Qualification: B. Tech. (CSE/ECE/EEE/E&I), MCA with 65% (7.25 CGPA) and above
B. Tech. (no standing arrears) and 65% in 10th and 12th std.
Skill Sets: C language, C++ concepts, Data Structures, OS concepts, Microprocessor and
Microcontroller concepts
Written Test: C language + Aptitude (90 minutes)
Selection Process:
General instructions to the participants:
· Eligible students should maintain formal dress code (wear Shoes & Tie)
· Eligible students should bring the following for the program:
o Student ID Card
o Copy of updated resume with pasted photo
o Mark statements-10th standard onwards (Semester wise original & Xerox copies)
o Passport size & Stamp size photos