Stuctures shared among cores

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igu...@cse.yeditepe.edu.tr

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Jun 7, 2015, 5:38:36 PM6/7/15
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Hi,

I want to isolate the impact of L3 ways assigned to a core on performance. I ran two tests:

  1. A single core run where the associativity of L3 cache is 4.
  2. A 4-core run where the associativity of L3 cache is 16. I also added a little piece of code which guarantees that the first core will use only the first 4-ways of L3 cache, and other cores won't be able to access this area. The benchmark which runs on the first core is the same one used in the single core run.

My initial expectation was to achieve the exact same performance level for the specific benchmark in these two runs. However, performance significantly drops for the benchmark in the second run, which means L3 cache is not the only structure shared among cores. Our first guess is that it is the main memory. Are there any other structures that could cause the performance difference described above; and is there an easy way to remove this difference? I am also attaching the params.in file I am using.


Thanks for any help in advance.


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params.in

Hyesoon Kim

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Jun 9, 2015, 12:35:14 PM6/9/15
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Hi, 
When you run 4 cores, all cores are sharing the memory system especially DRAM, so there should be performance degradations. 
If you do not want to observe memory sharing effects,  you can just modify memory.cc and have a fixed memory latency, so that there are no shared resource effects. 
Unfortunately a fixed memory latency model is not provided but it should be very easy to modify 
by returning a fixed latency from “when new_mem_req” function is called. 

Hyesoon 


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