Re: sparc64/144900: commit references a PR
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From: dfi...@FreeBSD.ORG (dfilter service)
To: bug-fo...@FreeBSD.org
Cc:
Subject: Re: sparc64/144900: commit references a PR
Date: Sat, 20 Mar 2010 21:16:10 +0000 (UTC)
Author: marius
Date: Sat Mar 20 21:15:56 2010
New Revision: 205394
URL: http://svn.freebsd.org/changeset/base/205394
Log:
Ensure that __fpu_ftox() both returns the high bits and res[1] contains
the low bits also in the default case.
PR: 144900
Obtained from: OpenBSD
MFC after: 3 days
Modified:
head/lib/libc/sparc64/fpu/fpu_implode.c
Modified: head/lib/libc/sparc64/fpu/fpu_implode.c
==============================================================================
--- head/lib/libc/sparc64/fpu/fpu_implode.c Sat Mar 20 21:04:47 2010 (r205393)
+++ head/lib/libc/sparc64/fpu/fpu_implode.c Sat Mar 20 21:15:56 2010 (r205394)
@@ -248,8 +248,8 @@ __fpu_ftox(fe, fp, res)
sign = fp->fp_sign;
switch (fp->fp_class) {
case FPC_ZERO:
- res[1] = 0;
- return (0);
+ i = 0;
+ goto done;
case FPC_NUM:
/*
@@ -273,15 +273,17 @@ __fpu_ftox(fe, fp, res)
break;
if (sign)
i = -i;
- res[1] = (int)i;
- return (i >> 32);
+ goto done;
default: /* Inf, qNaN, sNaN */
break;
}
/* overflow: replace any inexact exception with invalid */
fe->fe_cx = (fe->fe_cx & ~FSR_NX) | FSR_NV;
- return (0x7fffffffffffffffLL + sign);
+ i = 0x7fffffffffffffffLL + sign;
+done:
+ res[1] = i & 0xffffffff;
+ return (i >> 32);
}
/*
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dfilter service
From: dfi...@FreeBSD.ORG (dfilter service)
To: bug-fo...@FreeBSD.org
Cc:
Subject: Re: sparc64/144900: commit references a PR
Date: Sat, 20 Mar 2010 21:28:00 +0000 (UTC)
Author: marius
Date: Sat Mar 20 21:27:44 2010
New Revision: 205395
URL: http://svn.freebsd.org/changeset/base/205395
Log:
FPU_DEBUG requires <stdio.h>.
PR: 144900
Submitted by: Peter Jeremy
MFC after: 3 days
Modified:
head/lib/libc/sparc64/fpu/fpu.c
head/lib/libc/sparc64/fpu/fpu_explode.c
head/lib/libc/sparc64/fpu/fpu_implode.c
Modified: head/lib/libc/sparc64/fpu/fpu.c
==============================================================================
--- head/lib/libc/sparc64/fpu/fpu.c Sat Mar 20 21:15:56 2010 (r205394)
+++ head/lib/libc/sparc64/fpu/fpu.c Sat Mar 20 21:27:44 2010 (r205395)
@@ -69,9 +69,12 @@ __FBSDID("$FreeBSD$");
#include "namespace.h"
#include <errno.h>
-#include <unistd.h>
#include <signal.h>
+#ifdef FPU_DEBUG
+#include <stdio.h>
+#endif
#include <stdlib.h>
+#include <unistd.h>
#include "un-namespace.h"
#include "libc_private.h"
Modified: head/lib/libc/sparc64/fpu/fpu_explode.c
==============================================================================
--- head/lib/libc/sparc64/fpu/fpu_explode.c Sat Mar 20 21:15:56 2010 (r205394)
+++ head/lib/libc/sparc64/fpu/fpu_explode.c Sat Mar 20 21:27:44 2010 (r205395)
@@ -49,6 +49,10 @@ __FBSDID("$FreeBSD$");
#include <sys/param.h>
+#ifdef FPU_DEBUG
+#include <stdio.h>
+#endif
+
#include <machine/frame.h>
#include <machine/fp.h>
#include <machine/fsr.h>
Modified: head/lib/libc/sparc64/fpu/fpu_implode.c
==============================================================================
--- head/lib/libc/sparc64/fpu/fpu_implode.c Sat Mar 20 21:15:56 2010 (r205394)
+++ head/lib/libc/sparc64/fpu/fpu_implode.c Sat Mar 20 21:27:44 2010 (r205395)
@@ -49,6 +49,10 @@ __FBSDID("$FreeBSD$");
#include <sys/param.h>
+#ifdef FPU_DEBUG
+#include <stdio.h>
+#endif
+
#include <machine/frame.h>
#include <machine/fp.h>
#include <machine/fsr.h>
dfilter service
From: dfi...@FreeBSD.ORG (dfilter service)
To: bug-fo...@FreeBSD.org
Cc:
Subject: Re: sparc64/144900: commit references a PR
Date: Sat, 20 Mar 2010 22:12:24 +0000 (UTC)
Author: marius
Date: Sat Mar 20 22:12:15 2010
New Revision: 205396
URL: http://svn.freebsd.org/changeset/base/205396
Log:
Division should take both arguments' signs into account when the
the dividend is infinity or zero and the divisor is not the same.
PR: 144900
Submitted by: Peter Jeremy
MFC after: 3 days
Modified:
head/lib/libc/sparc64/fpu/fpu_div.c
Modified: head/lib/libc/sparc64/fpu/fpu_div.c
==============================================================================
--- head/lib/libc/sparc64/fpu/fpu_div.c Sat Mar 20 21:27:44 2010 (r205395)
+++ head/lib/libc/sparc64/fpu/fpu_div.c Sat Mar 20 22:12:15 2010 (r205396)
@@ -167,14 +167,16 @@ __fpu_div(fe)
* return it. Otherwise we have the following cases:
*
* Inf / Inf = NaN, plus NV exception
- * Inf / num = Inf [i.e., return x]
- * Inf / 0 = Inf [i.e., return x]
- * 0 / Inf = 0 [i.e., return x]
- * 0 / num = 0 [i.e., return x]
+ * Inf / num = Inf [i.e., return x #]
+ * Inf / 0 = Inf [i.e., return x #]
+ * 0 / Inf = 0 [i.e., return x #]
+ * 0 / num = 0 [i.e., return x #]
* 0 / 0 = NaN, plus NV exception
- * num / Inf = 0
+ * num / Inf = 0 #
* num / num = num (do the divide)
- * num / 0 = Inf, plus DZ exception
+ * num / 0 = Inf #, plus DZ exception
+ *
+ * # Sign of result is XOR of operand signs.
*/
if (ISNAN(x) || ISNAN(y)) {
ORDER(x, y);
@@ -183,10 +185,10 @@ __fpu_div(fe)
if (ISINF(x) || ISZERO(x)) {
if (x->fp_class == y->fp_class)
return (__fpu_newnan(fe));
+ x->fp_sign ^= y->fp_sign;
return (x);
}
- /* all results at this point use XOR of operand signs */
x->fp_sign ^= y->fp_sign;
if (ISINF(y)) {
x->fp_class = FPC_ZERO;
dfilter service
From: dfi...@FreeBSD.ORG (dfilter service)
To: bug-fo...@FreeBSD.org
Cc:
Subject: Re: sparc64/144900: commit references a PR
Date: Sat, 20 Mar 2010 22:32:28 +0000 (UTC)
Author: marius
Date: Sat Mar 20 22:32:13 2010
New Revision: 205397
URL: http://svn.freebsd.org/changeset/base/205397
Log:
- While SPARC V9 allows tininess to be detected either before or after
rounding (impl. dep. #55), the SPARC JPS1 responsible for SPARC64 and
UltraSPARC processors defines that in all cases tinyness is detected
before rounding, therefore rounding up to the smallest normalised
number should set the underflow flag.
- If an infinite result is rounded down, the result should have an
exponent 1 less than the value for infinity.
PR: 144900
Submitted by: Peter Jeremy
MFC after: 3 days
Modified:
head/lib/libc/sparc64/fpu/fpu_implode.c
Modified: head/lib/libc/sparc64/fpu/fpu_implode.c
==============================================================================
--- head/lib/libc/sparc64/fpu/fpu_implode.c Sat Mar 20 22:12:15 2010 (r205396)
+++ head/lib/libc/sparc64/fpu/fpu_implode.c Sat Mar 20 22:32:13 2010 (r205397)
@@ -329,8 +329,9 @@ __fpu_ftos(fe, fp)
* right to introduce leading zeroes. Rounding then acts
* differently for normals and subnormals: the largest subnormal
* may round to the smallest normal (1.0 x 2^minexp), or may
- * remain subnormal. In the latter case, signal an underflow
- * if the result was inexact or if underflow traps are enabled.
+ * remain subnormal. A number that is subnormal before rounding
+ * will signal an underflow if the result is inexact or if underflow
+ * traps are enabled.
*
* Rounding a normal, on the other hand, always produces another
* normal (although either way the result might be too big for
@@ -345,8 +346,10 @@ __fpu_ftos(fe, fp)
if ((exp = fp->fp_exp + SNG_EXP_BIAS) <= 0) { /* subnormal */
/* -NG for g,r; -SNG_FRACBITS-exp for fraction */
(void) __fpu_shr(fp, FP_NMANT - FP_NG - SNG_FRACBITS - exp);
- if (fpround(fe, fp) && fp->fp_mant[3] == SNG_EXP(1))
+ if (fpround(fe, fp) && fp->fp_mant[3] == SNG_EXP(1)) {
+ fe->fe_cx |= FSR_UF;
return (sign | SNG_EXP(1) | 0);
+ }
if ((fe->fe_cx & FSR_NX) ||
(fe->fe_fsr & (FSR_UF << FSR_TEM_SHIFT)))
fe->fe_cx |= FSR_UF;
@@ -407,6 +410,7 @@ zero: res[1] = 0;
if ((exp = fp->fp_exp + DBL_EXP_BIAS) <= 0) {
(void) __fpu_shr(fp, FP_NMANT - FP_NG - DBL_FRACBITS - exp);
if (fpround(fe, fp) && fp->fp_mant[2] == DBL_EXP(1)) {
+ fe->fe_cx |= FSR_UF;
res[1] = 0;
return (sign | DBL_EXP(1) | 0);
}
@@ -426,7 +430,7 @@ zero: res[1] = 0;
return (sign | DBL_EXP(DBL_EXP_INFNAN) | 0);
}
res[1] = ~0;
- return (sign | DBL_EXP(DBL_EXP_INFNAN) | DBL_MASK);
+ return (sign | DBL_EXP(DBL_EXP_INFNAN - 1) | DBL_MASK);
}
done:
res[1] = fp->fp_mant[3];
@@ -468,6 +472,7 @@ zero: res[1] = res[2] = res[3] = 0;
if ((exp = fp->fp_exp + EXT_EXP_BIAS) <= 0) {
(void) __fpu_shr(fp, FP_NMANT - FP_NG - EXT_FRACBITS - exp);
if (fpround(fe, fp) && fp->fp_mant[0] == EXT_EXP(1)) {
+ fe->fe_cx |= FSR_UF;
res[1] = res[2] = res[3] = 0;
return (sign | EXT_EXP(1) | 0);
}
@@ -487,7 +492,7 @@ zero: res[1] = res[2] = res[3] = 0;
return (sign | EXT_EXP(EXT_EXP_INFNAN) | 0);
}
res[1] = res[2] = res[3] = ~0;
- return (sign | EXT_EXP(EXT_EXP_INFNAN) | EXT_MASK);
+ return (sign | EXT_EXP(EXT_EXP_INFNAN - 1) | EXT_MASK);
}
done:
res[1] = fp->fp_mant[1];
dfilter service
From: dfi...@FreeBSD.ORG (dfilter service)
To: bug-fo...@FreeBSD.org
Cc:
Subject: Re: sparc64/144900: commit references a PR
Date: Sun, 21 Mar 2010 13:21:05 +0000 (UTC)
Author: marius
Date: Sun Mar 21 13:18:08 2010
New Revision: 205410
URL: http://svn.freebsd.org/changeset/base/205410
Log:
Avoid aliasing which leads to incorrect results when compiling with the
default strict aliasing rules.
PR: 144900
Submitted by: Peter Jeremy
MFC after: 3 days
Modified:
head/lib/libc/sparc64/fpu/fpu_explode.c
Modified: head/lib/libc/sparc64/fpu/fpu_explode.c
==============================================================================
--- head/lib/libc/sparc64/fpu/fpu_explode.c Sun Mar 21 13:09:54 2010 (r205409)
+++ head/lib/libc/sparc64/fpu/fpu_explode.c Sun Mar 21 13:18:08 2010 (r205410)
@@ -139,9 +139,9 @@ __fpu_xtof(fp, i)
* a signed or unsigned entity.
*/
if (fp->fp_sign && (int64_t)i < 0)
- *((int64_t*)fp->fp_mant) = -i;
+ *((int64_t *)fp->fp_mant) = -i;
else
- *((int64_t*)fp->fp_mant) = i;
+ *((int64_t *)fp->fp_mant) = i;
fp->fp_mant[2] = 0;
fp->fp_mant[3] = 0;
__fpu_norm(fp);
@@ -262,14 +262,12 @@ __fpu_explode(fe, fp, type, reg)
struct fpn *fp;
int type, reg;
{
- u_int32_t s, *sp;
- u_int64_t l[2];
- void *vl = l;
+ u_int64_t l0, l1;
+ u_int32_t s;
if (type == FTYPE_LNG || type == FTYPE_DBL || type == FTYPE_EXT) {
- l[0] = __fpu_getreg64(reg & ~1);
- sp = vl;
- fp->fp_sign = sp[0] >> 31;
+ l0 = __fpu_getreg64(reg & ~1);
+ fp->fp_sign = l0 >> 63;
} else {
s = __fpu_getreg(reg);
fp->fp_sign = s >> 31;
@@ -277,7 +275,7 @@ __fpu_explode(fe, fp, type, reg)
fp->fp_sticky = 0;
switch (type) {
case FTYPE_LNG:
- s = __fpu_xtof(fp, l[0]);
+ s = __fpu_xtof(fp, l0);
break;
case FTYPE_INT:
@@ -289,12 +287,13 @@ __fpu_explode(fe, fp, type, reg)
break;
case FTYPE_DBL:
- s = __fpu_dtof(fp, sp[0], sp[1]);
+ s = __fpu_dtof(fp, l0 >> 32, l0 & 0xffffffff);
break;
case FTYPE_EXT:
- l[1] = __fpu_getreg64((reg & ~1) + 2);
- s = __fpu_qtof(fp, sp[0], sp[1], sp[2], sp[3]);
+ l1 = __fpu_getreg64((reg & ~1) + 2);
+ s = __fpu_qtof(fp, l0 >> 32, l0 & 0xffffffff, l1 >> 32,
+ l1 & 0xffffffff);
break;
default: