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PERFORCE change 176621 for review

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Rafal Jaworowski

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Apr 7, 2010, 11:02:27 AM4/7/10

to Perforce Change Reviews

http://p4web.freebsd.org/@@176621?ac=10

Change 176621 by raj@raj_fdt on 2010/04/07 15:02:20

Provide PCI-E defines.

Affected files ...

.. //depot/projects/fdt/sys/dev/pci/pcireg.h#3 edit

Differences ...

==== //depot/projects/fdt/sys/dev/pci/pcireg.h#3 (text+ko) ====

@@ -218,6 +218,17 @@

#define PCIR_PCCARDIF_2 0x44

+
+/* PCIE registers */
+#define PCIR_DCR 0x54
+#define PCIM_DCR_URR 0x0008
+#define PCIM_DCR_FER 0x0004
+#define PCIM_DCR_NFER 0x0002
+#define PCIR_DSR 0x56
+#define PCIR_LTSSM 0x404
+#define PCIM_LTSSM_L0 0x16
+
+
/* PCI device class, subclass and programming interface definitions */

#define PCIC_OLD 0x00

John Baldwin

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Apr 8, 2010, 8:57:53 AM4/8/10

to Rafal Jaworowski, Perforce Change Reviews

On Wednesday 07 April 2010 11:02:27 am Rafal Jaworowski wrote:
> http://p4web.freebsd.org/@@176621?ac=10
>
> Change 176621 by raj@raj_fdt on 2010/04/07 15:02:20
>
> Provide PCI-E defines.
>
> Affected files ...
>
> .. //depot/projects/fdt/sys/dev/pci/pcireg.h#3 edit
>
> Differences ...
>
> ==== //depot/projects/fdt/sys/dev/pci/pcireg.h#3 (text+ko) ====
>
> @@ -218,6 +218,17 @@
>
> #define PCIR_PCCARDIF_2 0x44
>
> +
> +/* PCIE registers */
> +#define PCIR_DCR 0x54
> +#define PCIM_DCR_URR 0x0008
> +#define PCIM_DCR_FER 0x0004
> +#define PCIM_DCR_NFER 0x0002
> +#define PCIR_DSR 0x56
> +#define PCIR_LTSSM 0x404
> +#define PCIM_LTSSM_L0 0x16

Err, are you sure about these? Generally the PCI-e registers are part of the
PCI-e capability and are not a fixed offset. Also, we already have constants
for various PCI-e registers in pcireg.h like so:

/* PCI Express definitions */
#define PCIR_EXPRESS_FLAGS 0x2
#define PCIM_EXP_FLAGS_VERSION 0x000F
#define PCIM_EXP_FLAGS_TYPE 0x00F0
#define PCIM_EXP_TYPE_ENDPOINT 0x0000
#define PCIM_EXP_TYPE_LEGACY_ENDPOINT 0x0010
#define PCIM_EXP_TYPE_ROOT_PORT 0x0040
#define PCIM_EXP_TYPE_UPSTREAM_PORT 0x0050
#define PCIM_EXP_TYPE_DOWNSTREAM_PORT 0x0060
#define PCIM_EXP_TYPE_PCI_BRIDGE 0x0070
#define PCIM_EXP_TYPE_PCIE_BRIDGE 0x0080
#define PCIM_EXP_TYPE_ROOT_INT_EP 0x0090
#define PCIM_EXP_TYPE_ROOT_EC 0x00a0
#define PCIM_EXP_FLAGS_SLOT 0x0100
#define PCIM_EXP_FLAGS_IRQ 0x3e00
#define PCIR_EXPRESS_DEVICE_CAP 0x4
#define PCIM_EXP_CAP_MAX_PAYLOAD 0x0007
#define PCIR_EXPRESS_DEVICE_CTL 0x8
#define PCIM_EXP_CTL_RELAXED_ORD_ENABLE 0x0010
#define PCIM_EXP_CTL_MAX_PAYLOAD 0x00e0
#define PCIM_EXP_CTL_NOSNOOP_ENABLE 0x0800
#define PCIM_EXP_CTL_MAX_READ_REQUEST 0x7000
#define PCIR_EXPRESS_DEVICE_STA 0xa
#define PCIM_EXP_STA_CORRECTABLE_ERROR 0x0001
#define PCIM_EXP_STA_NON_FATAL_ERROR 0x0002
#define PCIM_EXP_STA_FATAL_ERROR 0x0004
#define PCIM_EXP_STA_UNSUPPORTED_REQ 0x0008
#define PCIM_EXP_STA_AUX_POWER 0x0010
#define PCIM_EXP_STA_TRANSACTION_PND 0x0020
#define PCIR_EXPRESS_LINK_CAP 0xc
#define PCIM_LINK_CAP_MAX_SPEED 0x0000000f
#define PCIM_LINK_CAP_MAX_WIDTH 0x000003f0
#define PCIM_LINK_CAP_ASPM 0x00000c00
#define PCIM_LINK_CAP_L0S_EXIT 0x00007000
#define PCIM_LINK_CAP_L1_EXIT 0x00038000
#define PCIM_LINK_CAP_PORT 0xff000000
#define PCIR_EXPRESS_LINK_CTL 0x10
#define PCIR_EXPRESS_LINK_STA 0x12
#define PCIM_LINK_STA_SPEED 0x000f
#define PCIM_LINK_STA_WIDTH 0x03f0
#define PCIM_LINK_STA_TRAINING_ERROR 0x0400
#define PCIM_LINK_STA_TRAINING 0x0800
#define PCIM_LINK_STA_SLOT_CLOCK 0x1000
#define PCIR_EXPRESS_SLOT_CAP 0x14
#define PCIR_EXPRESS_SLOT_CTL 0x18
#define PCIR_EXPRESS_SLOT_STA 0x1a
#define PCIR_EXPRESS_ROOT_CTL 0x1c
#define PCIR_EXPRESS_ROOT_STA 0x20

> +
> +
> /* PCI device class, subclass and programming interface definitions */
>
> #define PCIC_OLD 0x00
>

--
John Baldwin

Rafal Jaworowski

unread,

Apr 8, 2010, 12:43:54 PM4/8/10

to John Baldwin, Perforce Change Reviews

On 2010-04-08, at 14:57, John Baldwin wrote:

> On Wednesday 07 April 2010 11:02:27 am Rafal Jaworowski wrote:
>> http://p4web.freebsd.org/@@176621?ac=10
>>
>> Change 176621 by raj@raj_fdt on 2010/04/07 15:02:20
>>
>> Provide PCI-E defines.
>>
>> Affected files ...
>>
>> .. //depot/projects/fdt/sys/dev/pci/pcireg.h#3 edit
>>
>> Differences ...
>>
>> ==== //depot/projects/fdt/sys/dev/pci/pcireg.h#3 (text+ko) ====
>>
>> @@ -218,6 +218,17 @@
>>
>> #define PCIR_PCCARDIF_2 0x44
>>
>> +
>> +/* PCIE registers */
>> +#define PCIR_DCR 0x54
>> +#define PCIM_DCR_URR 0x0008
>> +#define PCIM_DCR_FER 0x0004
>> +#define PCIM_DCR_NFER 0x0002
>> +#define PCIR_DSR 0x56
>> +#define PCIR_LTSSM 0x404
>> +#define PCIM_LTSSM_L0 0x16
>
> Err, are you sure about these? Generally the PCI-e registers are part of the
> PCI-e capability and are not a fixed offset. Also, we already have constants
> for various PCI-e registers in pcireg.h like so:
>
> /* PCI Express definitions */

Thanks for pointing out. Let me look into improving and cleaning up this (primarily I was just moving existing defines which we had locally in mpc85xx PCI into a shared location without too deep thought).

Rafal

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