Carl, I would to know how is your progress on the new version. What
are brand new in the propagation engine? You have not been speaking a
lot, so I can guess two variants: you work hard or you have a lot of
another work.
I'm finishing my work on the my workbook with labs using Logisim, so I
would to know what version of Logisim has to be specified there in the
version dependent nuances.
I see there is very good user activity on Logisim's Bug tracker and
Feature requests tracker; that's nice. Do you pay your attention to
them regularly? Did you connect with that guy who posted 6th post
here: https://sourceforge.net/projects/circuit/forums/forum/479543/topic/3847665
(potential Brazilian Portuguese translator)?
I've got a trouble with designing T and J-K flip-flops using gates.
Look at the circuit in the attachment. All the flip-flops behave
correct except T and J-K ones: there is no reason for defined value to
appear on the gates' inputs, so we have error values. If they would be
undefined (blue), then Pull Resistor could help, but there are error
values there. Do you know simple solution for T and J-K triggers?
Also, links to good page with flip-flops made of gates circuits are
very welcome. Thank you!
Ilia.
Does anybody have any progress on translations that might be included?
(I know, Ilia, that your translation is complete.)
I saw the post from the Brazilian offering to do a Portuguese
translation. I didn't respond immediately because (a) I was on
vacation and didn't have much time and (b) Theldo Cruz Franqueira had
already volunteered, and I was pretty happy about the prospects there.
Theldo (if that's indeed how you prefer to be addressed) - maybe you
might want to collaborate with this person? Or maybe you'd prefer to
work alone? I don't know much about this other person, so I have more
trust that you're able to do a good translation.
The T and J-K flip-flop circuits are interesting. With the T
flip-flop, the behavior seems appropriate to me: For this circuit, are
you hoping it will start out as 0 or 1? There is nothing in your
circuit that indicates the appropriate starting value, and toggling
the input doesn't help clarify the appropriate value. So an output of
"unknown" seems reasonable. There should be a way to get a JK
flip-flop circuit to work, though, but I can't think of a way to work
around it using this fairly common four-gate approach. Looking
on-line, I found a nine NAND-gate solution that is more of a
master-slave approach, and it can break out of the error value. It's
included in the attached file.
-Carl
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since all gates in Logisim are ideal I find the behavior of the fully
symmetric 4-gate JK logic. If you would connect this circuit on a
breadboard it might (or might not) work, just because stray
capacitances and inductances give you some kind of necessary
asymmetry. Also any real gate will of course interpret an "error"
input as either 1, 0 or some noise continuously switching between
these two values - so far I haven't seen a real-world logic circuit
giving me a "red" output signal...
If you look at the inside of a real JK flip flop you will see that the
manufacturers do not rely on four simple NAND/NOR gates, but also
include transmission gates (in CMOS)
http://focus.ti.com/lit/ds/symlink/cd4027b.pdf
and individual transistors in TTL
http://www.datasheetcatalog.org/datasheets/150/332302_DS.pdf
deviating from the textbook 4-gate solution.
Uwe.
> -Carl
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Hälsningar,
Uwe mailto:uwe.zim...@angstrom.uu.se