Ilia.
Eighteen people came, though - which was really a very nice size. I
had a little questionnaire that I handed out. It asked them for their
names and schools, how much they use Logisim in the classroom, and
whether they'd like to receive e-mails pertaining to Logisim
(averaging at most 1 message per month). Here were the results:
14 have taught a course in which students are assigned to use Logisim;
8 of these wanted to be on the mailing list. (I know some of the other
6, and they don't have plans again to teach a course where Logisim
would be suitable.) Four were from schools that I had not previously
known used Logisim.
4 use a program other than Logisim for circuit simulation; all said
they wanted to be on the mailing list. Of these, two said they use
Quartus, another uses LogicSim, and another B2Logic. The last two
mentioned that they were planning to change (without having decided on
Logisim yet). In discussion, one or two others mentioned recently
using TkGate and/or LogicWorks, but they had recently switched to
using Logisim.
In the discussion, I distributed a handout (attached) and then went
around the room asking each person describe how they use circuit
simulation (if at all). As expected, most people said they were
familiar with Logisim in a variety of courses: CS0, computing systems,
computer architecture, and even discrete mathematics. I then described
the basics of Logisim and summarized the recent changes. Nobody seemed
to express unhappiness with the recent changes. Some seemed quite
happy when I mentioned the new splitter design. Some were visibly
surprised when I mentioned the command-line testing feature and seemed
intrigued.
One person who hadn't used Logisim yet asked whether Logisim chooses
to use "=1" or "2k+1" for its XOR gate. I used that as an opportunity
to ask what instructors would prefer. Surprisingly for me, some
expressed a fairly strong opinion that "=1" was the correct behavior
(even among some who weren't aware of which way Logisim went).
However, many others preferred "2k+1." This discussion was
inconclusive, but I had actually anticipated more vociferous opinion
arguing that odd parity was definitely the way it should work.
Then they started suggesting new bugs/features. This discussion was
much more interesting than I had expected, as very few of their
suggestions represented features from my list. (In a few cases, they
suggested things that had been added in recent versions already,
though.) However, I had distributed a handout that included some of
the often-requested features, so perhaps they felt there was no point
in mentioning them.
- Add an easy toggle for switching all gates to a default of 2 inputs.
(This is similar to a much older suggestion of having an easy toggle
for switching all gates to default to their narrow appearance.)
- Allow a user to "enter" an AND gate and see how it would be built
using transistors, or to "enter" a multiplexer and see how it would be
built out of AND/OR/NOT gates (or controlled buffers) - and of course
you could "enter" one of these OR gates and see how it would
correspond to transistors.
- Show a transistor count in the circuit statistics.
- Tick all clocks when a clock component is poked. (However, the
person had just learned about the new tunnels component, and he
thought he'd be happy using that feature instead.)
- Add a Data Bits attribute for the various flip-flop components.
- Add a Select Location attribute to the plexers, similar to the
Control Line Location attribute for a Controlled Buffer.
- Find a way to make the Shift Register less confusing. (This was
vague, but the instructor said students found this particular
component particularly confusing.)
- Allow memory components to be resized so that a larger window of
memory can be seen inside the circuit.
- When somebody selects or deselects the "Negate x" input on a gate,
any wire connected to that gate should shorten or lengthen.
- If somebody enters a circuit's appearance and drags a port to a
different location, a circuit using that subcircuit's appearance
should reroute any wires that were previously connected to that port
so that it remains connected. (This is very complicated to implement!)
- Flag subcircuits that involve any pins that are unlabeled, perhaps
by drawing them in red. Apparently some instructors feel that pins
should always be labeled, and that Logisim would do well to mark these
in a way analogous to compiler warnings. Also, students sometimes
choose to place text labels adjacent to the pins rather than use the
pins' built-in labels. One person suggested always giving new pins
some sort of default label - which would address using the text
labels, but it wouldn't force users to choose a better label.
- Combinational Analysis should support multibit inputs and outputs.
- Users should be able to drag tools up into the toolbar to make it
grow longer. Some mention was made that students tended to use combine
AND/OR/NOT gates in place of NOR/NAND gates, since these are what
appear in the toolbar.
- As you increase the zoom level, the displayed information for a
component could increase. For example, zooming into a multiplexer
might begin to include a label for each individual input (and use a
font size that doesn't grow as quickly as the zoom factor is growing,
so these additional labels fit).
- If we permit different types of modules, include PLA option where
you have a grid of wires, with input wires on the x-axis and output
wires on the y-axis, and you add nodes for connecting input wires to
output wires.
- Apparently double-clicking a circuit in the explorer pane sometimes
switches to the tool for adding that same circuit into itself. (I
can't replicate this bug, and I think it's an issue of triple-clicking
- though I suggested that to the reporter, and he insisted that it was
only double-clicking. Anyway, perhaps Logisim should ignore the third
or fourth click - or perhaps it should simply refuse to let you switch
to the tool for adding instances of the circuit to itself.)
- There's an issue where you can click on the Data Bits attribute in
the attribute pane to bring up the drop-down menu, and then type '3'.
It will search down to 30 rather than take simply 3. Apparently some
people find this pretty irritating.
Three more comments I received:
- I discussed my recent thoughts about turning ROMs and RAMs into
modules rather than a component found in the Memory library. People
seemed neutral on this idea; but they definitely felt that the window
into current memory contents was a valuable feature, and they did not
want to see this disappear. (I didn't ask about taking away the
in-circuit memory editing capability, though.)
- One person I met mentioned that incorporating components from a
circuit into that circuit's appearance is the most needed feature in
Logisim, in his opinion.
- I talked with somebody afterwards who said that permitting diagonal
wires sounds like it could be very useful - though he sounded like he
wanted to keep horizontal/vertical as the "easy" option. Now that
these people know how I look, I'm hopeful that I'll get to talk to
more people before the conference is over.
All that said, nobody seemed to be indicating that there was an
essential feature that Logisim was missing - they were just talking
about extras that they would find nice.
Finally, I brought up the idea of doing a formal panel at next year's
conference, where we'd have a sampling of people to talk about how
they use circuit simulation in their classes. The attendees seemed
very interested, and several volunteered to speak as part of such a
panel. When the submission deadline for next year's conference gets
closer, I'll send out a request on this new mailing list and try to
put something together. (By the way, I doubt this would be recorded:
SIGCSE is a major conference, but they don't seem to be into recording
sessions for posterity.)
In the nearer term, I hope to update the features page with these new
suggestions and then invite people on this new announcements mailing
list (and others who visit the Logisim home page) to fill out an
on-line questionaire. Questions I'm intending to ask:
* Name, user type (instructor, student, professional designer, hobbyist)
* If you're an instructor or student, what school do you intend, where
is it, and do you have courses that require students to use Logisim?
* Agree/Disagree: The default behavior for a multi-input XOR gate
should be odd parity, rather than exactly one.
* Identify the single most important feature from this list.
* Identify three or four other features from this list that you would
particularly like to see in Logisim.
* Which features in the list do you think would be particularly *bad*?
* Other comments for future improvements to Logisim?