Re: [llvm-dev] Tablegen backend for emulator core?

[swym via llvm-dev]

First off: sorry for CCing, I was not subscribed to llvm-dev in March so couldn't reply directly...

I've been following the discussion and was wondering if either of is aware of Ghidra's slaspec: it specifies instruction encoding along with instruction semantics through what they call pcode. For instructions that go beyond what a simple RTL can express, like flushing caches or alike, you can define custom pcode functions whose actual implementation you can fill in yourself. See [1] for an example.

This means that for code that don't require custom pcode functions, you bascially get emulation for free. See [2] for the C++ code needed to do emulation. In the C++ code, you can also provide the implementation of custom pcode functions.

Dabbling with the PPC backend's TableGen files myself from time to time, I find myself wishing there was something to sleigh's p-code and your discussion immediately rang a dozen bells ;)

Redards,

Thomas

[1] https://github.com/NationalSecurityAgency/ghidra/blob/e7488245fd3e85dea6050e0dd66bb4a4dbeeb53b/Ghidra/Processors/PowerPC/data/languages/ppc_instructions.sinc

[2] https://github.com/NationalSecurityAgency/ghidra/blob/e7488245fd3e85dea6050e0dd66bb4a4dbeeb53b/Ghidra/Features/Decompiler/src/decompile/cpp/sleighexample.cc#L250