[llvm-dev] [TableGen] What to do if there are overlapping instruction patterns?

Charlotte Delenk via llvm-dev

unread,

Aug 25, 2020, 4:00:38 AM8/25/20

to LLVM Developers Mailing List

I've been working on adding support for a (semi-proprietary) extension
for PowerPC called "Paired-Singles". It's a SIMD instruction set
supporting various operations on a vector of 2 32-bit floating point
numbers.

The Extension is found in the PowerPC 750CL, modified variants of it are
used in the Nintendo GameCube (Gekko), the Nintendo Wii (Broadway) and
the Nintendo Wii U (Espresso)

It's been going pretty well so far, however the biggest hurdle I have
encountered was that the testsuite is failing because the instruction
space for Paired Singles has been reused for ISA 3.1 and VMX.

Is there a way to disembiguate them further? You can see my current
patch at https://reviews.llvm.org/D85137 and it already prevents you
from enabling Altivec and Paired Singles at the same time.

_______________________________________________
LLVM Developers mailing list
llvm...@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev

Charlotte Delenk via llvm-dev

unread,

Aug 25, 2020, 4:19:38 AM8/25/20

to llvm...@lists.llvm.org

On 8/25/20 11:00 AM, Charlotte Delenk via llvm-dev wrote:
> I've been working on adding support for a (semi-proprietary) extension
> for PowerPC called "Paired-Singles". It's a SIMD instruction set
> supporting various operations on a vector of 2 32-bit floating point
> numbers.
>
> The Extension is found in the PowerPC 750CL, modified variants of it
> are used in the Nintendo GameCube (Gekko), the Nintendo Wii (Broadway)
> and the Nintendo Wii U (Espresso)
>
> It's been going pretty well so far, however the biggest hurdle I have
> encountered was that the testsuite is failing because the instruction
> space for Paired Singles has been reused for ISA 3.1 and VMX.
>
> Is there a way to disembiguate them further? You can see my current
> patch at https://reviews.llvm.org/D85137 and it already prevents you
> from enabling Altivec and Paired Singles at the same time.
>
>

I should have added the decoding conflicts output generated by the build
step of PPCGenDisassemblerTables.inc in my previous email. Most
worrisome is is the psq_st entry as that conflicts with over a hundred
entries, however this is the immediate-offset store instruction for
paired singles which makes it quite important

decoding-conflicts.txt

Hal Finkel via llvm-dev

unread,

Aug 25, 2020, 7:51:21 AM8/25/20

to Charlotte Delenk, LLVM Developers Mailing List

Hi, Charlotte,

You can set a different decoding namespace for the new instructions. We
have this for SPE instructions, and this is what we did for QPX
instructions when those were supported.

In TableGen, you surround the instructions with something like:

let DecoderNamespace = "PairedSingles" in {

and then in Disassembler/PPCDisassembler.cpp, you'll have something like:

if (STI.getFeatureBits()[PPC::FeaturePairedSingles]) {
    DecodeStatus result =
      decodeInstruction(DecoderTablePairedSingles32, MI, Inst, Address,
this, STI);
    if (result != MCDisassembler::Fail)
      return result;
} else if (STI.getFeatureBits()[PPC::FeatureSPE]) {

-Hal

--
Hal Finkel
Lead, Compiler Technology and Programming Languages
Leadership Computing Facility
Argonne National Laboratory

Charlotte Delenk via llvm-dev

unread,

Aug 25, 2020, 8:50:38 AM8/25/20

to Hal Finkel, LLVM Developers Mailing List

On 8/25/20 12:51 PM, Hal Finkel wrote:
> Hi, Charlotte,
>
> You can set a different decoding namespace for the new instructions.
> We have this for SPE instructions, and this is what we did for QPX
> instructions when those were supported.