[LLVMdev] Register Machine Pass

[Ryan Taylor]

Where is the documentation about registering a machine pass? I'm unable to find it.

I have built a machine function pass similar to the one found in HexagonHardwareLoops.cpp. So I have generated a machine pass.cpp file, modified 'Target'.h and 'Target'TargetMachine.cpp (to add pass via addPass() in the addPreRegAlloc()). All this builds/compiles fine.

When running llc the pass does not get executed.

I seem to be missing some steps? Potentially registration of the machine pass?

Thanks.

[Justin Holewinski]

That should be all you need to do. Are you running in a debugger and
making sure your added addPass() call is actually being executed?
>
>
> Thanks.

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[Ryan Taylor]

It's not being executed. I'm both trying to print via outs() and add info via STATISTIC, neither is occurring.

[Justin Holewinski]

On Mon, 2014-07-14 at 10:00 -0700, Ryan Taylor wrote:
> It's not being executed. I'm both trying to print via outs() and add
> info via STATISTIC, neither is occurring.

Did you try running in a debugger to make sure addPass() is called? Or
if a debugger is unavailable, putting an outs() statement with the
addPass() call? That would at least rule out addPass() not being
called.

[Ryan Taylor]

Justin,

 Yes, I had/have this:

bool MyTargetPassConfig::addPreRegAlloc() {
    outs()<<"PreRegAllocPass\n";
    addPass(createMyPass());
    return true;
}

I do not see this being printed.

[Rafael Auler]

Use llc -debug-pass=Structure to check if your pass is included in the back-end pipeline. You should register your pass using the same idiom to register a regular IR pass. Like this:

static RegisterPass<MyMachinePass> X("mypass", "My Machine Pass");

Check http://llvm.org/doxygen/classllvm_1_1TargetPassConfig.html to get an overview of the possible back-end stages where you can insert your pass via the addPrexxx() interface.

Good luck,

Rafael

[Ryan Taylor]

Rafael,

 Ok. Looks like addPreRegAlloc is a valid back-end stage so that should be fine. Also, I'm curious because none of the documentation/code samples I've seen register machine passes this way. For example, HexagonHardwareLoops.

Thanks.