[LLVMdev] Declare multiple data type for a register class in tblegen

Xiaochu Liu

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Jul 2, 2015, 9:01:10 PM7/2/15

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Hi everyone,

I tried to declare multiple data type [i64, i32, v2i32] for a 64 bit register class GPR. It works OK but I have one problem that is hard to find.

When I tried to map a load instruction of a v2i32 type (LOAD v2i32:$dst) to load GPR, it always generate two LOAD i32 instead of one LOAD v2i32. Any folds understand how this works?

Xiaochu

Matt Arsenault

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Jul 2, 2015, 9:13:36 PM7/2/15

to Xiaochu Liu, llv...@cs.uiuc.edu

You probably haven't called addRegisterClass in the TargetLowering
constructor for the vector type. Without it added there, the type
legalizer will split the vector load into components

-Matt
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Xiaochu Liu

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Jul 2, 2015, 9:42:50 PM7/2/15

to Matt Arsenault, llv...@cs.uiuc.edu

Hi Matt,

I did call addRegisterClass in TargetLowering for all the possible types in the register. And for typecasting instructions (i32 to i64), it works. Any other possiblilities?

Matt Arsenault

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Jul 2, 2015, 9:55:12 PM7/2/15

to Xiaochu Liu, llv...@cs.uiuc.edu

On 07/02/2015 06:41 PM, Xiaochu Liu wrote:
> Hi Matt,
>
> I did call addRegisterClass in TargetLowering for all the possible
> types in the register. And for typecasting instructions (i32 to i64),
> it works. Any other possiblilities?

Try looking at the output of -debug-only=isel and see where the load is
getting split up. The load isn't reaching instruction selection for your
pattern to do anything

Xiaochu Liu

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Jul 3, 2015, 4:03:51 AM7/3/15

to Matt Arsenault, llv...@cs.uiuc.edu

Thanks. I'm gonna try tomorrow and let you know.

Xiaochu Liu

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Jul 4, 2015, 7:06:49 PM7/4/15

to Matt Arsenault, llv...@cs.uiuc.edu

Hi Matt,

I tried debug-only=isel and have some more informations.

The steps before 'Legalized selection'( excluding it) all use v2i32 load. At the step of 'Legalized selection', it replaced one v2i32 load by two i32 load + shl+ or + bitcast (I have a pattern for convert from v2i32 to 2*i32). In previous steps (initial, lowered, type-legalized), they all use v2i32 load.

Can you please think of any other places where certain things have to be declared legal?

Thanks,

Xiaochu

Xiaochu Liu

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Jul 4, 2015, 7:21:18 PM7/4/15

to Matt Arsenault, llv...@cs.uiuc.edu

Oh, they have selection details in the end. Let me check that first...

Xiaochu Liu

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Jul 4, 2015, 7:36:39 PM7/4/15

to Matt Arsenault, llv...@cs.uiuc.edu

The selection details are just instruction selections after legalization and no useful information was there as well...

Xiaochu Liu

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Jul 4, 2015, 9:15:24 PM7/4/15

to Matt Arsenault, llv...@cs.uiuc.edu

My temporary solution is to use 'Custom' to lower it.

Matt Arsenault

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Jul 8, 2015, 1:56:00 PM7/8/15

to Xiaochu Liu, llv...@cs.uiuc.edu

On 07/04/2015 04:35 PM, Xiaochu Liu wrote:
> The selection details are just instruction selections after
> legalization and no useful information was there as well...

You should be able to see in what phase it was split. The full -debug
info might be helpful, I've occasionally noticed problems where some
information seems to be missing from just -debug-only=isel

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