[LLVMdev] Possible bug in LLC at -O1

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Anitha B Gollamudi

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Nov 20, 2012, 4:40:21 AM11/20/12
to llv...@cs.uiuc.edu
Hi

I am seeing an issue (compiled application seg faults) when llc is
used at -O1. I first need to triage out which optimization/pass is
responsible for the seg fault. As such I am following this strategy:
disable gradually those passes at -O1 which do not exist at -O0. For
this I used -pass-debug=Structure. [ diff pasted at the end for
reference]

The problem is I have used almost all -disable-* options from llc
hidden help. Yet I could not make it equivalent to -O0. Here are my
questions:


1. For some reason, I am not able to use -regalloc=fast at -O1. Gives
the following error:

$ llc -regalloc=fast -O1 -mcpu=bdver2 test.ll
LLVM ERROR: regalloc=... not currently supported with -O0

How do I switch to "fast" allocator at -O1?

2. How do I disable following passes:
(a) Optimize for code generation
(b) Remove dead machine instructions
(c) Optimize machine instruction PHIs
(d) Remove unreachable machine basic blocks

(Note that I am already using -disable-machine-dse, cse, -machine-sink
, lsr ...)


3. Is there any other better way to see which pass(es) are responsible
for the seg fault at -O1 ?

-----------------------------
+Machine Branch Probability Analysis
ModulePass Manager
FunctionPass Manager
Preliminary module verification
Dominator Tree Construction
Module Verifier
+ Natural Loop Information
+ Loop Pass Manager
+ Canonicalize natural loops
+ Scalar Evolution Analysis
+ Loop Pass Manager
+ Canonicalize natural loops
+ Induction Variable Users
+ Loop Strength Reduction
+ Optimize for code generation
+ Natural Loop Information
+ Branch Probability Analysis
X86 DAG->DAG Instruction Selection
+ MachineDominator Tree Construction
+ Local Dynamic TLS Access Clean-up
+ Tail Duplication
+ Optimize machine instruction PHIs
+ Remove dead machine instructions
+ MachineDominator Tree Construction
+ Machine Natural Loop Construction
+ Machine Loop Invariant Code Motion
+ Machine Common Subexpression Elimination
+ Machine code sinking
+ Peephole Optimizations
+ Process Implicit Definitions
+ Remove unreachable machine basic blocks
+ Live Variable Analysis

- Fast Register Allocator
+ Slot index numbering
+ Live Interval Analysis
+ Debug Variable Analysis
+ Simple Register Coalescing
+ Calculate spill weights
+ Live Stack Slot Analysis
+ Virtual Register Map
+ Live Register Matrix
+ Bundle Machine CFG Edges
+ Spill Code Placement Analysis
+ Greedy Register Allocator
+ Virtual Register Rewriter
+ Live Stack Slot Analysis
+ Stack Slot Coloring
+ Machine Loop Invariant Code Motion
+ Control Flow Optimizer
+ Tail Duplication
+ Machine Copy Propagation Pass
+ MachineDominator Tree Construction
+ Machine Natural Loop Construction
+ Post RA top-down list latency scheduler
+ Machine Block Frequency Analysis
+ Branch Probability Basic Block Placement
+ Execution dependency fix









--
Anitha
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Anitha B Gollamudi

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Nov 22, 2012, 1:53:07 AM11/22/12
to llv...@cs.uiuc.edu
On 20 November 2012 15:10, Anitha B Gollamudi <anitha....@gmail.com> wrote:
> Hi
>
> I am seeing an issue (compiled application seg faults) when llc is
> used at -O1. I first need to triage out which optimization/pass is
> responsible for the seg fault. As such I am following this strategy:
> disable gradually those passes at -O1 which do not exist at -O0. For
> this I used -pass-debug=Structure. [ diff pasted at the end for
> reference]
>
> The problem is I have used almost all -disable-* options from llc
> hidden help. Yet I could not make it equivalent to -O0. Here are my
> questions:
>
>
> 1. For some reason, I am not able to use -regalloc=fast at -O1. Gives
> the following error:
>
> $ llc -regalloc=fast -O1 -mcpu=bdver2 test.ll
> LLVM ERROR: regalloc=... not currently supported with -O0
>
> How do I switch to "fast" allocator at -O1?
>

<ping>

Not much help on register allocator issue either?


> 2. How do I disable following passes:
> (a) Optimize for code generation
> (b) Remove dead machine instructions
> (c) Optimize machine instruction PHIs
> (d) Remove unreachable machine basic blocks
>
> (Note that I am already using -disable-machine-dse, cse, -machine-sink
> , lsr ...)
>


Chris Lattner

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Nov 22, 2012, 11:16:59 AM11/22/12
to Anitha B Gollamudi, llv...@cs.uiuc.edu

On Nov 21, 2012, at 10:53 PM, Anitha B Gollamudi <anitha....@gmail.com> wrote:
>>
>> 1. For some reason, I am not able to use -regalloc=fast at -O1. Gives
>> the following error:
>>
>> $ llc -regalloc=fast -O1 -mcpu=bdver2 test.ll
>> LLVM ERROR: regalloc=... not currently supported with -O0
>>
>> How do I switch to "fast" allocator at -O1?
>>
>
> <ping>
>
> Not much help on register allocator issue either?

For what its worth, many people in the US are out on vacation this week.

-Chris

Jakob Stoklund Olesen

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Nov 26, 2012, 1:58:07 PM11/26/12
to Anitha B Gollamudi, llv...@cs.uiuc.edu

On Nov 21, 2012, at 10:53 PM, Anitha B Gollamudi <anitha....@gmail.com> wrote:

>>
>> How do I switch to "fast" allocator at -O1?
>>
>
> <ping>
>
> Not much help on register allocator issue either?

llc -optimize-regalloc=0

/jakob

Anitha B Gollamudi

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Nov 26, 2012, 11:00:18 PM11/26/12
to Jakob Stoklund Olesen, llv...@cs.uiuc.edu
On 27 November 2012 00:28, Jakob Stoklund Olesen <stok...@2pi.dk> wrote:
>
> On Nov 21, 2012, at 10:53 PM, Anitha B Gollamudi <anitha....@gmail.com> wrote:
>
>>>
>>> How do I switch to "fast" allocator at -O1?
>>>
>>
>> <ping>
>>
>> Not much help on register allocator issue either?
>
> llc -optimize-regalloc=0
>

Thanks! In one of those trial and error methods, I was using both
optimize-regalloc=0
-regalloc=fast. Need to drop -regalloc then.




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Anitha
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