[llvm-dev] [GlobalISel] How to properly handle the carry bit of G_UADDO/G_USUBO

[Dominik Montada via llvm-dev]

Hi there,

we are working on a backend in GlobalISel and have a question regarding
the carry-in of the G_UADDO/G_USUBO instructions.

Taking inspiration from the AMDGPU and X86 backend we introduced a
pseudo register and non-allocatable register class which models our
carry bit and use a COPY instruction to/from this pseudo register. For
anything other than -O0 this already works fine, as the COPYs get
eliminated.

However on -O0 the COPY is not eliminated and we run into an assertion
in our copyPhysReg implementation, because we cannot COPY to this pseudo
register.

Again looking at AMDGPU and X86 I found two possible solutions to this
problem: AMDGPU seems to just emit an instruction which produces
conditionally a carry bit. Since it's just -O0 anyway we don't care
about these redundant instructions I guess.

X86 on the other hand seems to be using a machine pass which eliminates
COPYs to such a pseudo register.

What would be the proper way to handle this?

Also as a follow-up question: I noticed that I can mark the def of the
COPY to the pseudo register as DEAD and it will get eliminated. However
I am wondering if that is safe to do, even if its just a "pseudo copy"
anyway. Can somebody give some feedback here?

Cheers

Dominik

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