[llvm-dev] Decoding Conflict - Decoding a register value

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Sky Flyer via llvm-dev

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Jan 27, 2016, 1:09:51 PM1/27/16
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Hello all,

I am having a decoding conflict which practically is not a conflict but I don't know how to resolve it.

Here is the conflict:
        TST8a 0011000000000_
        TST8d 0011000000___0

The conflict is in the register values. it is actually like this:

        TST8a 0011000000000a
        TST8d 0011000000ddd0

a can be both 0 and 1. but the value for the register d as defined in RegisterInfo.td starts from one (def D0 : TestReg<0x01,  "d0">,).
I mean ddd is greater equal than one. How can I tell the Tabelgen/disassembler that ddd > 0 so that I don't get any conflict? (There is no such a case that ddd is 0b000 so that the TST8a and TST8d cannot be distinguishable!)

I don't know how clear I described, let me know if I have to explain it better.


Cheers,
ES

Sky Flyer via llvm-dev

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Jan 27, 2016, 3:17:11 PM1/27/16
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Sky Flyer via llvm-dev

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Jan 28, 2016, 4:32:07 AM1/28/16
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Joachim Durchholz via llvm-dev

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Jan 28, 2016, 5:05:38 AM1/28/16
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Am 28.01.2016 um 10:31 schrieb Sky Flyer via llvm-dev:
> Hello all,
>
> I am having a decoding conflict which practically is not a conflict but I
> don't know how to resolve it.
>
> Here is the conflict:
> TST8a 0011000000000_
> TST8d 0011000000___0
>
> The conflict is in the register values. it is actually like this:
>
> TST8a 0011000000000*a*
> TST8d 0011000000*ddd*0

How should 00110000000001*0 decode?
AFAICT that would match both patterns and satisfy d >= 1, so in the
situation as stated there is indeed a conflict.

(Disclaimer: I know nothing about the decoding infrastructure you are
using, I'm going by your problem statement and by what I learned from
toying with instruction decoding with x86 and 68k, decades ago.)

Regards,
Jo
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