SDRAM woes

[Greg Reynolds]

Hi All,

In my attempts to make something similar to the Linuxstamp II board, I have used a Micron SDRAM chip MT48LC64M4A2 and connected up exactly the same way as the reference board. 

However, my SDRAM doesn't seem to be working properly. I am using the AT91 bootstrap program and have changed the SDRAM parameters to the following:

#ifdef CFG_SDRAM

/* Initialize the matrix (memory voltage = 3.3) */

//writel((readl(AT91C_BASE_CCFG + CCFG_EBICSA)) | AT91C_EBI_CS1A_SDRAMC | (1<<16), AT91C_BASE_CCFG + CCFG_EBICSA);

ebi_csa_value = 

0x00000002 | // EBI_CS1A  = 1 ==> SDRAM for Chip Select 1

0x00000100 | // EBI_DBPUC = 1 ==> data pins are not pulled up

0x00010000;  // VDDIOMSEL = 1 ==> 3.3V SDRAM

writel(ebi_csa_value, AT91C_BASE_CCFG + CCFG_EBICSA);

dbg_print("Initialising SDRAM controller.\n\r");

unsigned int sdram_config_value = 

AT91C_SDRAMC_NC_11       |

AT91C_SDRAMC_NR_13       |

AT91C_SDRAMC_CAS_3       |

AT91C_SDRAMC_NB_4_BANKS  |

AT91C_SDRAMC_DBW_16_BITS |

AT91C_SDRAMC_TWR_2       | 

AT91C_SDRAMC_TRC_8       |

AT91C_SDRAMC_TRP_3       | 

AT91C_SDRAMC_TRCD_3      | 

AT91C_SDRAMC_TRAS_6      | 

AT91C_SDRAMC_TXSR_9;      

/* Configure SDRAM Controller */

sdram_init(sdram_config_value,

1020,                      // every 7.8us

0);         

dbg_print("SDRAM initialisation process finished.\n\r");

#endif /* CFG_SDRAM */

However, when I write my test pattern of 0xdeadbeef (or any other pattern) to addresses starting at 0x20000000 it only seems to store the occasional bit/byte of what I am writing.  Any ideas about what might be wrong with the parameters above?

Also, should the pull-ups on the data bus be used or not - the default configuration doesn't appear to turn them off as far as I can see.

My master clock speed is 130 MHz, but I have gone as low as 80 MHz and it doesn't appear to make much difference. 

Thanks,

Greg

[Paul Thomas]

That p/n seems to only be a x4 part where the Atmel reference design
uses 2 x16 parts for a 32-bit data bus, and the Linuxstamp II uses a
single x16 part for a 16-bit data bus. Those are the only two options
for the SDRAM controller.

thanks,
Paul

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[Greg Reynolds]

Thanks Paul that's really useful.

So, understanding SDRAM a bit better now, I think I should be able to use an SDRAM chip with a 16-bit data bus, such as the MT48LC16M16A2 instead? 

Greg

--
Greg Reynolds
Technical Director
Pattern Analytics Research Ltd.

Wellington House
Starley Way
Birmingham International Park
Solihull
West Midlands
B37 7HB
+44(0)121 781 7419

[Andy Huntington]

Hi Greg,

It does seem that the MT48LC16M16A2 should work. Have you had any luck with it?

Andy.

[Greg Reynolds]

Hi Andy,

I got my boards back yesterday (I had to have the other chip desoldered) - I will be looking at this next week so I'll keep you posted.

Greg