JTAG + OpenOCD

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Flavio Castro Alves Filho

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Jun 11, 2012, 6:31:53 PM6/11/12
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Hello all,

I would like to ask how to set up openocd in order to load software into Linuxstamp.

I don't use JLink, I'm using a TI Stellaris devkit (which basically is a FDTI with JTAG capabilities).

I saw in my openocd that there are two hardware configuration target files:

target/at91sam9260.cfg
target/at91sam9260_ext_RAM_ext_flash.cfg

Which file should I use?

Best regards?

Paul Thomas

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Jun 12, 2012, 1:54:29 AM6/12/12
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Here's the openocd configs I use. They should be correct for the SDRAM.

thanks,
Paul
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lnst2-9g20.cfg
lnst2-9260.cfg

Flavio Castro Alves Filho

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Jun 12, 2012, 8:45:05 AM6/12/12
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Hello Paul,

Thank you very much.

I'll test here and I'll send you a feedback.

Best Regards,

Flavio

2012/6/12 Paul Thomas <pthom...@gmail.com>

Flavio Castro Alves Filho

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Jun 12, 2012, 9:21:52 AM6/12/12
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Hello Paul,

Which interface file are you using? It is not mentioned on the configuration file, so I believe that you set it during openocd execution.

I saw on the script that the init is executed when GDB is called. Do you use openocd to load binary files directly into flash? What is the procedure that you use?

I intend to have a script capable to change the complete system (at91bootstrap, u-boot, kernel and jffs2 root filesystem) using openocd.

Best regards,

Flavio


2012/6/12 Flavio Castro Alves Filho <flavio...@gmail.com>

Flavio Castro Alves Filho

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Oct 2, 2012, 6:41:28 PM10/2/12
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Hello Paul,

I would like to inform you that it worked.

I could use your file to communicate with Linuxstamp2 with JTAG using
a FTDI chip (in my case, using the TI's Stellaris devkit).

Now I have another question/challenge: can I load an image to
dataflash using this JTAG interface and OpenOCD?

Miguel Wisintainer

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Oct 2, 2012, 9:04:09 PM10/2/12
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Hello
My new product
http://www.basic4ever.com/interpretador.shtml
TCPIPCHIP>

Paul Thomas

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Oct 2, 2012, 10:49:12 PM10/2/12
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Hi Flavio,

The key is to get u-boot running in ram, because it can read/write to the NAND part. So you need to load both at91bootstrap and u-boot, something like

halt
reset init
load_image u-boot.bin 0x21f00000
load_image nandflash/nandflash_at91sam9g20ek.bin 0x20400000
load_image u-boot.bin 0x20800000

reg 15 0x21f00000
resume

Then once you have u-boot running in ram you can write it to the NAND part (from the u-boot console, not openocd console), something like:
nand erase 0; mw 0x20400014 0xfdc; nand write 0x20400000 0x0 0x20000; nand write 0x20800000 0x20000 0x40000

The 'mw 0x20400014 0xfdc' is very confusing. Somehow when I've built the at91sam9260 image that 0x14 location isn't right, and I have to zero out the top half.

thanks,
Paul

Paul Thomas

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Oct 2, 2012, 10:53:28 PM10/2/12
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Hi Miguel,

That looks interesting. However, unless it's an open hardware design please refrain from posting to this list.

thanks,
Paul

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Flavio Castro Alves Filho

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Oct 3, 2012, 8:15:59 AM10/3/12
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Hello Paul,

I am currently using nand flash to load the images.

Now I'm looking for a way to store the main images (at91bootstrap,
u-boot and uImage) to the serial SPI dataflash of the board.

Right now I'm currently working with this approach - using u-boot to
manage everything.

Thank you very much.

Best regards,

Flavio

2012/10/2 Paul Thomas <pthom...@gmail.com>:

Flavio Castro Alves Filho

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Oct 5, 2012, 5:32:40 PM10/5/12
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Hello Paul,

I'm still fighting against OpenOCD and JTAG.

I'm using your openocd configuration file.

Below is the trace of my output after a "reset init' command:

Open On-Chip Debugger 0.5.0-dev-00927-ge7c611d-dirty (2011-07-11-18:18)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.berlios.de/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
adapter_nsrst_delay: 300
jtag_ntrst_delay: 200
RCLK - adaptive
at91sam9260_lnst2_init
Info : RCLK (adaptive clock speed) not supported - fallback to 3 kHz
Error: JTAG scan chain interrogation failed: all ones
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: at91sam9260.cpu: IR capture error; saw 0x0f not 0x01
Warn : Bypassing JTAG setup events due to errors
Info : Embedded ICE version 15
Error: unknown EmbeddedICE version (comms ctrl: 0xffffffff)
Info : at91sam9260.cpu: hardware has 2 breakpoint/watchpoint units
Warn : WARNING: unknown debug reason: 0xf
Warn : ThumbEE -- incomplete support
Info : accepting 'telnet' connection from 4444
invalid command name "HALT"
Error: JTAG scan chain interrogation failed: all ones
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: at91sam9260.cpu: IR capture error; saw 0x0f not 0x01
Warn : Bypassing JTAG setup events due to errors
Warn : WARNING: unknown debug reason: 0xf
Warn : ThumbEE -- incomplete support
target state: halted
target halted in ThumbEE state due to debug-request, current mode: System
cpsr: 0xffffffff pc: 0xfffffff9
MMU: enabled, D-Cache: enabled, I-Cache: enabled
8 kHz
at91sam9260.cpu mww address data [count]
mww ['phys'] address value [count]
Runtime Error: lnst2-9260.cfg.bkp:23:
in procedure 'at91sam9260_lnst2_init'
in procedure 'mww' called at file "lnst2-9260.cfg.bkp", line 23

Warn : NOTE! DCC downloads have not been enabled, defaulting to slow
memory writes. Type 'help dcc'.
Warn : NOTE! Severe performance degradation without fast memory access
enabled. Type 'help fast'.

I have the debug serial plugged to the board, with u-boot stopped, and
nothing changes after the command.

Do you have any clue about what is it going on?

Best regards,

Flavio

2012/10/3 Flavio Castro Alves Filho <flavio...@gmail.com>:
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