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[PATCH v2] ARM: OMAP4460: cpuidle: Extend PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD on cpuidle

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Grygorii Strashko

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Oct 22, 2013, 3:10:02 PM10/22/13
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The same workaround as ff999b8a0983ee15668394ed49e38d3568fc6859
"ARM: OMAP4460: Workaround for ROM bug because of CA9 r2pX GIC ..."
need to be applied not only when system is booting, but when MPUSS hits
OSWR state through CPUIdle too. Without this WA the same issue is
reproduced now on boards PandaES and Tablet/Blaze with SOM OMAP4460
when CONFIG_CPU_IDLE is enabled.
After MPUSS has enterred OSWR and waken up:
- GIC distributor became disabled forever
- scheduling is not performed any more

Cc: Kevin Hilman <khi...@linaro.org>
Acked-by: Santosh Shilimkar <santosh....@ti.com>
Reported-by: Taras Kondratiuk <taras.ko...@linaro.org>
Signed-off-by: Grygorii Strashko <grygorii...@ti.com>
---
Changes in V2:
- get rid of using omap4_mpuss_read_prev_context_state();
- move call of gic_dist_enable() in omap-mpuss-lowpower.c
- add call of gic_timer_retrigger()

Based on: v3.12-rc5

arch/arm/mach-omap2/common.h | 1 +
arch/arm/mach-omap2/cpuidle44xx.c | 26 +++++++++++++++++++++-----
arch/arm/mach-omap2/omap-mpuss-lowpower.c | 3 +++
arch/arm/mach-omap2/omap4-common.c | 6 ++++++
4 files changed, 31 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index 4a5684b..c9b4bc3 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -232,6 +232,7 @@ static inline void __iomem *omap4_get_scu_base(void)

extern void __init gic_init_irq(void);
extern void gic_dist_disable(void);
+extern void gic_dist_enable(void);
extern bool gic_dist_disabled(void);
extern void gic_timer_retrigger(void);
extern void omap_smc1(u32 fn, u32 arg);
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index 4c8982a..4c158c8 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -80,6 +80,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
int index)
{
struct idle_statedata *cx = state_ptr + index;
+ u32 mpuss_can_lose_context = 0;

/*
* CPU0 has to wait and stay ON until CPU1 is OFF state.
@@ -104,6 +105,9 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
}
}

+ mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) &&
+ (cx->mpu_logic_state == PWRDM_POWER_OFF);
+
/*
* Call idle CPU PM enter notifier chain so that
* VFP and per CPU interrupt context is saved.
@@ -118,9 +122,8 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
* Call idle CPU cluster PM enter notifier chain
* to save GIC and wakeupgen context.
*/
- if ((cx->mpu_state == PWRDM_POWER_RET) &&
- (cx->mpu_logic_state == PWRDM_POWER_OFF))
- cpu_cluster_pm_enter();
+ if (mpuss_can_lose_context)
+ cpu_cluster_pm_enter();
}

omap4_enter_lowpower(dev->cpu, cx->cpu_state);
@@ -128,9 +131,23 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,

/* Wakeup CPU1 only if it is not offlined */
if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
+
+ if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
+ mpuss_can_lose_context)
+ gic_dist_disable();
+
clkdm_wakeup(cpu_clkdm[1]);
omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON);
clkdm_allow_idle(cpu_clkdm[1]);
+
+ if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
+ mpuss_can_lose_context) {
+ while (gic_dist_disabled()) {
+ udelay(1);
+ cpu_relax();
+ }
+ gic_timer_retrigger();
+ }
}

/*
@@ -143,8 +160,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
* Call idle CPU cluster PM exit notifier chain
* to restore GIC and wakeupgen context.
*/
- if (dev->cpu == 0 && (cx->mpu_state == PWRDM_POWER_RET) &&
- (cx->mpu_logic_state == PWRDM_POWER_OFF))
+ if (dev->cpu == 0 && mpuss_can_lose_context)
cpu_cluster_pm_exit();

fail:
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index f991016..667915d 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -271,6 +271,9 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
else
omap_pm_ops.finish_suspend(save_state);

+ if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) && cpu)
+ gic_dist_enable();
+
/*
* Restore the CPUx power state to ON otherwise CPUx
* power domain can transitions to programmed low power
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 5791143..3ad4a8c 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -128,6 +128,12 @@ void gic_dist_disable(void)
__raw_writel(0x0, gic_dist_base_addr + GIC_DIST_CTRL);
}

+void gic_dist_enable(void)
+{
+ if (gic_dist_base_addr)
+ __raw_writel(0x1, gic_dist_base_addr + GIC_DIST_CTRL);
+}
+
bool gic_dist_disabled(void)
{
return !(__raw_readl(gic_dist_base_addr + GIC_DIST_CTRL) & 0x1);
--
1.7.9.5



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Tony Lindgren

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Nov 14, 2013, 1:40:02 PM11/14/13
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* Grygorii Strashko <grygorii...@ti.com> [131022 12:09]:
> The same workaround as ff999b8a0983ee15668394ed49e38d3568fc6859
> "ARM: OMAP4460: Workaround for ROM bug because of CA9 r2pX GIC ..."
> need to be applied not only when system is booting, but when MPUSS hits
> OSWR state through CPUIdle too. Without this WA the same issue is
> reproduced now on boards PandaES and Tablet/Blaze with SOM OMAP4460
> when CONFIG_CPU_IDLE is enabled.
> After MPUSS has enterred OSWR and waken up:
> - GIC distributor became disabled forever
> - scheduling is not performed any more
>
> Cc: Kevin Hilman <khi...@linaro.org>
> Acked-by: Santosh Shilimkar <santosh....@ti.com>
> Reported-by: Taras Kondratiuk <taras.ko...@linaro.org>
> Signed-off-by: Grygorii Strashko <grygorii...@ti.com>

Applying into omap-for-v3.13/fixes thanks.

Tony

Tony Lindgren

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Nov 15, 2013, 10:40:03 AM11/15/13
to
* Tony Lindgren <to...@atomide.com> [131114 10:36]:
> * Grygorii Strashko <grygorii...@ti.com> [131022 12:09]:
> > The same workaround as ff999b8a0983ee15668394ed49e38d3568fc6859
> > "ARM: OMAP4460: Workaround for ROM bug because of CA9 r2pX GIC ..."
> > need to be applied not only when system is booting, but when MPUSS hits
> > OSWR state through CPUIdle too. Without this WA the same issue is
> > reproduced now on boards PandaES and Tablet/Blaze with SOM OMAP4460
> > when CONFIG_CPU_IDLE is enabled.
> > After MPUSS has enterred OSWR and waken up:
> > - GIC distributor became disabled forever
> > - scheduling is not performed any more
> >
> > Cc: Kevin Hilman <khi...@linaro.org>
> > Acked-by: Santosh Shilimkar <santosh....@ti.com>
> > Reported-by: Taras Kondratiuk <taras.ko...@linaro.org>
> > Signed-off-by: Grygorii Strashko <grygorii...@ti.com>
>
> Applying into omap-for-v3.13/fixes thanks.

Hmm looks like this breaks the build with randconfigs at least
with the attached .config, so dropping for now.

arch/arm/mach-omap2/built-in.o: In function `omap_enter_idle_coupled':
:(.text+0xb48c): undefined reference to `pm44xx_errata'

Can you please check and repost?

Thanks,

Taras Kondratiuk

unread,
Nov 15, 2013, 11:10:02 AM11/15/13
to
On 11/15/2013 05:36 PM, Tony Lindgren wrote:
> * Tony Lindgren <to...@atomide.com> [131114 10:36]:
>> * Grygorii Strashko <grygorii...@ti.com> [131022 12:09]:
>>> The same workaround as ff999b8a0983ee15668394ed49e38d3568fc6859
>>> "ARM: OMAP4460: Workaround for ROM bug because of CA9 r2pX GIC ..."
>>> need to be applied not only when system is booting, but when MPUSS hits
>>> OSWR state through CPUIdle too. Without this WA the same issue is
>>> reproduced now on boards PandaES and Tablet/Blaze with SOM OMAP4460
>>> when CONFIG_CPU_IDLE is enabled.
>>> After MPUSS has enterred OSWR and waken up:
>>> - GIC distributor became disabled forever
>>> - scheduling is not performed any more
>>>
>>> Cc: Kevin Hilman <khi...@linaro.org>
>>> Acked-by: Santosh Shilimkar <santosh....@ti.com>
>>> Reported-by: Taras Kondratiuk <taras.ko...@linaro.org>
>>> Signed-off-by: Grygorii Strashko <grygorii...@ti.com>
>>
>> Applying into omap-for-v3.13/fixes thanks.
>
> Hmm looks like this breaks the build with randconfigs at least
> with the attached .config, so dropping for now.

Hi Tony
Have you forgot to attach .config?

> arch/arm/mach-omap2/built-in.o: In function `omap_enter_idle_coupled':
> :(.text+0xb48c): undefined reference to `pm44xx_errata'

I assume that .config doesn't have CONFIG_SMP enabled while
pm44xx_errata is defined in omap-smp.c.
I think it should be a separate patch to move pm44xx_errata somewhere
else, so this patch will remain the same.

Btw, do we need omap_enter_idle_coupled() in UP?

--
Taras Kondratiuk

Tony Lindgren

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Nov 15, 2013, 11:20:03 AM11/15/13
to
* Taras Kondratiuk <taras.ko...@linaro.org> [131115 08:03]:
> On 11/15/2013 05:36 PM, Tony Lindgren wrote:
> > * Tony Lindgren <to...@atomide.com> [131114 10:36]:
> >> * Grygorii Strashko <grygorii...@ti.com> [131022 12:09]:
> >>> The same workaround as ff999b8a0983ee15668394ed49e38d3568fc6859
> >>> "ARM: OMAP4460: Workaround for ROM bug because of CA9 r2pX GIC ..."
> >>> need to be applied not only when system is booting, but when MPUSS hits
> >>> OSWR state through CPUIdle too. Without this WA the same issue is
> >>> reproduced now on boards PandaES and Tablet/Blaze with SOM OMAP4460
> >>> when CONFIG_CPU_IDLE is enabled.
> >>> After MPUSS has enterred OSWR and waken up:
> >>> - GIC distributor became disabled forever
> >>> - scheduling is not performed any more
> >>>
> >>> Cc: Kevin Hilman <khi...@linaro.org>
> >>> Acked-by: Santosh Shilimkar <santosh....@ti.com>
> >>> Reported-by: Taras Kondratiuk <taras.ko...@linaro.org>
> >>> Signed-off-by: Grygorii Strashko <grygorii...@ti.com>
> >>
> >> Applying into omap-for-v3.13/fixes thanks.
> >
> > Hmm looks like this breaks the build with randconfigs at least
> > with the attached .config, so dropping for now.
>
> Hi Tony
> Have you forgot to attach .config?

Oops, sorry looks like I removed it already as I rebuilt the tree
and started a new set of randconfig build tests.

> > arch/arm/mach-omap2/built-in.o: In function `omap_enter_idle_coupled':
> > :(.text+0xb48c): undefined reference to `pm44xx_errata'
>
> I assume that .config doesn't have CONFIG_SMP enabled while
> pm44xx_errata is defined in omap-smp.c.
> I think it should be a separate patch to move pm44xx_errata somewhere
> else, so this patch will remain the same.

Yes something like that probably. Sounds like that should be then
patches before this fix.

> Btw, do we need omap_enter_idle_coupled() in UP?

That should be checked, am43xx may need it.

Regards,

Tony

Santosh Shilimkar

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Nov 15, 2013, 11:20:03 AM11/15/13
to
Nope. omap_enter_idle_coupled() is needed only for SMP
systems. UP don't need couple idle functionality as
such.

Regards,
Santosh

Kevin Hilman

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Jan 14, 2014, 4:30:02 PM1/14/14
to
So what's the status of this fix and dependencies?

Both linux-next[1] and arm-soc/for-next[2] are failing boot tests on
omap4460/panda-es because multi_v7_defconfig now has CPUidle enabled
by default.

Kevin

[1] http://lists.linaro.org/pipermail/kernel-build-reports/2014-January/001891.html
[2] http://lists.linaro.org/pipermail/kernel-build-reports/2014-January/001898.html

Santosh Shilimkar

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Jan 14, 2014, 6:30:01 PM1/14/14
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I think Taras needs to refresh the patch based on discussion
and then it can be merged.
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