[PATCH 0/2] mtd: atmel_nand: remove compatible "atmel,sama5d4-nfc"

[Wenyou Yang]

It is a datasheet bug, for current SoCs, the RB_EDGE3(i.e. bit 27)
of HSMC_SR register does not exist, the RB_EDGE0 (i.e. bit 24) is
the ready/busy line edge status bit. So the compatible
"atmel,sama5d4-nfc" is unneeded.


Wenyou Yang (2):
Revert "mtd: atmel_nand: Support variable RB_EDGE interrupts"
ARM: at91/dt: use "atmel,sama5d3-nfc" compatible for nfc

.../devicetree/bindings/mtd/atmel-nand.txt | 2 +-
arch/arm/boot/dts/sama5d2.dtsi | 2 +-
drivers/mtd/nand/atmel_nand.c | 35 +++++-----------------
drivers/mtd/nand/atmel_nand_nfc.h | 3 +-
4 files changed, 11 insertions(+), 31 deletions(-)

--
2.7.4

[Wenyou Yang]

Due to the compatible "atmel,sama5d4-nfc" removal, use
"atmel,sama5d3-nfc" for the sama5d2's nfc node.

Signed-off-by: Wenyou Yang <wenyo...@atmel.com>
---

arch/arm/boot/dts/sama5d2.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 78996bd..9817090 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -280,7 +280,7 @@
status = "disabled";

nfc@c0000000 {
- compatible = "atmel,sama5d4-nfc";
+ compatible = "atmel,sama5d3-nfc";
#address-cells = <1>;
#size-cells = <1>;
reg = < /* NFC Command Registers */
--
2.7.4

[Wenyou Yang]

This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable
RB_EDGE interrupts")

Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR

register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy

line edge status bit. It is a datasheet bug.

Signed-off-by: Wenyou Yang <wenyo...@atmel.com>
---

.../devicetree/bindings/mtd/atmel-nand.txt | 2 +-

drivers/mtd/nand/atmel_nand.c | 35 +++++-----------------
drivers/mtd/nand/atmel_nand_nfc.h | 3 +-

3 files changed, 10 insertions(+), 30 deletions(-)

diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
index d53aba9..3e7ee99 100644
--- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
@@ -39,7 +39,7 @@ Optional properties:

Nand Flash Controller(NFC) is an optional sub-node
Required properties:
-- compatible : "atmel,sama5d3-nfc" or "atmel,sama5d4-nfc".
+- compatible : "atmel,sama5d3-nfc".
- reg : should specify the address and size used for NFC command registers,
NFC registers and NFC SRAM. NFC SRAM address and size can be absent
if don't want to use it.
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index efc8ea2..68b9160 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -67,10 +67,6 @@ struct atmel_nand_caps {
uint8_t pmecc_max_correction;
};

-struct atmel_nand_nfc_caps {
- uint32_t rb_mask;
-};
-
/*
* oob layout for large page size
* bad block info is on bytes 0 and 1
@@ -129,7 +125,6 @@ struct atmel_nfc {
/* Point to the sram bank which include readed data via NFC */
void *data_in_sram;
bool will_write_sram;
- const struct atmel_nand_nfc_caps *caps;
};
static struct atmel_nfc nand_nfc;

@@ -1715,9 +1710,9 @@ static irqreturn_t hsmc_interrupt(int irq, void *dev_id)
nfc_writel(host->nfc->hsmc_regs, IDR, NFC_SR_XFR_DONE);
ret = IRQ_HANDLED;
}
- if (pending & host->nfc->caps->rb_mask) {
+ if (pending & NFC_SR_RB_EDGE) {
complete(&host->nfc->comp_ready);
- nfc_writel(host->nfc->hsmc_regs, IDR, host->nfc->caps->rb_mask);
+ nfc_writel(host->nfc->hsmc_regs, IDR, NFC_SR_RB_EDGE);
ret = IRQ_HANDLED;
}
if (pending & NFC_SR_CMD_DONE) {
@@ -1735,7 +1730,7 @@ static void nfc_prepare_interrupt(struct atmel_nand_host *host, u32 flag)
if (flag & NFC_SR_XFR_DONE)
init_completion(&host->nfc->comp_xfer_done);

- if (flag & host->nfc->caps->rb_mask)
+ if (flag & NFC_SR_RB_EDGE)
init_completion(&host->nfc->comp_ready);

if (flag & NFC_SR_CMD_DONE)
@@ -1753,7 +1748,7 @@ static int nfc_wait_interrupt(struct atmel_nand_host *host, u32 flag)
if (flag & NFC_SR_XFR_DONE)
comp[index++] = &host->nfc->comp_xfer_done;

- if (flag & host->nfc->caps->rb_mask)
+ if (flag & NFC_SR_RB_EDGE)
comp[index++] = &host->nfc->comp_ready;

if (flag & NFC_SR_CMD_DONE)
@@ -1821,7 +1816,7 @@ static int nfc_device_ready(struct mtd_info *mtd)
dev_err(host->dev, "Lost the interrupt flags: 0x%08x\n",
mask & status);

- return status & host->nfc->caps->rb_mask;
+ return status & NFC_SR_RB_EDGE;
}

static void nfc_select_chip(struct mtd_info *mtd, int chip)
@@ -1994,8 +1989,8 @@ static void nfc_nand_command(struct mtd_info *mtd, unsigned int command,
}
/* fall through */
default:
- nfc_prepare_interrupt(host, host->nfc->caps->rb_mask);
- nfc_wait_interrupt(host, host->nfc->caps->rb_mask);
+ nfc_prepare_interrupt(host, NFC_SR_RB_EDGE);
+ nfc_wait_interrupt(host, NFC_SR_RB_EDGE);
}
}

@@ -2426,11 +2421,6 @@ static int atmel_nand_nfc_probe(struct platform_device *pdev)
}
}

- nfc->caps = (const struct atmel_nand_nfc_caps *)
- of_device_get_match_data(&pdev->dev);
- if (!nfc->caps)
- return -ENODEV;
-
nfc_writel(nfc->hsmc_regs, IDR, 0xffffffff);
nfc_readl(nfc->hsmc_regs, SR); /* clear the NFC_SR */

@@ -2459,17 +2449,8 @@ static int atmel_nand_nfc_remove(struct platform_device *pdev)
return 0;
}

-static const struct atmel_nand_nfc_caps sama5d3_nfc_caps = {
- .rb_mask = NFC_SR_RB_EDGE0,
-};
-
-static const struct atmel_nand_nfc_caps sama5d4_nfc_caps = {
- .rb_mask = NFC_SR_RB_EDGE3,
-};
-
static const struct of_device_id atmel_nand_nfc_match[] = {
- { .compatible = "atmel,sama5d3-nfc", .data = &sama5d3_nfc_caps },
- { .compatible = "atmel,sama5d4-nfc", .data = &sama5d4_nfc_caps },
+ { .compatible = "atmel,sama5d3-nfc" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, atmel_nand_nfc_match);
diff --git a/drivers/mtd/nand/atmel_nand_nfc.h b/drivers/mtd/nand/atmel_nand_nfc.h
index 0bbc1fa..4d5d262 100644
--- a/drivers/mtd/nand/atmel_nand_nfc.h
+++ b/drivers/mtd/nand/atmel_nand_nfc.h
@@ -42,8 +42,7 @@
#define NFC_SR_UNDEF (1 << 21)
#define NFC_SR_AWB (1 << 22)
#define NFC_SR_ASE (1 << 23)
-#define NFC_SR_RB_EDGE0 (1 << 24)
-#define NFC_SR_RB_EDGE3 (1 << 27)
+#define NFC_SR_RB_EDGE (1 << 24)

#define ATMEL_HSMC_NFC_IER 0x0c
#define ATMEL_HSMC_NFC_IDR 0x10
--
2.7.4

[Nicolas Ferre]

From: Wenyou Yang <wenyo...@atmel.com>

An error in documentation of the NAND Flash Controller (NFC) led to choose
another compatibility string for sama5d2 with an impact on the NAND flash
ready/busy information. It was producing the error message:

atmel_nand 80000000.nand: Time out to wait for interrupt: 0x08000000

and had an impact on performance.

So, switch back to the classical "atmel,sama5d3-nfc" compatibility string for
this SoC which gives the proper ready/busy bit information. The NAND flash
driver will be updated to remove the support for this different
implementation.

Signed-off-by: Wenyou Yang <wenyo...@atmel.com>
[nicola...@atmel.com: change commit message]
Signed-off-by: Nicolas Ferre <nicola...@atmel.com>
---
Wenyou, Romain,

I plan to send this patch for 4.6-rc as a fix tomorrow (my time). Can you
please tell me if it's okay on your side.
I revised the commit message just to justify the very late "fix" sending of
this patch...

Thanks for your help, bye.
Nicolas.

arch/arm/boot/dts/sama5d2.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi

index 78996bdbd3df..9817090c1b73 100644

--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -280,7 +280,7 @@
status = "disabled";

nfc@c0000000 {
- compatible = "atmel,sama5d4-nfc";
+ compatible = "atmel,sama5d3-nfc";
#address-cells = <1>;
#size-cells = <1>;
reg = < /* NFC Command Registers */
--

2.1.3

[Romain Izard]

2016-05-09 18:34 GMT+02:00 Nicolas Ferre <nicola...@atmel.com>:
> From: Wenyou Yang <wenyo...@atmel.com>
>
> An error in documentation of the NAND Flash Controller (NFC) led to choose
> another compatibility string for sama5d2 with an impact on the NAND flash
> ready/busy information. It was producing the error message:
>
> atmel_nand 80000000.nand: Time out to wait for interrupt: 0x08000000
>
> and had an impact on performance.
>
> So, switch back to the classical "atmel,sama5d3-nfc" compatibility string for
> this SoC which gives the proper ready/busy bit information. The NAND flash
> driver will be updated to remove the support for this different
> implementation.
>
> Signed-off-by: Wenyou Yang <wenyo...@atmel.com>
> [nicola...@atmel.com: change commit message]
> Signed-off-by: Nicolas Ferre <nicola...@atmel.com>

Acked-by: Romain Izard <romain.i...@gmail.com>

[Rob Herring]

On Mon, May 09, 2016 at 02:51:17PM +0800, Wenyou Yang wrote:
> It is a datasheet bug, for current SoCs, the RB_EDGE3(i.e. bit 27)
> of HSMC_SR register does not exist, the RB_EDGE0 (i.e. bit 24) is
> the ready/busy line edge status bit. So the compatible
> "atmel,sama5d4-nfc" is unneeded.

The compatible is needed if the SOC still exists. You can list both for
the sama5d4 if the block is the same.

Rob

[Yang, Wenyou]

> -----Original Message-----
> From: Rob Herring [mailto:ro...@kernel.org]
> Sent: 2016年5月10日 4:13
> To: Yang, Wenyou <Wenyo...@atmel.com>
> Cc: Brian Norris <computer...@gmail.com>; David Woodhouse
> <dw...@infradead.org>; Pawel Moll <pawel...@arm.com>; Mark Brown
> <bro...@kernel.org>; Ian Campbell <ijc+dev...@hellion.org.uk>; Kumar
> Gala <ga...@codeaurora.org>; linux-...@vger.kernel.org; linux-
> m...@lists.infradead.org; devic...@vger.kernel.org; Ferre, Nicolas
> <Nicola...@atmel.com>; Alexandre Belloni <alexandre.belloni@free-
> electrons.com>; Jean-Christophe Plagniol-Villard <plag...@jcrosoft.com>;
> Russell King <li...@arm.linux.org.uk>; Josh Wu <rainyf...@outlook.com>;
> linux-ar...@lists.infradead.org
> Subject: Re: [PATCH 0/2] mtd: atmel_nand: remove compatible "atmel,sama5d4-
> nfc"

The NFC IP of SAMA5D4 is same as SAMA5D2's, SAMA5D4 hase this issue. This compatible can be removed.


Best Regards,
Wenyou Yang

[Boris Brezillon]

Hi Wenyou,

Can you add NAND maintainers/reviewers in Cc next time. And since you
revert a commit, you should also add the commit author in the loop.

On Mon, 9 May 2016 14:51:18 +0800
Wenyou Yang <wenyo...@atmel.com> wrote:

> This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable
> RB_EDGE interrupts")
>
> Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR
> register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy
> line edge status bit. It is a datasheet bug.

Romain, I thought you had a real use case on sama5d4 where this patch
was needed to make the whole thing work. Not sure why you submitted this
patch if you couldn't test it on a real board.

Wenyou, can you confirm that none of the existing SoCs support more
than one "native" R/B pin?

Thanks,

Boris

Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[Yang, Wenyou]

> -----Original Message-----
> From: Boris Brezillon [mailto:boris.b...@free-electrons.com]
> Sent: 2016年5月10日 16:56
> To: Yang, Wenyou <Wenyo...@atmel.com>; Romain Izard
> <romain.i...@gmail.com>
> Cc: Brian Norris <computer...@gmail.com>; David Woodhouse
> <dw...@infradead.org>; Rob Herring <rob...@kernel.org>; Pawel Moll
> <pawel...@arm.com>; Mark Brown <bro...@kernel.org>; Ian Campbell
> <ijc+dev...@hellion.org.uk>; Kumar Gala <ga...@codeaurora.org>;

> devic...@vger.kernel.org; Russell King <li...@arm.linux.org.uk>; Josh Wu
> <rainyf...@outlook.com>; Ferre, Nicolas <Nicola...@atmel.com>;
> linux-...@vger.kernel.org; Alexandre Belloni <alexandre.belloni@free-
> electrons.com>; linu...@lists.infradead.org; Jean-Christophe Plagniol-Villard
> <plag...@jcrosoft.com>; linux-ar...@lists.infradead.org
> Subject: Re: [PATCH 1/2] Revert "mtd: atmel_nand: Support variable RB_EDGE

> interrupts"
>
> Hi Wenyou,
>
> Can you add NAND maintainers/reviewers in Cc next time. And since you revert a
> commit, you should also add the commit author in the loop.
>
> On Mon, 9 May 2016 14:51:18 +0800
> Wenyou Yang <wenyo...@atmel.com> wrote:
>
> > This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable
> > RB_EDGE interrupts")
> >
> > Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR
> > register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy
> > line edge status bit. It is a datasheet bug.
>
> Romain, I thought you had a real use case on sama5d4 where this patch was
> needed to make the whole thing work. Not sure why you submitted this patch if
> you couldn't test it on a real board.
>
> Wenyou, can you confirm that none of the existing SoCs support more than one
> "native" R/B pin?

Yes, I confirmed.

Best Regards,
Wenyou Yang

[Romain Izard]

Hi Boris,

2016-05-10 10:55 GMT+02:00 Boris Brezillon <boris.b...@free-electrons.com>:
>
> Romain, I thought you had a real use case on sama5d4 where this patch
> was needed to make the whole thing work. Not sure why you submitted
> this patch if you couldn't test it on a real board.

My target CPU is SAMA5D2, but I chose the SAMA5D4 for the compatible
string as it was the earliest design whose datasheet mentioned the
RB_EDGE3 bit.

I wrote the SAMA5D2 support in advance, as I was waiting for my board to
be ready, basing myself on what was found in the datasheet. The changes
included both the variable RB_EDGE support, and the PMECC register
layout changes, which were a prerequisite to use the SAMA5D2 NAND
controller.

I tested the code against regressions on sama5d3xek, and Wenyou reported
that he tested it on Atmel's SAMA5D2 PTC, which was the only existing
board at that time with both a SAMA5D2 SoC and a NAND chip.
Unfortunately, as the bug is only seen when writing on the flash, and it
only affects the speed of the device, he did not notice it.

I sent the patches early because I expected the submission process to
be long, and I wanted to be able to freeze the kernel version to be used
on my board as soon as possible.

Best regards,
--
Romain Izard

[Alexandre Belloni]

Well, I agree with Rob, we don't remove an existing compatible. Simply
make it do the right thing (i.e. the same as sama5d3-nfc).

--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

[Boris Brezillon]

On Mon, 9 May 2016 14:51:18 +0800
Wenyou Yang <wenyo...@atmel.com> wrote:

> This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable
> RB_EDGE interrupts")
>
> Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR
> register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy
> line edge status bit. It is a datasheet bug.
>
> Signed-off-by: Wenyou Yang <wenyo...@atmel.com>

Wenyou, I know you sent it before v4.6 was released, but now we should
probably add

Cc: <sta...@vger.kernel.org>

Brian, can you apply this patch directly in your tree (as previously
discussed, I'm not sure creating a nand/fixes branch is really useful)?

Thanks,

Boris

[Brian Norris]

Hi,

On Mon, May 23, 2016 at 09:55:57AM +0200, Boris Brezillon wrote:
> On Mon, 9 May 2016 14:51:18 +0800
> Wenyou Yang <wenyo...@atmel.com> wrote:
>
> > This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable
> > RB_EDGE interrupts")
> >
> > Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR
> > register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy
> > line edge status bit. It is a datasheet bug.
> >
> > Signed-off-by: Wenyou Yang <wenyo...@atmel.com>
>
> Wenyou, I know you sent it before v4.6 was released, but now we should
> probably add

Sorry for the delay...

> Cc: <sta...@vger.kernel.org>

Added that and a Fixes: tag.

> Brian, can you apply this patch directly in your tree (as previously
> discussed, I'm not sure creating a nand/fixes branch is really useful)?

Pushed to linux-mtd.git. I'll probably send it to Linus in the next day
or two.

Brian

[Brian Norris]

Hi,

[...]

> static const struct of_device_id atmel_nand_nfc_match[] = {
> - { .compatible = "atmel,sama5d3-nfc", .data = &sama5d3_nfc_caps },
> - { .compatible = "atmel,sama5d4-nfc", .data = &sama5d4_nfc_caps },
> + { .compatible = "atmel,sama5d3-nfc" },

Hmm, wait. Didn't Rob and Alexandre suggest that we should *not* drop
the compatible property? We could have easily supported both here, and
just not listed any different capabilities. But I see that Nicholas took
the patch anyway, so I guess it's not a big deal...

> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, atmel_nand_nfc_match);

Brian

[Boris Brezillon]

Yes, actually the compatible change was introduced and fixed in the
same release, so I don't think the stable ABI argument stands here.