Are there any HDMI-CEC related information for A10/A20 available?

[Christian Ege]

During a quick search I had not been able to find any HDMI CEC driver. In the docs available there is only one Register about CEC.

I thought about implementation of an driver and libcec support for the A20.

Regards,
Christian

[jons...@gmail.com]

I

I believe CEC is just I2C on the HDMI connector.

So maybe --- it is one of the I2C devices. Then that bit enables it
onto the HDMI pin? Just a guess.

EDID works the same way. How is it implemented?

>
> Regards,
> Christian
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[Vladimir Komendantskiy]

I'm working on a generic bit-banging CEC kernel driver for A10s/A20. Those have only one pin exposed. All control and timing is done in software according to the CEC addendum in the HDMI 1.4 specification.

This is unlike in NVidia Tegra for example which has a proper hardware CEC controller.

--Vladimir

[Chen-Yu Tsai]

Hi,

On Fri, Oct 3, 2014 at 3:29 AM, jons...@gmail.com <jons...@gmail.com> wrote:
> I
>
> On Thu, Oct 2, 2014 at 1:19 PM, Christian Ege <k42...@gmail.com> wrote:
>> During a quick search I had not been able to find any HDMI CEC driver. In
>> the docs available there is only one Register about CEC.
>>
>> I thought about implementation of an driver and libcec support for the A20.
>
> I believe CEC is just I2C on the HDMI connector.
>
> So maybe --- it is one of the I2C devices. Then that bit enables it
> onto the HDMI pin? Just a guess.
>
> EDID works the same way. How is it implemented?

You are referring to DDC. The HDMI block has a separate DDC controller.
IIRC, the DDC pins also have standard TWI muxed on them, so you could
use either one.

But this is entirely irrelevant to the original question.

As Christian stated, the HDMI block does have a register named
HDMI_HDP_CEC. However it does not contain any useful descriptions.
Also the SoC does have a pin for HDMI CEC.

Best ask Allwinner for some help.


ChenYu

[Vladimir Komendantskiy]

The Allwinner SoCs that have an HDMI pin, also have a memory-mapped HDMI-CEC register located at HDMI base 0xf1c16000 plus the offset 0x214. This register provides the following bits

#define CEC_RX     0x0100  /* phys. line value, either high or low */

#define CEC_TX     0x0200

#define CEC_ENABLE 0x0800

Other bits are unused.

I asked Allwinner about CEC once but they only replied that A10s doesn't have a hardware CEC core.

You can find examples of using the CEC register in some unfinished CEC code in the 3.4 linux-sunxi kernel.

--Vladimir

[Christian Ege]

Hi,

Am 03.10.2014 um 09:56 schrieb Vladimir Komendantskiy:

The Allwinner SoCs that have an HDMI pin, also have a memory-mapped HDMI-CEC register located at HDMI base 0xf1c16000 plus the offset 0x214. This register provides the following bits

#define CEC_RX     0x0100  /* phys. line value, either high or low */

#define CEC_TX     0x0200

#define CEC_ENABLE 0x0800

Other bits are unused.

I asked Allwinner about CEC once but they only replied that A10s doesn't have a hardware CEC core.

You can find examples of using the CEC register in some unfinished CEC code in the 3.4 linux-sunxi kernel.

Thx, a lot I found this PATCH
https://groups.google.com/forum/#!msg/linux-sunxi/cNbMiwzgGJ0/tK-KvXkn-pQJ

And the source
https://github.com/linux-sunxi/linux-sunxi/blob/sunxi-3.4/drivers/video/sunxi/hdmi/hdmi_cec.c

I'll take a closer look on this. It looks like they do bitbanging on those two bits.

regards,
Christian

[dk.u...@gmail.com]

пятница, 3 октября 2014 г., 21:12:33 UTC+3 пользователь Christian Ege написал:

so, how i can use CEC on A20?
i call:
modprobe hdmi-cec
and then no see any new devices in /dev

[David Codesido]

Hi,

sorry for bringing this thread back to live but was there any progress around with CEC and A20 chips? I can not find anything on the net so I was wondering if any of you guys managed to get any further.