Using sunxi i2s drivers interfacing an ADC

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p...@subvision.se

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Oct 20, 2017, 4:36:53 AM10/20/17
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Hi,

I'm new in this group and also pretty new with Linux, so I hope you have patience we me if I'm asking stupid questions,
I'm currently working with an Olimex A20 Lime2 board, trying to interface an 24 bit ADC (AD7768 from Analog Devices)
to the I2S interface. 

So far I have done the following:

1. I have the following drivers built into the kernel:
sunxi-i2s.ko
sunxi-i2sdma.ko
sndi2s.ko
sunxi-i2s.ko

2. The I2S interface also appears as an ALSA hardware device (#sudo arecord -l)
I have briefly tested it without anything electrically connected to it, using arecord and an oscilloscope, observing how for instance
LRCLK changes frequency when i change the sampling frequency in the call to arecord.

3. AD7768 is an 8 channel 24bit ADC. It works in I2S master mode, so I have configured my A20 as slave (I have updated the fex file).
The ADC outputs data from all channels in an interleaved manner, 32bits/channel, on the same data line (I2S_DI).
Timing looks something like the following (one LRCLK data strobe per 8 channels of data):

                    _                                                                                                                                      _
   LRCLK:  _|  |__________________________________________________________________|  |______________

               
   DIN:        --< CH1 >< CH2 >< CH3 >< CH4 >< CH5 >< CH6 >< CH7 >< CH8 >------------------------< CH1 >< CH2 >...


6. I have written a small c code that uses the alsa/asound library to interface the ADC.
My problem is that the sunxi I2S drivers only seems to support S16_LE and S24_LE format and furthermore only up to 2 channels.
Given the timing above I think I'll need S32_LE and 8 channels.

7. My guess (please correct me I'm wrong) is that I need to update the I2S drivers to accomplish this.
Being new to Linux and especially on Linux drivers, I really don't  know where to start.  
I have looked into the source code of sunxi-i2s, sunxi-i2sdma, sndi2s and sunxi-i2s and at least three of them have settings regarding
bit format and number of channels, should I change them all?

8. Furthermore I have looked into the Allwinner A20 manual and in this it's stated that the I2S interface supports 16, 20 and 24 bits resolution,
so I'm not even sure that A20 supports 32 bit data words.


Grateful for any suggestions.

Regards
Per

Andrea Venturi

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Oct 20, 2017, 7:58:45 AM10/20/17
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hi,

it looks like your ADC is working in TDM mode and not really I2S (the wires are the same but the frames are different as you can see..).

AFAIK the A10/A20 looks like (from datasheets) not being capable to do TDM; instead other Allwinner SOCs like H3 shoud be HW-wise capable. never check if the kernel driver is suitable anyway.

your kernel, then, is my second remark.. it looks like you are talking about the "legacy kernel 3.4", from Allwinner "BSP", but here i suppose you'll find more skills on mainlinux 4.x from linux-sunxi.org where there's active development for an I2S driver.

anyway it's your choice to evaluate and decide if stay with legacy or move on mainline. i can understand that if this is your first approach to linux kernel world, things could look like pretty "cloudy".. :-)

have fun!

p...@subvision.se

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Oct 23, 2017, 3:59:26 AM10/23/17
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Hi Andrea,

Thanks for your answer.
Yes, you're probably right. The data sheets for H3 and A64 explicitly specifies support for TDM, but the A20 data sheet doesn't.
And yes, I'm right now on the legacy kernel, but will also look into the mainline kernel.
As for the ADC, it also supports the SPI protocol, so I will try to get that to work instead, unless there is somebody who actually
manged to use TDM on the A20 platform.

Regards
Per

Andrea Venturi

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Oct 23, 2017, 4:32:30 AM10/23/17
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umh.

i don't think you'll be able to grab the ADC data from the SPI interface. SPI is usually the control port (to read/set registers), not the data port..

p...@subvision.se

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Oct 23, 2017, 5:14:16 AM10/23/17
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Yes, you're right, hadn't looked into the details regarding SPI for this ADC, it's only for control.

BR
Per
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