[PATCH 0/6] sunxi: H6: Enable USB (2.0) support

[Andre Przywara]

Hi,

this series enables USB support on the H6 boards. This is mostly just
adding some missing pieces here and there, the actual controller and PHY
are very similar to the previous ones, if not identical.
This is for the 2.0 ports only at the moment, USB 3.0 will be done
later (started porting Icenowy's Linux driver).
The Pine H64 shares a similar problem as the Pine64+ boards regarding
the upper USB port. To enable this port, we need the first patch
from the series [1] fixing this issue on the A64 boards.

Patch 1 is a drive-by patch to bring SUNXI_GPIO to Kconfig, as this was
lingering in one of my branches for a while.
Patch 2 enables GPIO support for the H6, as this is needed for the Pine
H64 to enable the VBUS regulator.
Patch 3 adds the clock and reset gates mappings for the USB controller and
the PHY, the values are taken from the manual and verified against
Linux.
Patch 4 adds some code to the PHY driver to skip over not implemented
PHYs, as the H6 uses a PHY0/PHY3 combination in the DT.
Patch 5 then eventually enables USB in the existing defconfigs.
Patch 6 adds the .dts fixes required to get the upper USB port to work
on the Pine H64.

Clément, can you please verify that this works for the Beelink box?
I guess the USB 2.0 port is probably the OTG one, so this setup would
look somewhat similar to the PineH64, which would allow you to copy
the USB DT nodes from there.

Cheers,
Andre.

[1] https://lists.denx.de/pipermail/u-boot/2019-May/369520.html

Andre Przywara (6):
sunxi: move SUNXI_GPIO to Kconfig
sunxi: gpio: Enable support for H6 pin controller
sunxi: clocks: Add H6 USB clock gates and resets
sunxi: phy: Add USB PHY support for Allwinner H6
sunxi: H6: Enable USB for existing boards
sunxi: Pine64: DTS: enable USB PHY 0 for HCI0

arch/arm/Kconfig | 1 +
arch/arm/dts/sun50i-h6-pine-h64.dts | 5 ++++-
arch/arm/mach-sunxi/Kconfig | 1 +
configs/beelink_gs1_defconfig | 2 ++
configs/orangepi_lite2_defconfig | 2 ++
configs/orangepi_one_plus_defconfig | 2 ++
configs/pine_h64_defconfig | 3 +++
drivers/clk/sunxi/clk_h6.c | 29 +++++++++++++++++++++++++++++
drivers/gpio/Kconfig | 6 ++++++
drivers/gpio/sunxi_gpio.c | 2 ++
drivers/phy/allwinner/phy-sun4i-usb.c | 20 ++++++++++++++++++++
include/configs/sunxi-common.h | 3 ---
scripts/config_whitelist.txt | 1 -
13 files changed, 72 insertions(+), 5 deletions(-)

--
2.14.5

[Andre Przywara]

Probably for no particular reason SUNXI_GPIO was still defined the "old
way", in header files only.

Introduce SUNXI_GPIO to the Kconfig file in drivers/gpio to remove
another line from our dreadful config_whitelist.txt.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---
arch/arm/Kconfig | 1 +
drivers/gpio/Kconfig | 6 ++++++

include/configs/sunxi-common.h | 3 ---
scripts/config_whitelist.txt | 1 -

4 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3c4af1f299..25af3c0553 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -900,6 +900,7 @@ config ARCH_SUNXI
select SPL_STACK_R if SPL
select SPL_SYS_MALLOC_SIMPLE if SPL
select SPL_SYS_THUMB_BUILD if !ARM64
+ select SUNXI_GPIO
select SYS_NS16550
select SYS_THUMB_BUILD if !ARM64
select USB if DISTRO_DEFAULTS
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index e36a8abc42..5a4d7c553e 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -205,6 +205,12 @@ config SANDBOX_GPIO_COUNT
of 'anonymous' GPIOs that do not belong to any device or bank.
Select a suitable value depending on your needs.

+config SUNXI_GPIO
+ bool "Allwinner GPIO driver"
+ depends on ARCH_SUNXI
+ help
+ Support the GPIO device in Allwinner SoCs.
+
config XILINX_GPIO
bool "Xilinx GPIO driver"
depends on DM_GPIO
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index fceb812448..7be94ee7d1 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -257,9 +257,6 @@ extern int soft_i2c_gpio_scl;
#endif
#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */

-/* GPIO */
-#define CONFIG_SUNXI_GPIO
-
#ifdef CONFIG_VIDEO_SUNXI
/*
* The amount of RAM to keep free at the top of RAM when relocating u-boot,
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index b16bc6ae34..219e2aae4d 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1924,7 +1924,6 @@ CONFIG_STV0991
CONFIG_STV0991_HZ
CONFIG_STV0991_HZ_CLOCK
CONFIG_ST_SMI
-CONFIG_SUNXI_GPIO
CONFIG_SUNXI_MAX_FB_SIZE
CONFIG_SUPERH_ON_CHIP_R8A66597
CONFIG_SUVD3
--
2.14.5

[Andre Przywara]

The Allwinner H6 pin controller is not really special, at least not when
it comes to normal GPIO operation.

Add the H6 compatible strings to the list of recognised strings, to make
GPIOs work for H6 boards.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

drivers/gpio/sunxi_gpio.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index cbed8d42b7..780c39962a 100644
--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -354,12 +354,14 @@ static const struct udevice_id sunxi_gpio_ids[] = {
ID("allwinner,sun8i-v3s-pinctrl", a_all),
ID("allwinner,sun9i-a80-pinctrl", a_all),
ID("allwinner,sun50i-a64-pinctrl", a_all),
+ ID("allwinner,sun50i-h6-pinctrl", a_all),
ID("allwinner,sun6i-a31-r-pinctrl", l_2),
ID("allwinner,sun8i-a23-r-pinctrl", l_1),
ID("allwinner,sun8i-a83t-r-pinctrl", l_1),
ID("allwinner,sun8i-h3-r-pinctrl", l_1),
ID("allwinner,sun9i-a80-r-pinctrl", l_3),
ID("allwinner,sun50i-a64-r-pinctrl", l_1),
+ ID("allwinner,sun50i-h6-r-pinctrl", l_1),
{ }
};

--
2.14.5

[Andre Przywara]

To enable USB support in U-Boot, add the required clock and reset gates
to the H6 clock driver. Once enabled, the generic EHCI/OCHI drivers will
pick them up from there automatically.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

drivers/clk/sunxi/clk_h6.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)

diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c
index 0bb00f449a..105c15d869 100644
--- a/drivers/clk/sunxi/clk_h6.c
+++ b/drivers/clk/sunxi/clk_h6.c
@@ -28,6 +28,22 @@ static struct ccu_clk_gate h6_gates[] = {
[CLK_BUS_SPI1] = GATE(0x96c, BIT(1)),

[CLK_BUS_EMAC] = GATE(0x97c, BIT(0)),
+
+ [CLK_USB_PHY0] = GATE(0xa70, BIT(29)),
+ [CLK_USB_OHCI0] = GATE(0xa70, BIT(31)),
+
+ [CLK_USB_PHY1] = GATE(0xa74, BIT(29)),
+
+ [CLK_USB_HSIC] = GATE(0xa7c, BIT(26)),
+ [CLK_USB_HSIC_12M] = GATE(0xa7c, BIT(27)),
+ [CLK_USB_PHY3] = GATE(0xa7c, BIT(29)),
+ [CLK_USB_OHCI3] = GATE(0xa7c, BIT(31)),
+
+ [CLK_BUS_OHCI0] = GATE(0xa8c, BIT(0)),
+ [CLK_BUS_OHCI3] = GATE(0xa8c, BIT(3)),
+ [CLK_BUS_EHCI0] = GATE(0xa8c, BIT(4)),
+ [CLK_BUS_EHCI3] = GATE(0xa8c, BIT(7)),
+ [CLK_BUS_OTG] = GATE(0xa8c, BIT(8)),
};

static struct ccu_reset h6_resets[] = {
@@ -43,6 +59,19 @@ static struct ccu_reset h6_resets[] = {
[RST_BUS_SPI1] = RESET(0x96c, BIT(17)),

[RST_BUS_EMAC] = RESET(0x97c, BIT(16)),
+
+ [RST_USB_PHY0] = RESET(0xa70, BIT(30)),
+
+ [RST_USB_PHY1] = RESET(0xa74, BIT(30)),
+
+ [RST_USB_HSIC] = RESET(0xa7c, BIT(28)),
+ [RST_USB_PHY3] = RESET(0xa7c, BIT(30)),
+
+ [RST_BUS_OHCI0] = RESET(0xa8c, BIT(16)),
+ [RST_BUS_OHCI3] = RESET(0xa8c, BIT(19)),
+ [RST_BUS_EHCI0] = RESET(0xa8c, BIT(20)),
+ [RST_BUS_EHCI3] = RESET(0xa8c, BIT(23)),
+ [RST_BUS_OTG] = RESET(0xa8c, BIT(24)),
};

static const struct ccu_desc h6_ccu_desc = {
--
2.14.5

[Andre Przywara]

The USB PHY used in the Allwinner H6 SoC has some pecularities (as usual),
which require a small addition to the USB PHY driver:
In this case the second PHY is PHY3, not PHY1, so we need to skip number
1 and 2 in the code. Just use the respective code from Linux for that.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

drivers/phy/allwinner/phy-sun4i-usb.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)

diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
index f206fa3f5d..5e8f87717f 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -75,6 +75,7 @@ enum sun4i_usb_phy_type {
sun8i_h3_phy,
sun8i_v3s_phy,
sun50i_a64_phy,
+ sun50i_h6_phy,
};

struct sun4i_usb_phy_cfg {
@@ -85,6 +86,7 @@ struct sun4i_usb_phy_cfg {
bool dedicated_clocks;
bool enable_pmu_unk1;
bool phy0_dual_route;
+ int missing_phys;
};

struct sun4i_usb_phy_info {
@@ -349,6 +351,9 @@ static int sun4i_usb_phy_xlate(struct phy *phy,
if (args->args_count >= data->cfg->num_phys)
return -EINVAL;

+ if (data->cfg->missing_phys & BIT(args->args[0]))
+ return -ENODEV;
+
if (args->args_count)
phy->id = args->args[0];
else
@@ -429,6 +434,9 @@ static int sun4i_usb_phy_probe(struct udevice *dev)
struct sun4i_usb_phy_info *info = &phy_info[i];
char name[16];

+ if (data->cfg->missing_phys & BIT(i))
+ continue;
+
phy->gpio_vbus = sunxi_name_to_gpio(info->gpio_vbus);
if (phy->gpio_vbus >= 0) {
ret = gpio_request(phy->gpio_vbus, "usb_vbus");
@@ -583,6 +591,17 @@ static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {
.phy0_dual_route = true,
};

+static const struct sun4i_usb_phy_cfg sun50i_h6_cfg = {
+ .num_phys = 4,
+ .type = sun50i_h6_phy,
+ .disc_thresh = 3,
+ .phyctl_offset = REG_PHYCTL_A33,
+ .dedicated_clocks = true,
+ .enable_pmu_unk1 = true,
+ .phy0_dual_route = true,
+ .missing_phys = BIT(1) | BIT(2),
+};
+
static const struct udevice_id sun4i_usb_phy_ids[] = {
{ .compatible = "allwinner,sun4i-a10-usb-phy", .data = (ulong)&sun4i_a10_cfg },
{ .compatible = "allwinner,sun5i-a13-usb-phy", .data = (ulong)&sun5i_a13_cfg },
@@ -594,6 +613,7 @@ static const struct udevice_id sun4i_usb_phy_ids[] = {
{ .compatible = "allwinner,sun8i-h3-usb-phy", .data = (ulong)&sun8i_h3_cfg },
{ .compatible = "allwinner,sun8i-v3s-usb-phy", .data = (ulong)&sun8i_v3s_cfg },
{ .compatible = "allwinner,sun50i-a64-usb-phy", .data = (ulong)&sun50i_a64_cfg},
+ { .compatible = "allwinner,sun50i-h6-usb-phy", .data = (ulong)&sun50i_h6_cfg},
{ }
};

--
2.14.5

[Andre Przywara]

So far USB was not enabled for the Allwinner H6 boards, as the PHY
driver was not ready and the clock gates were missing. Since this is now
fixed, let's add the PHY and the OHCI/EHCI drivers to the build, for
all existing H6 boards.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

arch/arm/mach-sunxi/Kconfig | 1 +
configs/beelink_gs1_defconfig | 2 ++
configs/orangepi_lite2_defconfig | 2 ++
configs/orangepi_one_plus_defconfig | 2 ++
configs/pine_h64_defconfig | 3 +++

5 files changed, 10 insertions(+)

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 1669e62a6d..ad29139545 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -300,6 +300,7 @@ config MACH_SUN50I_H6
select ARM64
select SUPPORT_SPL
select FIT
+ select PHY_SUN4I_USB
select SPL_LOAD_FIT
select DRAM_SUN50I_H6

diff --git a/configs/beelink_gs1_defconfig b/configs/beelink_gs1_defconfig
index ef4dd29549..5c0f294688 100644
--- a/configs/beelink_gs1_defconfig
+++ b/configs/beelink_gs1_defconfig
@@ -13,3 +13,5 @@ CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-beelink-gs1"
CONFIG_LED=y
CONFIG_LED_GPIO=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
diff --git a/configs/orangepi_lite2_defconfig b/configs/orangepi_lite2_defconfig
index e5c2846eaa..227e1ac873 100644
--- a/configs/orangepi_lite2_defconfig
+++ b/configs/orangepi_lite2_defconfig
@@ -11,3 +11,5 @@ CONFIG_SPL_TEXT_BASE=0x20060
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-lite2"
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
diff --git a/configs/orangepi_one_plus_defconfig b/configs/orangepi_one_plus_defconfig
index 65537c422f..2e45909e3a 100644
--- a/configs/orangepi_one_plus_defconfig
+++ b/configs/orangepi_one_plus_defconfig
@@ -11,3 +11,5 @@ CONFIG_SPL_TEXT_BASE=0x20060
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-orangepi-one-plus"
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig
index 5ac89b462c..0c5e47bbf7 100644
--- a/configs/pine_h64_defconfig
+++ b/configs/pine_h64_defconfig
@@ -12,3 +12,6 @@ CONFIG_SPL_TEXT_BASE=0x20060
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64"
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB3_VBUS_PIN="PL5"
--
2.14.5

[Andre Przywara]

The first USB controller on the H6 SoC shares a PHY with the OTG
controller. Reportedly to avoid problems with the VBUS regulator under
Linux, we don't link OHCI0/EHCI0 to the USB PHY in the H6 .dtsi file.

However on boards which can't use peripheral mode (because they have an
always-on VBUS supply on an USB-A socket) we don't need this trick, and
can properly connect host controller 0 to the PHY 0.

Amend the Pine H64 .dts to reflect this. This enables the upper USB port
in U-Boot on this board.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

arch/arm/dts/sun50i-h6-pine-h64.dts | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts b/arch/arm/dts/sun50i-h6-pine-h64.dts
index 4802902e12..aad7646b18 100644
--- a/arch/arm/dts/sun50i-h6-pine-h64.dts
+++ b/arch/arm/dts/sun50i-h6-pine-h64.dts
@@ -96,6 +96,8 @@
};

&ehci0 {
+ phys = <&usb2phy 0>;
+ phy-names = "usb";
status = "okay";
};

@@ -120,6 +122,8 @@
};

&ohci0 {
+ phys = <&usb2phy 0>;
+ phy-names = "usb";
status = "okay";
};

@@ -255,7 +259,6 @@

&usb2otg {
dr_mode = "host";
- status = "okay";
};

&usb2phy {
--
2.14.5

[Icenowy Zheng]

于 2019年5月16日 GMT+08:00 上午9:26:29, Andre Przywara <andre.p...@arm.com> 写到:

Should be l_2 because H6 has PM bank.

> { }
> };
>

--
使用 K-9 Mail 发送自我的Android设备。

[Andre Przywara]

On Thu, 16 May 2019 10:34:38 +0800
Icenowy Zheng <ice...@aosc.io> wrote:

Hi Icenowy,

thanks for having a look!

Oh, indeed, I totally missed that. Thanks for pointing this out!

Cheers,
Andre

[Jagan Teki]

Except 6/6 (it can be part of DTS sync during MW) and rest

Reviewed-by: Jagan Teki <ja...@amarulasolutions.com>

[Clément Péron]

Hi Andre,

On Tue, 18 Jun 2019 at 09:50, Jagan Teki <ja...@amarulasolutions.com> wrote:
>
> On Thu, May 16, 2019 at 6:56 AM Andre Przywara <andre.p...@arm.com> wrote:
> >
> > Hi,
> >
> > this series enables USB support on the H6 boards. This is mostly just
> > adding some missing pieces here and there, the actual controller and PHY
> > are very similar to the previous ones, if not identical.
> > This is for the 2.0 ports only at the moment, USB 3.0 will be done
> > later (started porting Icenowy's Linux driver).
> > The Pine H64 shares a similar problem as the Pine64+ boards regarding
> > the upper USB port. To enable this port, we need the first patch
> > from the series [1] fixing this issue on the A64 boards.
> >
> > Patch 1 is a drive-by patch to bring SUNXI_GPIO to Kconfig, as this was
> > lingering in one of my branches for a while.
> > Patch 2 enables GPIO support for the H6, as this is needed for the Pine
> > H64 to enable the VBUS regulator.
> > Patch 3 adds the clock and reset gates mappings for the USB controller and
> > the PHY, the values are taken from the manual and verified against
> > Linux.
> > Patch 4 adds some code to the PHY driver to skip over not implemented
> > PHYs, as the H6 uses a PHY0/PHY3 combination in the DT.
> > Patch 5 then eventually enables USB in the existing defconfigs.
> > Patch 6 adds the .dts fixes required to get the upper USB port to work
> > on the Pine H64.
> >
> > Clément, can you please verify that this works for the Beelink box?

Thank you for the notice.

Works fine on my board:
U-Boot 2019.07-rc4 (Jun 18 2019 - 19:06:21 +0200) Allwinner Technology

CPU: Allwinner H6 (SUN50I)
Model: Beelink GS1
DRAM: 2 GiB
MMC: mmc@4020000: 0, mmc@4022000: 1
Loading Environment from FAT... Unable to use mmc 1:1... In: serial@5000000
Out: serial@5000000
Err: serial@5000000
Net: No ethernet found.
starting USB...
Bus usb@5101000: USB EHCI 1.00
Bus usb@5101400: USB OHCI 1.0
scanning bus usb@5101000 for devices... 1 USB Device(s) found

Regards,
Clément

[Clément Péron]

Hi,

Maybe you should add explicit comments in the device-tree to avoid
losing this at next sync with linux dt.

Regards,
Clement

>
> &usb2phy {
> --
> 2.14.5
>

[Clément Péron]

Hi,

On Thu, 16 May 2019 at 03:27, Andre Przywara <andre.p...@arm.com> wrote:
>

> The USB PHY used in the Allwinner H6 SoC has some pecularities (as usual),

Checkpatch warning:
WARNING: 'pecularities' may be misspelled - perhaps 'peculiarities'?

[Jernej Škrabec]

Dne torek, 18. junij 2019 ob 19:13:16 CEST je Clément Péron napisal(a):

If DT change is U-Boot specific, it should be moved to *-u-boot.dtsi file,
although I'm not sure if you can delete properties in such way.

Best regards,
Jernej

[Clément Péron]

I have tested with and without the trick in usb2otg node and both seems working.
(only tested usb start; usb tree).
Why not leave it to avoid a difference with linux?

Regards,
Clément

[Chen-Yu Tsai]

You can use /delete-property/. Though in the case of "status",
it is best to set it to "disabled", since no property is the same
as "okay".

The question then becomes when the *-u-boot.dtsi file is merged in.

ChenYu

[André Przywara]

On Tue, 18 Jun 2019 19:22:34 +0200
Clément Péron <peron...@gmail.com> wrote:

Hi,

You mean dropping the status="okay"?

Yeah, I figured as well that it works both ways. Actually older kernels
require the MUSB driver to be enabled, while newer kernels don't seem to
care. As this affects the Debian Buster kernel (4.19, in the installer),
I plan on just leaving it as it is right now.

> Why not leave it to avoid a difference with linux?

Technically we should disable it, as it's not usable and might clash
with EHCI0/OHCI0, but for said reason I just keep it.

Thanks for having a look!

Cheers,
Andre.

[André Przywara]

I never planned to deviate from Linux, just wanted to provide something
that works, for now. This change should go into Linux as well, of
course. Will push this there ASAP.

Cheers,
Andre.

[André Przywara]

Thanks Jagan!
I will do some minor fixes and drop the DT part in a v2, to be send as
soon as possible.

Cheers,
Andre.

[Clément Péron]

Hi André,

I mean, I have tested with and without the whole patch and it works in
both cases.

>
> Yeah, I figured as well that it works both ways. Actually older kernels
> require the MUSB driver to be enabled, while newer kernels don't seem to
> care. As this affects the Debian Buster kernel (4.19, in the installer),
> I plan on just leaving it as it is right now.
>
> > Why not leave it to avoid a difference with linux?
>
> Technically we should disable it, as it's not usable and might clash
> with EHCI0/OHCI0, but for said reason I just keep it.

That's what I have in mind, if it's not mandatory just leave it as
this, this will avoid differences with linux.

Regards,
Clément

[Andre Przywara]

On Wed, 19 Jun 2019 10:57:14 +0200

Do you mean it works without adding "phys = <&usb2phy 0>;" to the ehci0
and ohci0 nodes?
Are you sure that USB *really* works? The boot log *always* enumerates the
bus and prints one device (the root hub), but does "usb tree" show an
actual connected device? The easiest test is to connect a pen drive, at
which point U-Boot automatically lists the USB mass storage device in the
boot log.

> > Yeah, I figured as well that it works both ways. Actually older kernels
> > require the MUSB driver to be enabled, while newer kernels don't seem to
> > care. As this affects the Debian Buster kernel (4.19, in the installer),
> > I plan on just leaving it as it is right now.
> >
> > > Why not leave it to avoid a difference with linux?
> >
> > Technically we should disable it, as it's not usable and might clash
> > with EHCI0/OHCI0, but for said reason I just keep it.
> That's what I have in mind, if it's not mandatory just leave it as
> this, this will avoid differences with linux.

There shall be no real differences with Linux, in this case I will push
those changes to Linux, so we sync this somewhat the other way.
The hardware clearly connects the USB0 controller to PHY0, the DT should
reflect this.

[Clément Péron]

HI André,

You're right, only the root hub is enumerated.
Actually the VBUS supply on my board is directly provided by the
always-on "DC Jack".
So normally this hack is not needed and the USB should work in both
case which is kind of expected.
But unfortunately it's doesn't seem to work. I have tested with a
storage usb and it's not listed :(
The TX UART of my board is not functional so it's a bit touchy to
debug the issue.
Anyway it doesn't make the board reset so it's not blocking.
I will try to investigate this later.

Regards,
Clément

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[André Przywara]

On 20/06/2019 19:01, Clément Péron wrote:

Hi Clément,

thanks for trying that!
...

Well, the power part is one thing, but quite some boards do it like this
(Pine64, for instance).
This PHY connection property is something separate, it's just needed for
U-Boot, because the driver will bail out if it cannot find a PHY. It's a
driver shortcoming, if you like, checkout ehci_setup_phy() in
drivers/usb/host/ehci-hcd.c and it's call site in
drivers/usb/host/ehci-generic.c:ehci_usb_probe().

> But unfortunately it's doesn't seem to work. I have tested with a
> storage usb and it's not listed :(

Mmmh, interesting. Does it work in Linux?
Also, did you ever try FEL booting, using this port and an A-to-A cable?
Just asking to make sure that USB 2.0 port is actually USB0, and not the
other USB 2.0 port on the SoC (USB3).

> The TX UART of my board is not functional so it's a bit touchy to
> debug the issue.

Ah, same as on the Eachlink H6 Mini, then. Did you see what Sven and I
came up with?
http://linux-sunxi.org/Eachlink_H6_Mini#Adding_a_serial_port_.28might_void_warranty.3F.29

> Anyway it doesn't make the board reset so it's not blocking.
> I will try to investigate this later.

OK, thanks!

Cheers,
Andre.

[Andre Przywara]

Hi,

a minor update to v1, adding PortM support as per Icenowy's comment and
dropping the DT change. We still need the latter for support the USB0
port on some boards, but this takes another route now (syncing back
from Linux).
---------------

This series enables USB support on the H6 boards. This is mostly just

adding some missing pieces here and there, the actual controller and PHY
are very similar to the previous ones, if not identical.

This is for the 2.0 ports only at the moment, USB 3.0 requires some more
work to make U-Boot's driver compliant to the kernel's DT bindings.

The Pine H64 shares a similar problem as the Pine64+ boards regarding

the upper USB port. To enable this port, we need a patch from Paul [1]
and changes to the DT [2]. But this is orthogonal to this series.

Patch 1 is a drive-by patch to bring SUNXI_GPIO to Kconfig, as this was
lingering in one of my branches for a while.
Patch 2 enables GPIO support for the H6, as this is needed for the Pine
H64 to enable the VBUS regulator.
Patch 3 adds the clock and reset gates mappings for the USB controller and
the PHY, the values are taken from the manual and verified against
Linux.
Patch 4 adds some code to the PHY driver to skip over not implemented
PHYs, as the H6 uses a PHY0/PHY3 combination in the DT.
Patch 5 then eventually enables USB in the existing defconfigs.

Cheers,
Andre.

[1] https://lists.denx.de/pipermail/u-boot/2019-March/361828.html
[2] http://lists.infradead.org/pipermail/linux-arm-kernel/2019-June/661580.html

Andre Przywara (5):

sunxi: move SUNXI_GPIO to Kconfig
sunxi: gpio: Enable support for H6 pin controller
sunxi: clocks: Add H6 USB clock gates and resets
sunxi: phy: Add USB PHY support for Allwinner H6
sunxi: H6: Enable USB for existing boards

arch/arm/Kconfig | 1 +

arch/arm/mach-sunxi/Kconfig | 1 +
configs/beelink_gs1_defconfig | 2 ++
configs/orangepi_lite2_defconfig | 2 ++
configs/orangepi_one_plus_defconfig | 2 ++
configs/pine_h64_defconfig | 3 +++

drivers/clk/sunxi/clk_h6.c | 29 +++++++++++++++++++++++++++++
drivers/gpio/Kconfig | 6 ++++++
drivers/gpio/sunxi_gpio.c | 2 ++
drivers/phy/allwinner/phy-sun4i-usb.c | 20 ++++++++++++++++++++

include/configs/sunxi-common.h | 3 ---
scripts/config_whitelist.txt | 1 -

12 files changed, 68 insertions(+), 4 deletions(-)

--
2.14.5

[Andre Przywara]

Probably for no particular reason SUNXI_GPIO was still defined the "old
way", in header files only.

Introduce SUNXI_GPIO to the Kconfig file in drivers/gpio to remove
another line from our dreadful config_whitelist.txt.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

arch/arm/Kconfig | 1 +
drivers/gpio/Kconfig | 6 ++++++

include/configs/sunxi-common.h | 3 ---
scripts/config_whitelist.txt | 1 -

4 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig

index 01ff57cf1b..97504e1218 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -926,6 +926,7 @@ config ARCH_SUNXI

index 22de7a4b6c..b5799cbef6 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1863,7 +1863,6 @@ CONFIG_STV0991

CONFIG_STV0991_HZ
CONFIG_STV0991_HZ_CLOCK
CONFIG_ST_SMI
-CONFIG_SUNXI_GPIO
CONFIG_SUNXI_MAX_FB_SIZE

CONFIG_SUVD3
CONFIG_SXNI855T
--
2.14.5

[Andre Przywara]

The Allwinner H6 pin controller is not really special, at least not when
it comes to normal GPIO operation.

Add the H6 compatible strings to the list of recognised strings, to make
GPIOs work for H6 boards.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

drivers/gpio/sunxi_gpio.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c

index cbed8d42b7..719efc2cef 100644

--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -354,12 +354,14 @@ static const struct udevice_id sunxi_gpio_ids[] = {
ID("allwinner,sun8i-v3s-pinctrl", a_all),
ID("allwinner,sun9i-a80-pinctrl", a_all),
ID("allwinner,sun50i-a64-pinctrl", a_all),
+ ID("allwinner,sun50i-h6-pinctrl", a_all),
ID("allwinner,sun6i-a31-r-pinctrl", l_2),
ID("allwinner,sun8i-a23-r-pinctrl", l_1),
ID("allwinner,sun8i-a83t-r-pinctrl", l_1),
ID("allwinner,sun8i-h3-r-pinctrl", l_1),
ID("allwinner,sun9i-a80-r-pinctrl", l_3),
ID("allwinner,sun50i-a64-r-pinctrl", l_1),

+ ID("allwinner,sun50i-h6-r-pinctrl", l_2),
{ }
};

--
2.14.5

[Andre Przywara]

To enable USB support in U-Boot, add the required clock and reset gates
to the H6 clock driver. Once enabled, the generic EHCI/OCHI drivers will
pick them up from there automatically.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

[Andre Przywara]

So far USB was not enabled for the Allwinner H6 boards, as the PHY
driver was not ready and the clock gates were missing. Since this is now
fixed, let's add the PHY and the OHCI/EHCI drivers to the build, for
all existing H6 boards.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

arch/arm/mach-sunxi/Kconfig | 1 +
configs/beelink_gs1_defconfig | 2 ++
configs/orangepi_lite2_defconfig | 2 ++
configs/orangepi_one_plus_defconfig | 2 ++
configs/pine_h64_defconfig | 3 +++

5 files changed, 10 insertions(+)

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 1669e62a6d..ad29139545 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -300,6 +300,7 @@ config MACH_SUN50I_H6
select ARM64
select SUPPORT_SPL
select FIT
+ select PHY_SUN4I_USB
select SPL_LOAD_FIT
select DRAM_SUN50I_H6

diff --git a/configs/beelink_gs1_defconfig b/configs/beelink_gs1_defconfig

index f16d0fee22..8458f6b32f 100644
--- a/configs/beelink_gs1_defconfig
+++ b/configs/beelink_gs1_defconfig
@@ -14,3 +14,5 @@ CONFIG_SPL_TEXT_BASE=0x20060

[Andre Przywara]

The USB PHY used in the Allwinner H6 SoC has some pecularities (as usual),

which require a small addition to the USB PHY driver:
In this case the second PHY is PHY3, not PHY1, so we need to skip number
1 and 2 in the code. Just use the respective code from Linux for that.

Signed-off-by: Andre Przywara <andre.p...@arm.com>
---

[Corentin Labbe]

Hello

I have tested your serie on a orangepi1+ and it works!

But on a pineH64 with an asix USb dongle I got:
U-Boot SPL 2019.07-rc4-00183-g6b5b853fd8-dirty (Jun 24 2019 - 10:44:19 +0200)
DRAM: 2048 MiB
Trying to boot from MMC1
NOTICE: BL31: v2.1(release):v2.1-72-g4b9d01d5
NOTICE: BL31: Built : 11:47:12, Apr 16 2019
NOTICE: BL31: Detected Allwinner H6 SoC (1728)
NOTICE: BL31: Found U-Boot DTB at 0xc07fa00, model: Pine H64
NOTICE: PMIC: Probing AXP805
NOTICE: PMIC: AXP805 detected


U-Boot 2019.07-rc4-00183-g6b5b853fd8-dirty (Jun 24 2019 - 10:44:19 +0200) Allwinner Technology

CPU: Allwinner H6 (SUN50I)
Model: Pine H64

DRAM: 2 GiB
MMC: mmc@4020000: 0, mmc@4022000: 1

Loading Environment from FAT... Card did not respond to voltage select!

In: serial@5000000
Out: serial@5000000
Err: serial@5000000
Net: No ethernet found.
starting USB...
Bus usb@5101000: USB EHCI 1.00
Bus usb@5101400: USB OHCI 1.0

Bus usb@5311000: USB EHCI 1.00
Bus usb@5311400: USB OHCI 1.0

scanning bus usb@5101000 for devices... 1 USB Device(s) found

scanning bus usb@5101400 for devices... 1 USB Device(s) found
scanning bus usb@5311000 for devices...
Warning: ax88179_eth MAC addresses don't match:
Address in ROM is 00:0e:c6:ac:f3:d0
Address in environment is 02:01:1b:e5:f7:26
2 USB Device(s) found
scanning bus usb@5311400 for devices... 1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autoboot: 0
=> dhcp
Waiting for Ethernet connection... unable to connect.
Reset Ethernet Device
Waiting for Ethernet connection... done.
BOOTP broadcast 1
EHCI timed out on TD - token=0x14008d80
Rx: failed to receive: -5
BOOTP broadcast 2
DHCP client bound to address 192.168.66.143 (6010 ms)
*** ERROR: `serverip' not set
Cannot autoload with TFTPGET

But the network is working (download kernel via tftp with success)
But I fear the EHCI timed out and co...
Could it be related to yours patchs ?

Anyway you could add
Tested-by: Corentin Labbe <clabbe....@gmail.com>

Thanks
Regards

[Clément Péron]

Hi André,

Yes complete bootlog : https://pastebin.com/2kUZR23B
I have tested with 3 USB keys and none are listed in USB Storage Devices found.

> Also, did you ever try FEL booting, using this port and an A-to-A cable?

Only with the PhoenixUsb Tools for recovering the original ROM.

> Just asking to make sure that USB 2.0 port is actually USB0, and not the
> other USB 2.0 port on the SoC (USB3).

There is only 1 USB 2.0 Port on this board and yes it's the USB0.

>
> > The TX UART of my board is not functional so it's a bit touchy to
> > debug the issue.
>
> Ah, same as on the Eachlink H6 Mini, then. Did you see what Sven and I
> came up with?
> http://linux-sunxi.org/Eachlink_H6_Mini#Adding_a_serial_port_.28might_void_warranty.3F.29

Thanks for the link but I have burnt the pin myself.
It was working at the beggining but one day I have misplugged the pins
and this GPIO is now unusable :(.
I should try to switch to the BT UART the day I really need it.

Regards,
Clément

[Jagan Teki]

Reviewed-by: Jagan Teki <ja...@amarulasolutions.com>

[Jagan Teki]

Applied to u-boot-sunix/master