[PATCH 0/3] Enable networking for BananaPi M3

[Corentin Labbe]

Hello

This serie fix building sun8i-emac for a83t and then enable networking
for BananaPi M3.

Regards

Corentin Labbe (3):
configs: Sinovoip_BPI_M3_defconfig: Fix invalid DLDO3 settings
net: sun8i-emac: bring back support of A83T
configs: Sinovoip_BPI_M3_defconfig: enable sun8i-emac

configs/Sinovoip_BPI_M3_defconfig | 3 ++-
drivers/net/sun8i_emac.c | 4 ++++
2 files changed, 6 insertions(+), 1 deletion(-)

--
2.21.0

[Corentin Labbe]

The current dldo3 voltage while sufficient for 100Mbit/s transfers is
insufficient for achieving 1Gbit/s.
In fact this problem is the same that I reported on Linux month ago.

This patch set DLDO3 to 3.3v which is needed by the PHY.

Signed-off-by: Corentin Labbe <clabbe....@gmail.com>
---
configs/Sinovoip_BPI_M3_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig
index 79743a9c9a5..b871287b6c3 100644
--- a/configs/Sinovoip_BPI_M3_defconfig
+++ b/configs/Sinovoip_BPI_M3_defconfig
@@ -22,7 +22,7 @@ CONFIG_CONSOLE_MUX=y
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-bananapi-m3"
CONFIG_AXP_DCDC5_VOLT=1200
-CONFIG_AXP_DLDO3_VOLT=2500
+CONFIG_AXP_DLDO3_VOLT=3300
CONFIG_AXP_SW_ON=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
--
2.21.0

[Corentin Labbe]

Since the BPIM3 have a sun8i-emac, this patch enables it on Sinovoip_BPI_M3_defconfig.

Signed-off-by: Corentin Labbe <clabbe....@gmail.com>
---

configs/Sinovoip_BPI_M3_defconfig | 1 +
1 file changed, 1 insertion(+)

diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig
index b871287b6c3..9db2d0708c2 100644
--- a/configs/Sinovoip_BPI_M3_defconfig
+++ b/configs/Sinovoip_BPI_M3_defconfig
@@ -28,3 +28,4 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_MUSB_HOST=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
+CONFIG_SUN8I_EMAC=y
--
2.21.0

[Corentin Labbe]

Building sun8i-emac for the A83T variant fail.
This is due to different sunxi_ccm_reg members structures of R40 and H3
not present in A83T ones.

This patch fix this problem by adding some ifdef around thses
problematic code.

Signed-off-by: Corentin Labbe <clabbe....@gmail.com>
---

drivers/net/sun8i_emac.c | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index c9798445c7d..65b32c3b967 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -643,6 +643,7 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
{
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;

+#if defined(CONFIG_MACH_SUN8I_H3)
if (priv->variant == H3_EMAC) {
/* Only H3/H5 have clock controls for internal EPHY */
if (priv->use_internal_phy) {
@@ -655,8 +656,10 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
BIT(AHB_RESET_OFFSET_EPHY));
}
}
+#endif

if (priv->variant == R40_GMAC) {
+#if defined(CONFIG_MACH_SUN8I_R40)
/* Set clock gating for emac */
setbits_le32(&ccm->ahb_reset1_cfg, BIT(AHB_RESET_OFFSET_GMAC));

@@ -669,6 +672,7 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
CCM_GMAC_CTRL_GPIT_RGMII);
setbits_le32(&ccm->gmac_clk_cfg,
CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY));
+#endif
} else {
/* Set clock gating for emac */
setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC));
--
2.21.0

[Chen-Yu Tsai]

I'm quite sure I already too care of this in

http://git.denx.de/?p=u-boot.git;a=log;h=c23b33f5311abe32db96884318996d2b41db4c94

Furthermore, sun8i-emac was already converted to use DM clocks and resets.
I think you may have a stale branch.

ChenYu

[Corentin Labbe]

i dont understand why, but my master was two month old (I was sure to have issued some git pull).

Thanks for having fixing that.

Regards