Allwinner H3 UART speed 250000 bps ?

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asdf...@gmail.com

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Sep 12, 2018, 1:46:18 PM9/12/18
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I am experiencing issues with Allwinner H3's UART. Trying to use it @ 250000 bps, but unable to established reliable communication. It works fine up to 150000 bps, but above this speed no proper communication. I tried Armbian with 4.14.65 and 4.13 Linux kernels.

Arjan van Vught

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Sep 13, 2018, 9:56:07 AM9/13/18
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This 250000 is similar to DMX. And from a baremetal programming point of view I can tell that is speed is working fine on H2+/H3 (http://www.raspberrypi-dmx.org/allwinner-h3)

- Arjan

Jernej Škrabec

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Sep 13, 2018, 10:35:22 AM9/13/18
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Dne sreda, 12. september 2018 ob 18:16:45 CEST je asdf...@gmail.com
napisal(a):
Currently, with 24 MHz clock parent, 1.5 Mbps is the highest possible rate (24
MHz / 16 / x, where x is integer number). Theoretically, it is possible to
change clock parent but I'm not sure anyone actually tried that. Such change
would also affect I2C IIRC.

Best regards,
Jernej



Arjan van Vught

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Sep 13, 2018, 11:35:32 AM9/13/18
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Op donderdag 13 september 2018 16:35:22 UTC+2 schreef Jernej Skrabec:
With baudrate = 24000000 / 16 / x = 250000, then x =  6 (UART_DLH=6, UART_DLL=0)
So with the F_24M the requested 250000 is doable. No need to change clock parent.

- Arjan

Jernej Škrabec

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Sep 13, 2018, 11:54:25 AM9/13/18
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Dne četrtek, 13. september 2018 ob 17:35:32 CEST je Arjan van Vught
napisal(a):
> Op donderdag 13 september 2018 16:35:22 UTC+2 schreef Jernej Skrabec:
> > Dne sreda, 12. september 2018 ob 18:16:45 CEST je asdf...@gmail.com
> > <javascript:>
> >
> > napisal(a):
> > > I am experiencing issues with Allwinner H3's UART. Trying to use it @
> > > 250000 bps, but unable to established reliable communication. It works
> >
> > fine
> >
> > > up to 150000 bps, but above this speed no proper communication. I tried
> > > Armbian with 4.14.65 and 4.13 Linux kernels.
> >
> > Currently, with 24 MHz clock parent, 1.5 Mbps is the highest possible rate
> > (24
> > MHz / 16 / x, where x is integer number). Theoretically, it is possible to
> > change clock parent but I'm not sure anyone actually tried that. Such
> > change
> > would also affect I2C IIRC.
> >
> > Best regards,
> > Jernej
> >
> >
> > With baudrate = 24000000 / 16 / x = 250000, then x = 6 (UART_DLH=6,
>
> UART_DLL=0)
> So with the F_24M the requested 250000 is doable. No need to change clock
> parent.

Sorry, I misread. I though 2.5 Mbps is needed.

Best regards,
Jernej

>
> - Arjan




Maksims Matjakubovs

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Sep 14, 2018, 8:35:01 AM9/14/18
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 Hello,

 Please check IRC history at http://irclog.whitequark.org/linux-sunxi .
 It's possible to get 2.5Mbps UART speed by changing UART (needed APB) parent clock source to PLL and it frequency to 40Mhz .
 I used V3s UART at speed 12.5Mbps (with parent clock 200Mhz) and it worked normally. 

Best regards,
Maksims
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