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Awesome work Jan! Could someone who understands the kernel review this patch?In the terms of performance, I have a start of a proposal for a DMA engine for LiteEth here -> https://docs.google.com/document/d/16GfKhTI6OD07oObcxq31JeKApqx4q4YHZIcNfv63gQo/edit?usp=sharingThe primary idea is that you can construct a FIFO of memory read commands and then get interrupts when various points are completed. Really need some feedback from Kernel developers if this type of DMA interface would be useful for accelerating LiteEth.
We really want to keep this DMA as simple as possible but one possible extension is to calculate CRCs as part of the DMA transfer.Tim 'mithro' Ansell
On 30 January 2018 at 10:00, Jan Schmidt <tha...@noraisin.net> wrote:
Here's a small fixup patch that makes the litex eth driver stable for me.
Performance is not stellar, as one might expect on a 50MHz CPU. With
wget, I see about 380KB/sec.
Cheers,
Jan
On 28/12/17 11:25, Joel Stanley wrote:
> Litex team,
>
> I've spent some time on the litex Ethernet driver, and with Benh's
> help I've gotten to the point where it sends and receives some but not
> all packets, and only crashes after a while.
>
> Florent, I assume the write to READER_START causes the hardware to
> take the data in the slot indicated by READER_SLOT and send it out?
> How can software learn when we can tell the hardware that the other
> slot has data?
>
> I get the TX interrupt, which I assume is when a slot has finished
> transmission. Do I need to keep track of which slot has most recently
> been sent, or is there a way to ask the hardware?
>
> Cheers,
>
> Joel
>
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