liteeth questions

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Joel Stanley

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Dec 27, 2017, 7:26:00 PM12/27/17
to linux...@googlegroups.com, Stafford Horne, Florent Kermarrec, Benjamin Herrenschmidt
Litex team,

I've spent some time on the litex Ethernet driver, and with Benh's
help I've gotten to the point where it sends and receives some but not
all packets, and only crashes after a while.

Florent, I assume the write to READER_START causes the hardware to
take the data in the slot indicated by READER_SLOT and send it out?
How can software learn when we can tell the hardware that the other
slot has data?

I get the TX interrupt, which I assume is when a slot has finished
transmission. Do I need to keep track of which slot has most recently
been sent, or is there a way to ask the hardware?

Cheers,

Joel

--

Details:

Working:
- Interrupts
- Tx packets
- Rx packets
- tftp, wget and ping work

TODO:
- Tx on both queues
- Free Tx skbs so we don't run out of memory
- udhcpc and SSH
- MDIO support. We map the memory but don't attempt to talk to it

When you run out of memory, it looks like this:

[ 2561.590000] skbuff: skb_over_panic: text:c021c280 len:64 0
[ 2561.590000] BUG: failure at net/core/skbuff.c:104/skb_panic!
[ 2561.590000] Kernel panic - not syncing: BUG!
[ 2561.590000] ---[ end Kernel panic - not syncing: BUG!

Tim 'mithro' Ansell

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Jan 5, 2018, 8:57:05 PM1/5/18
to linux...@googlegroups.com, Stafford Horne, Florent Kermarrec, Benjamin Herrenschmidt
Hi!

Was wondering how this was going? I believe that Florent replied off list?

Tim 'mithro' Ansell


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Jan Schmidt

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Jan 30, 2018, 1:00:59 PM1/30/18
to linux...@googlegroups.com, Joel Stanley, Stafford Horne, Florent Kermarrec, Benjamin Herrenschmidt
Here's a small fixup patch that makes the litex eth driver stable for me.

Performance is not stellar, as one might expect on a 50MHz CPU. With
wget, I see about 380KB/sec.

Cheers,

Jan
0001-net-ethernet-Stabilise-driver.patch

Tim 'mithro' Ansell

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Jan 30, 2018, 1:14:25 PM1/30/18
to linux...@googlegroups.com, Joel Stanley, Stafford Horne, Florent Kermarrec, Benjamin Herrenschmidt
Awesome work Jan! Could someone who understands the kernel review this patch?

In the terms of performance, I have a start of a proposal for a DMA engine for LiteEth here -> https://docs.google.com/document/d/16GfKhTI6OD07oObcxq31JeKApqx4q4YHZIcNfv63gQo/edit?usp=sharing

The primary idea is that you can construct a FIFO of memory read commands and then get interrupts when various points are completed. Really need some feedback from Kernel developers if this type of DMA interface would be useful for accelerating LiteEth.

We really want to keep this DMA as simple as possible but one possible extension is to calculate CRCs as part of the DMA transfer.

Tim 'mithro' Ansell

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Tim Ansell

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Jan 31, 2018, 2:15:26 PM1/31/18
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So ao

Tim 'mithro' Ansell

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Olof Kindgren

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Jan 31, 2018, 3:27:16 PM1/31/18
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Den tis 30 jan. 2018 19:14Tim 'mithro' Ansell <m...@mith.ro> skrev:
Awesome work Jan! Could someone who understands the kernel review this patch?

In the terms of performance, I have a start of a proposal for a DMA engine for LiteEth here -> https://docs.google.com/document/d/16GfKhTI6OD07oObcxq31JeKApqx4q4YHZIcNfv63gQo/edit?usp=sharing

The primary idea is that you can construct a FIFO of memory read commands and then get interrupts when various points are completed. Really need some feedback from Kernel developers if this type of DMA interface would be useful for accelerating LiteEth.

That sounds very much like a chained DMA (or a scatter/gather DMA). I believe there should be kernel infrastructure for that but I haven't checked

//Olof


We really want to keep this DMA as simple as possible but one possible extension is to calculate CRCs as part of the DMA transfer.

Tim 'mithro' Ansell
On 30 January 2018 at 10:00, Jan Schmidt <tha...@noraisin.net> wrote:
Here's a small fixup patch that makes the litex eth driver stable for me.

Performance is not stellar, as one might expect on a 50MHz CPU. With
wget, I see about 380KB/sec.

Cheers,

Jan


On 28/12/17 11:25, Joel Stanley wrote:
> Litex team,
>
> I've spent some time on the litex Ethernet driver, and with Benh's
> help I've gotten to the point where it sends and receives some but not
> all packets, and only crashes after a while.
>
> Florent, I assume the write to READER_START causes the hardware to
> take the data in the slot indicated by READER_SLOT and send it out?
> How can software learn when we can tell the hardware that the other
> slot has data?
>
> I get the TX interrupt, which I assume is when a slot has finished
> transmission. Do I need to keep track of which slot has most recently
> been sent, or is there a way to ask the hardware?
>
> Cheers,
>
> Joel
>

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