Serial card for Z50Bus

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Steve Cousins

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Jan 19, 2019, 11:48:51 AM1/19/19
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I've nearly completed the design of my serial card for the Z50Bus.

It contains a Z80 SIO/2 dual channel serial interface and a Z80 CTC four channel counter / timer. The CTC generates the baud rate clocks for the SIO and also provides two timers which can generate interrupts.

The card includes full support for mode 2 interrupts, including a look-ahead circuit to ensure the interrupt chain can support many devices.

I've implemented this design following the latest recommendations for Z50Bus "Standard" sized card (http://linc.no/products/z50bus/)

I will design a few more cards before getting the circuit boards fabricated, so I probably won't get to try this for a few weeks.

Comments appreciated.

Steve

Schematic_xx007_SC119-v1.0-Serial_20190119163407.pdf
SC119 v0.1 Image - top.jpg
SC119 v0.1 Image - bottom.jpg

Jon Langseth

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Jan 21, 2019, 5:07:07 AM1/21/19
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The feature that stands out to me (as, I really like it) is the address decoding. You're decoding to just the number of addresses the devices need, and there's no "ghosting". It's also locked down, so no possibility for confusion in configuration jumpers etc, and you've used a base address that's rarely used in homebrew devices. Is there any particular reason why you did the skip over 0x84-0x87?

I notice you're clocking the both of the two "upper" CTC channels from the CPU clock. Did you consider clocking channel three (CLK/TRG3) from the output of channel two (ZC/TO2)? With those two cascaded, a fairly long time period can be accurately counted (in the area of 2 seconds, if my napkin-calculation is correct). Not cascading them does of course give two independent precision general purpose counter/timers, so there are advantages to both approaches :)

Steve Cousins

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Jan 21, 2019, 6:55:54 AM1/21/19
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Agreed, it can cause long term issues for the eco system if address decoding is not kept tight.

I've reserved the address range 0x84 to 0x87 for a second SIO so the system can have 4 serial ports.

I considered various options for the 4th CTC channel but in the end decided to keep it physically simple, with no options. My design allows one CTC timer for the operating system and one for the user. I might take a different approach on the second serial card as the system and user will each already have a timer. I therefore could bring these out to headers for more 'interesting' applications. Headers could be arranged so a single jumper shunt could configure the two channels in cascade mode as you suggest.

Steve
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