lime6002 loopback problem

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Глеб Давыдов

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Sep 24, 2018, 3:52:49 AM9/24/18
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Hi!
I have two boards with lms6002. I try to start the board in loopback mode. And I get a good result on the first board, and on the second board with the same settings the data on the ADC output is overflowing.
I try change 0x64[5-2] ,but this is the best result. Before starting I rinning automatic calibration:


Calibrating LMS LPF
apply reset
0x8960
write:
0x8308
0x821f
0x8318
0x8308
0x8328
0x8308
read:
0x0000, return 1b
write:
0xb51b
0xd51b
0x8940

Calibrating LMS TX LPF modules
write:
0xd704
0x8942
0xb403
0xbf1f
0xb308
0xb328
0xb308
0xb309
0xb329
0xb309
0xbf9f
0xd784
0x8981

Calibrating LMS RX LPF modules...
write:
0x898C
0xd403
0xdf1f
0xD308
0xD328
0xD308
0xD309
0xD329
0xD309
0xdf9f
0x8984

Calibrating LMS RXVGA modules...
write:
0x8994
0xe50a
0xE600
0xE308
0xE328
0xE308
0xE437
0xE806
0xE309
0xE329
0xE309
0xE30A
0xE32A
0xE30A
0xE860
0xE30B
0xE32B
0xE30B
0xE30C
0xE32C
0xE30C
0xE436
0xE60A
0xe500
0x8900

After calibration I configure loopback:
0x853e
0x9480
0xa480
0xc403
0xf000
0xd400
0xc604
0x8820
0xd79c
0xb406
0xda20
0xb412






On the first board at the output of the ADC, I get the expected signal. (see attached board1_max.png)
On the second board at the output of the ADC, I get an overflowed signal. (see attached board2_max_new.png) I'm reducing the output level, the signal looks better, but there are problems (see attached board2_div2_new.png) Even lowering the level of the input signal, I get the expected signal.(see attached board2_div4_new.png)
I'm sure that the calibration is passing. What am I doing wrong? Why on different boards a different result?
Regards, Gleb.
board1_max.PNG
board2_div2_new.PNG
board2_max_new.PNG
board2_div4_new.PNG

Brian Padalino

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Sep 24, 2018, 9:35:28 AM9/24/18
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board2_div2_new looks like there is a stuck bit.  Check your FPGA interface and make sure all the appropriate bits are toggling?  Maybe put a ramp into the signal path and see how that behaves?

Brian
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