Selected Algorithms from KpqC Competition Round 1

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KpqC-bulletin

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Dec 6, 2023, 8:56:00 PM12/6/23
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After nearly a year of evaluation, the KpqC team is pleased to announce the algorithms that will advance to the KpqC Competition Round2.
The following are eight Round2 candidates:

 A. Digital Signature
    - AIMer
    - HAETAE
    - MQ-Sign
    - NCC-Sign

 B. PKE/KEM
    - NTRU+
    - PALOMA
    - REDOG
    - SMAUG+TiGER (merged)


We would like to thank all the Round1 submission teams for their efforts in this competition. They did have an impact on the maturation of the PQC fields in South Korea during Round1. 

We also want to thank the public reviewers for their interests in and comments on the KpqC algorithms. Better outcomes were achieved as a result of public scrutiny and analysis.
 
Lastly, we would like to thank all the people who assisted us and gave constructive comments to enhance the KpqC Round1. 

Kwangjo Kim

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Dec 7, 2023, 6:36:02 AM12/7/23
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I wonder why NTRU+ was selected to PKE/KEM which was proposed to Digital Signature. This is very weird. 
Expect reasonable justification.



2023년 12월 7일 목요일 오전 10시 56분 0초 UTC+9에 KpqC-bulletin님이 작성:

Hwajeong Seo

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Dec 7, 2023, 8:23:32 AM12/7/23
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After announcement, I used the benchmark data from Round 1 to analyze Round 2 algorithms. 

Since the benchmark is done with reference codes, the analysis is not 100% correct but it can show comparison results, roughly and briefly.

This comparison may show round 2 algorithm's strengh and weakness (in terms of implementation) and I hope all teams improve the round 2 submission by referring the brief benchmark and ranking result.

Please refer the attached file.

Thank you.

Round2.jpg

2023년 12월 7일 목요일 오전 10시 56분 0초 UTC+9에 KpqC-bulletin님이 작성:
After nearly a year of evaluation, the KpqC team is pleased to announce the algorithms that will advance to the KpqC Competition Round2.

Markus Krausz

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Jun 25, 2024, 3:46:29 AMJun 25
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The pqm4 report on the NIST additional PQC signature schemes presented at NIST's 5th standardization conference in April features implementations of HAETAE and AIMer optimized for embedded systems (Cortex-M4).
With the implemented memory optimizations, HAETAE delivers competitive performance on resource-constrained execution platforms for all parameter sets.
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