[Talk Proposal] Passthrough Device Interrupt Acceleration in Guests with AVIC
ANKIT SONI
In virtualized environments, AMD’s Advanced Virtual Interrupt Controller (AVIC) provides interrupt acceleration and can offer significant performance benefits when using passthrough devices.
In a virtual machine, each virtual CPU (vCPU) has its own virtual interrupt controller (vAPIC). The vAPIC state is stored in a memory page (vAPIC backing page), allowing hardware to directly manage interrupt state. When a passthrough device generates an interrupt, the IOMMU routes it to the vAPIC backing page. If the corresponding vCPU is currently running on a physical CPU, the IOMMU can complete interrupt delivery using a “doorbell” to that physical CPU. When the target vCPU is not currently running. For this case, the AMD IOMMU provides two notification mechanisms to alert the hypervisor:
Guest APIC Log (GALOG):
The IOMMU records interrupt information in a ring buffer and raises an interrupt to the host. The hypervisor then parses this log to schedule the targeted vCPU to handle the interrupts.
Guest APIC Posted Interrupt (GAPPI):
The IOMMU sends a direct interrupt to the host, and the hypervisor uses the updated APIC backing page to find vCPU to be woken up, avoiding the overhead of log processing.
In this talk, we will walk you through detailed mechanics of how interrupt acceleration works and explore the advantages and trade-offs of these two notification modes mentioned above.
Outline:
1. Non-accelerated interrupt delivery (baseline)
Traditional guest interrupt path and its overhead
2. Accelerated delivery with AVIC + IOMMU
How hardware assist reduces exits and latency
3. Posted interrupts and today’s GALOG design
Why posted interrupts matter and how GALOG works
4. GALOG limitations
5. GAPPI: modern alternative
High-level architecture and key design idea
6. GAPPI vs GALOG
Preferred Format: Regular Talk (25+5 min)
Speaker Bio:
- Ankit Soni – Linux kernel developer at AMD, focused on IOMMU driver development. Previously worked at Samsung on NVMe devices.
- Sairaj Kodilkar – Linux kernel developer at AMD and reviewer for QEMU (AMD IOMMU), working on virtualization and IOMMU driver development.
Best Regards,
Ankit Soni
Akshay Jindal
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Wyes Karny
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Thanks & Regards
Wyes
Sandipan Das
ANKIT SONI wrote:
> Hi,
> I’d like to propose a talk for the upcoming Bangalore Linux meetup on topic: *Passthrough Device Interrupt Acceleration in Guests with AVIC*
> Abstract:
>
> In virtualized environments, AMD’s Advanced Virtual Interrupt Controller (AVIC) provides interrupt acceleration and can offer significant performance benefits when using passthrough devices.
>
> In a virtual machine, each virtual CPU (vCPU) has its own virtual interrupt controller (vAPIC). The vAPIC state is stored in a memory page (vAPIC backing page), allowing hardware to directly manage interrupt state. When a passthrough device generates an interrupt, the IOMMU routes it to the vAPIC backing page. If the corresponding vCPU is currently running on a physical CPU, the IOMMU can complete interrupt delivery using a “doorbell” to that physical CPU. When the target vCPU is not currently running. For this case, the AMD IOMMU provides two notification mechanisms to alert the hypervisor:
>
>
>
> Guest APIC Log (GALOG):
>
> The IOMMU records interrupt information in a ring buffer and raises an interrupt to the host. The hypervisor then parses this log to schedule the targeted vCPU to handle the interrupts.
>
>
>
> Guest APIC Posted Interrupt (GAPPI):
>
> The IOMMU sends a direct interrupt to the host, and the hypervisor uses the updated APIC backing page to find vCPU to be woken up, avoiding the overhead of log processing.
>
>
>
> In this talk, we will walk you through detailed mechanics of how interrupt acceleration works and explore the advantages and trade-offs of these two notification modes mentioned above.
>
>
> Outline:
>
> 1. Non-accelerated interrupt delivery (baseline)
> Traditional guest interrupt path and its overhead
> 2. Accelerated delivery with AVIC + IOMMU
> How hardware assist reduces exits and latency
> 3. Posted interrupts and today’s GALOG design
> Why posted interrupts matter and how GALOG works
> 4. GALOG limitations
> 5. GAPPI: modern alternative
> High-level architecture and key design idea
> 6. GAPPI vs GALOG
>
>
> Preferred Format: Regular Talk (25+5 min)
>
>
> Speaker Bio:
>
> # Sairaj Kodilkar – Linux kernel developer at AMD and reviewer for QEMU (AMD IOMMU), working on virtualization and IOMMU driver development.
>
>
> Best Regards,
>
> Ankit Soni
>
> You received this message because you are subscribed to the Google Groups "Kernel Meetup Bangalore" group.
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