Himanshu Chauhan
unread,May 29, 2024, 11:34:49 PMMay 29Sign in to reply to author
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to Kernel Meetup Bangalore, santosh.s...@gmail.com, suni...@gmail.com
*Title:* ACPI and RAS support for RISC-V Architecture
*Abstract:* We will cover the ACPI specification changes and a brief
overview
of power and performance management on RISC-V architecture.
Subsequently, we will
go over the design and implementation of RAS on ACPI based RISC-V
platforms.
*Outline: *
1) ACPI for RISC-V high level overview
1.1) RISC-V Hart capabilities information
1.2) Interrupt controllers
1.3 IOMMU
1.4 NUMA
2) Power/Performance management
2.1) LPI
2.2) CPPC
3) Design of RAS for RISC-V
3.1) RAS: What and Why?
3.2) Quick RERI walkthrough
3.3) APEI specification walkthrough
3.4) Overview of error propagation and logging
3.5) Quick demo (Optional)
Regards
Himanshu and Sunil