Semiconlabs is VLSI Engineering and Training company which is an industry driven state-of-the-art training institute of excellence in various fields such as VLSI Frontend, Backend and Embedded systems, Validation and Emulation. Since its inception in 2011, 20 batches have passed out and a total of 300 students have been placed into our parent comapny Adept chips which is in to VLSI services..The curriculum of all the courses at Semiconlabs, is set in such a manner that the student has more hands on experience in his chosen field. in VLSI Design. The course involves active involvement in imparting Industry Oriented Training on contemporary VLSI Design where many of our experienced VLSI Employees from our parent company Adeptchips interact with the students on day to day bases to share their experiences and guide them in the right path to serve the current VLSI industry. Semiconlabs is proud to say that we could train 300 students and place 100% of our students into the VLSI industry through our Parent services company Adeptchips. Till now we have been training small batches of 20 and 30 students. to serve the current VLSI market our parent company needs 100 quality VLSI engineer in another 6 months so we are staring new training program where we require 100 quality Electronics and telecommunication engineers. Below are the training details. Greetings from Semiconlabs,Bangalore! We are happy to inform you that, Semiconlabs provides VLSI training for PHYSICAL DESIGN with 100% placement assistance and our screening is completely different from other training institutes. Here are the details to take the test Hurry Up !!
Limited Seats Available |
Course Duration: 6 months Course Timing : 10 AM to 6 PM Course content: Fundamental concepts in Digital abstraction, MOSFET switch, CMOS basics, Digital circuit speed, NMOS logic, CMOS logic, combinational logic, sequential logic, synchronous sequential design, timing awareness, setup/hold requirement significance, asynchronous circuits, metastability, synchronization, logic synthesis fundamentals, advanced logic synthesis (PLE based), floor planning, place & route, clock tree synthesis, signal integrity, IR-drop analysis, Static Timing Analysis, low power design techniques and so on.. Cadence tools (SoC Encounter etc.,) are used in training. The trainees get to work on realtime projects. Admission Test Syllabus: Need to qualify screening test and interview. Test would be conducted in Basic electronics, BJT, FET, CMOS, Digital Electronics, Number systems, logic gates, logic families, combinational ckt, sequential ckt, counters. (All are subjective type questions). Eligibility: B Tech ,M.Tech 2014 2015 pass outs with minimum 70%.( there should not be any career gap) Land Mark : Near Cosmos Mall Note: Recruitment for 70 Jr. Engineers 100% Placement assurance. If you are interested we will come to your college to deliver information about our training pattern, placement assistance and recruit appropriate candidates. Please Reply us regarding your Confirmation. |
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