Hi all,
SYNOPSY is recruiting fresher and experienced employees for 6 jobs in the attached file.
About SYNOPSYS: You could find more information at https://www.synopsys.com/designware-ip.html


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ASIC Digital Engineering/ASIC Digital Verification Engineering
Brief description:
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Level: 0 to 2-year experience
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Determines architecture design, logic design, test bench design, and test cases.
- Evaluates and exercises various aspects of the
development flow which may include such items as RTL development, functional simulation, constraint development, design for test logic, synthesis, timing analysis, power analysis, behavioral modeling, and verification coverage metrics.
- ASIC Digital Design Middle-end Engineer
Brief description:
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Level: 0 to 2-year experience
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Doing Logical Synthesis, understanding of digital P&R, Formal Verification.
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Analyze and verify to make sure design meet all requirements of functionality, performance, area and reliability.
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Hardware Release Engineer
Brief description:
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Level: 0 to 2-year experience
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The position is for a Mixed-Signal semiconductor Intellectual Property (MSIP) Hardware Release Engineer whose responsibility is to oversee
the customer delivery of multiple MSIP projects and assist in release related tasks
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Automation experiences in scripting language (UNIX shell scripts, TCL, Perl, Python) is considered an asset
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Tracking status of the products in the release queue; helping to debug QA issues
Please read more employment and compensation for each job in the attached file.
Salary at least 12 million / a month for freshers, depending on candidates’ competence and the other benefits.
Please email to me if you have an interest in these jobs.
Best regards,
Hung