[jallib] r1655 committed - New device files and blink samples for extended midrange PICS (18/19[L...

[jal...@googlecode.com]

Revision: 1655
Author: robhamerling
Date: Sun Feb 7 01:06:46 2010
Log: New device files and blink samples for extended midrange PICS
(18/19[L]F18/19/xx)

http://code.google.com/p/jallib/source/detail?r=1655

Added:
/trunk/include/device/16f1826.jal
/trunk/include/device/16f1827.jal
/trunk/include/device/16f1933.jal
/trunk/include/device/16f1934.jal
/trunk/include/device/16f1936.jal
/trunk/include/device/16f1937.jal
/trunk/include/device/16f1938.jal
/trunk/include/device/16f1939.jal
/trunk/include/device/16lf1826.jal
/trunk/include/device/16lf1827.jal
/trunk/include/device/16lf1933.jal
/trunk/include/device/16lf1934.jal
/trunk/include/device/16lf1936.jal
/trunk/include/device/16lf1937.jal
/trunk/include/device/16lf1938.jal
/trunk/include/device/16lf1939.jal
/trunk/sample/16f1826_blink.jal
/trunk/sample/16f1827_blink.jal
/trunk/sample/16f1933_blink.jal
/trunk/sample/16f1934_blink.jal
/trunk/sample/16f1936_blink.jal
/trunk/sample/16f1937_blink.jal
/trunk/sample/16f1938_blink.jal
/trunk/sample/16f1939_blink.jal
/trunk/sample/16lf1826_blink.jal
/trunk/sample/16lf1827_blink.jal
/trunk/sample/16lf1933_blink.jal
/trunk/sample/16lf1934_blink.jal
/trunk/sample/16lf1936_blink.jal
/trunk/sample/16lf1937_blink.jal
/trunk/sample/16lf1938_blink.jal
/trunk/sample/16lf1939_blink.jal
Modified:
/trunk/CHANGELOG
/trunk/TORELEASE
/trunk/tools/Dev2Jal.cmd

=======================================
--- /dev/null
+++ /trunk/include/device/16f1826.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1214 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16F1826
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16f1826, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16f1826.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16f1826_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x2780
+const byte PICTYPE[] = "16F1826"
+const byte DATASHEET[] = "41391"
+const byte PGMSPEC[] = "41390"
+--
+-- Vdd Range: 1.800-5.500 Nominal: 5.000
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16f1826
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 2048 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSP1IF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCL1IF at PIR2 : 3
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH3 at CPSCON1 : 3
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_P1C_RA7_direction is pin_A7_direction
+alias pin_P2A_RA7_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_CLKR_direction is pin_A6_direction
+alias pin_P1D_RA6_direction is pin_A6_direction
+alias pin_P2B_RA6_direction is pin_A6_direction
+alias pin_SDO_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_MCLR_direction is pin_A5_direction
+alias pin_VPP_direction is pin_A5_direction
+alias pin_SS1_RA5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_AN4_direction is pin_A4_direction
+alias pin_CPS4_direction is pin_A4_direction
+alias pin_C2OUT_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_SRNQ_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_CPS3_direction is pin_A3_direction
+alias pin_C12IN3_NEG_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_C1OUT_direction is pin_A3_direction
+alias pin_SRQ_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_CPS2_direction is pin_A2_direction
+alias pin_C12IN2_NEG_direction is pin_A2_direction
+alias pin_C12IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_CPS1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SS2_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_CPS0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_SDO2_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_AN6_direction is pin_B7_direction
+alias pin_CPS6_direction is pin_B7_direction
+alias pin_T1OSO_direction is pin_B7_direction
+alias pin_P1D_RB7_direction is pin_B7_direction
+alias pin_P2B_RB7_direction is pin_B7_direction
+alias pin_MDCIN1_direction is pin_B7_direction
+alias pin_ICSPDAT_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_AN5_direction is pin_B6_direction
+alias pin_CPS5_direction is pin_B6_direction
+alias pin_T1CKI_direction is pin_B6_direction
+alias pin_T1OSI_direction is pin_B6_direction
+alias pin_P1C_RB6_direction is pin_B6_direction
+alias pin_P2A_RB6_direction is pin_B6_direction
+alias pin_ICSPCLK_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN7_direction is pin_B5_direction
+alias pin_CPS7_direction is pin_B5_direction
+alias pin_P1B_direction is pin_B5_direction
+alias pin_TX_RB5_direction is pin_B5_direction
+alias pin_CK_RB5_direction is pin_B5_direction
+alias pin_SCL2_direction is pin_B5_direction
+alias pin_SS1_RB5_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN8_direction is pin_B4_direction
+alias pin_CPS8_direction is pin_B4_direction
+alias pin_SCL1_direction is pin_B4_direction
+alias pin_SCK1_direction is pin_B4_direction
+alias pin_MDCIN2_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_CPS9_direction is pin_B3_direction
+alias pin_MDOUT_direction is pin_B3_direction
+alias pin_CCP1_RB3_direction is pin_B3_direction
+alias pin_P1A_RB3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN10_direction is pin_B2_direction
+alias pin_CPS10_direction is pin_B2_direction
+alias pin_MDMIN_direction is pin_B2_direction
+alias pin_TX_RB2_direction is pin_B2_direction
+alias pin_CK_RB2_direction is pin_B2_direction
+alias pin_RX_RB2_direction is pin_B2_direction
+alias pin_DT_RB2_direction is pin_B2_direction
+alias pin_SDA2_direction is pin_B2_direction
+alias pin_SDI2_direction is pin_B2_direction
+alias pin_SDO1_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN11_direction is pin_B1_direction
+alias pin_CPS11_direction is pin_B1_direction
+alias pin_RX_RB1_direction is pin_B1_direction
+alias pin_DT_RB1_direction is pin_B1_direction
+alias pin_SDA_direction is pin_B1_direction
+alias pin_SDI1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_SRI_direction is pin_B0_direction
+alias pin_T1G_direction is pin_B0_direction
+alias pin_CCP1_RB0_direction is pin_B0_direction
+alias pin_P1A_RB0_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_FLT0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSP1IE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCL1IE at PIE2 : 3
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_P1C_RA7 is pin_A7
+alias pin_P2A_RA7 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_CLKR is pin_A6
+alias pin_P1D_RA6 is pin_A6
+alias pin_P2B_RA6 is pin_A6
+alias pin_SDO is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_AN4 is pin_A4
+alias pin_CPS4 is pin_A4
+alias pin_C2OUT is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_SRNQ is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_CPS3 is pin_A3
+alias pin_C12IN3_NEG is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_C1OUT is pin_A3
+alias pin_SRQ is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_CPS2 is pin_A2
+alias pin_C12IN2_NEG is pin_A2
+alias pin_C12IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_CPS1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SS2 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_CPS0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_SDO2 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_AN6 is pin_B7
+alias pin_CPS6 is pin_B7
+alias pin_T1OSO is pin_B7
+alias pin_P1D_RB7 is pin_B7
+alias pin_P2B_RB7 is pin_B7
+alias pin_MDCIN1 is pin_B7
+alias pin_ICSPDAT is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_AN5 is pin_B6
+alias pin_CPS5 is pin_B6
+alias pin_T1CKI is pin_B6
+alias pin_T1OSI is pin_B6
+alias pin_P1C_RB6 is pin_B6
+alias pin_P2A_RB6 is pin_B6
+alias pin_ICSPCLK is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN7 is pin_B5
+alias pin_CPS7 is pin_B5
+alias pin_P1B is pin_B5
+alias pin_TX_RB5 is pin_B5
+alias pin_CK_RB5 is pin_B5
+alias pin_SCL2 is pin_B5
+alias pin_SS1_RB5 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN8 is pin_B4
+alias pin_CPS8 is pin_B4
+alias pin_SCL1 is pin_B4
+alias pin_SCK1 is pin_B4
+alias pin_MDCIN2 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_CPS9 is pin_B3
+alias pin_MDOUT is pin_B3
+alias pin_CCP1_RB3 is pin_B3
+alias pin_P1A_RB3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN10 is pin_B2
+alias pin_CPS10 is pin_B2
+alias pin_MDMIN is pin_B2
+alias pin_TX_RB2 is pin_B2
+alias pin_CK_RB2 is pin_B2
+alias pin_RX_RB2 is pin_B2
+alias pin_DT_RB2 is pin_B2
+alias pin_SDA2 is pin_B2
+alias pin_SDI2 is pin_B2
+alias pin_SDO1 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN11 is pin_B1
+alias pin_CPS11 is pin_B1
+alias pin_RX_RB1 is pin_B1
+alias pin_DT_RB1 is pin_B1
+alias pin_SDA is pin_B1
+alias pin_SDI1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_SRI is pin_B0
+alias pin_T1G is pin_B0
+alias pin_CCP1_RB0 is pin_B0
+alias pin_P1A_RB0 is pin_B0
+alias pin_INT is pin_B0
+alias pin_FLT0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte CM1CON0 at 0x111
+var volatile bit CM1CON0_C1ON at CM1CON0 : 7
+var volatile bit CM1CON0_C1OUT at CM1CON0 : 6
+var volatile bit CM1CON0_C1OE at CM1CON0 : 5
+var volatile bit CM1CON0_C1POL at CM1CON0 : 4
+var volatile bit CM1CON0_C1SP at CM1CON0 : 2
+var volatile bit CM1CON0_C1HYS at CM1CON0 : 1
+var volatile bit CM1CON0_C1SYNC at CM1CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM1CON1 at 0x112
+var volatile bit CM1CON1_C1INTP at CM1CON1 : 7
+var volatile bit CM1CON1_C1INTN at CM1CON1 : 6
+var volatile bit CM1CON1_C1PCH1 at CM1CON1 : 5
+var volatile bit CM1CON1_C1PCH0 at CM1CON1 : 4
+var volatile bit CM1CON1_C1NCH1 at CM1CON1 : 1
+var volatile bit CM1CON1_C1NCH0 at CM1CON1 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON0 at 0x113
+var volatile bit CM2CON0_C2ON at CM2CON0 : 7
+var volatile bit CM2CON0_C2OUT at CM2CON0 : 6
+var volatile bit CM2CON0_C2OE at CM2CON0 : 5
+var volatile bit CM2CON0_C2POL at CM2CON0 : 4
+var volatile bit CM2CON0_C2SP at CM2CON0 : 2
+var volatile bit CM2CON0_C2HYS at CM2CON0 : 1
+var volatile bit CM2CON0_C2SYNC at CM2CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON1 at 0x114
+var volatile bit CM2CON1_C2INTP at CM2CON1 : 7
+var volatile bit CM2CON1_C2INTN at CM2CON1 : 6
+var volatile bit CM2CON1_C2PCH1 at CM2CON1 : 5
+var volatile bit CM2CON1_C2PCH0 at CM2CON1 : 4
+var volatile bit CM2CON1_C2NCH1 at CM2CON1 : 1
+var volatile bit CM2CON1_C2NCH0 at CM2CON1 : 0
+-- ------------------------------------------------
+var volatile byte CMOUT at 0x115
+var volatile bit CMOUT_MC2OUT at CMOUT : 1
+var volatile bit CMOUT_MC1OUT at CMOUT : 0
+-- ------------------------------------------------
+var volatile byte BORCON at 0x116
+var volatile bit BORCON_SBOREN at BORCON : 7
+var volatile bit BORCON_BORRDY at BORCON : 0
+-- ------------------------------------------------
+var volatile byte FVRCON at 0x117
+var volatile bit FVRCON_FVREN at FVRCON : 7
+var volatile bit FVRCON_FVRRDY at FVRCON : 6
+var volatile bit FVRCON_CDAFVR1 at FVRCON : 3
+var volatile bit FVRCON_CDAFVR0 at FVRCON : 2
+var volatile bit FVRCON_ADFVR1 at FVRCON : 1
+var volatile bit FVRCON_ADFVR0 at FVRCON : 0
+-- ------------------------------------------------
+var volatile byte DACCON0 at 0x118
+var volatile bit DACCON0_DACEN at DACCON0 : 7
+var volatile bit DACCON0_DACLPS at DACCON0 : 6
+var volatile bit DACCON0_DACOE at DACCON0 : 5
+var volatile bit DACCON0_DACPSS1 at DACCON0 : 3
+var volatile bit DACCON0_DACPSS0 at DACCON0 : 2
+var volatile bit DACCON0_DACNSS at DACCON0 : 0
+-- ------------------------------------------------
+var volatile byte DACCON1 at 0x119
+var volatile bit DACCON1_DACR4 at DACCON1 : 4
+var volatile bit DACCON1_DACR3 at DACCON1 : 3
+var volatile bit DACCON1_DACR2 at DACCON1 : 2
+var volatile bit DACCON1_DACR1 at DACCON1 : 1
+var volatile bit DACCON1_DACR0 at DACCON1 : 0
+-- ------------------------------------------------
+var volatile byte SRCON0 at 0x11A
+var volatile bit SRCON0_SRLEN at SRCON0 : 7
+var volatile bit SRCON0_SRCLK2 at SRCON0 : 6
+var volatile bit SRCON0_SRCLK1 at SRCON0 : 5
+var volatile bit SRCON0_SRCLK0 at SRCON0 : 4
+var volatile bit SRCON0_SRQEN at SRCON0 : 3
+var volatile bit SRCON0_SRNQEN at SRCON0 : 2
+var volatile bit SRCON0_SRPS at SRCON0 : 1
+var volatile bit SRCON0_SRPR at SRCON0 : 0
+-- ------------------------------------------------
+var volatile byte SRCON1 at 0x11B
+var volatile bit SRCON1_SRSPE at SRCON1 : 7
+var volatile bit SRCON1_SRSCKE at SRCON1 : 6
+var volatile bit SRCON1_SRSC2E at SRCON1 : 5
+var volatile bit SRCON1_SRSC1E at SRCON1 : 4
+var volatile bit SRCON1_SRRPE at SRCON1 : 3
+var volatile bit SRCON1_SRRCKE at SRCON1 : 2
+var volatile bit SRCON1_SRRC2E at SRCON1 : 1
+var volatile bit SRCON1_SRRC1E at SRCON1 : 0
+-- ------------------------------------------------
+var volatile byte APFCON0 at 0x11D
+var volatile bit APFCON0_RXDTSEL at APFCON0 : 7
+var volatile bit APFCON0_SDO1SEL at APFCON0 : 6
+var volatile bit APFCON0_SS1SEL at APFCON0 : 5
+var volatile bit APFCON0_P1DSEL at APFCON0 : 2
+var volatile bit APFCON0_P1CSEL at APFCON0 : 1
+var volatile bit APFCON0_CCP1SEL at APFCON0 : 0
+-- ------------------------------------------------
+var volatile byte APFCON1 at 0x11E
+var volatile bit APFCON1_TXCKSEL at APFCON1 : 0
+-- ------------------------------------------------
+var volatile byte ANSELA at 0x18C
+var volatile bit JANSEL_ANS4 at ANSELA : 4
+var volatile bit JANSEL_ANS3 at ANSELA : 3
+var volatile bit JANSEL_ANS2 at ANSELA : 2
+var volatile bit JANSEL_ANS1 at ANSELA : 1
+var volatile bit JANSEL_ANS0 at ANSELA : 0
+-- ------------------------------------------------
+var volatile byte ANSELB at 0x18D
+var volatile bit JANSEL_ANS16 at ANSELB : 7
+var volatile bit JANSEL_ANS15 at ANSELB : 6
+var volatile bit JANSEL_ANS14 at ANSELB : 5
+var volatile bit JANSEL_ANS13 at ANSELB : 4
+var volatile bit JANSEL_ANS12 at ANSELB : 3
+var volatile bit JANSEL_ANS11 at ANSELB : 2
+var volatile bit JANSEL_ANS10 at ANSELB : 1
+-- ------------------------------------------------
+var volatile word EEADR at 0x191
+-- ------------------------------------------------
+var volatile byte EEADRL at 0x191
+-- ------------------------------------------------
+var volatile byte EEADRH at 0x192
+var volatile bit*7 EEADRH_EEADRH at EEADRH : 0
+-- ------------------------------------------------
+var volatile word EEDAT at 0x193
+-- ------------------------------------------------
+var volatile byte EEDATL at 0x193
+-- ------------------------------------------------
+var volatile byte EEDATH at 0x194
+var volatile bit*6 EEDATH_EEDATH at EEDATH : 0
+-- ------------------------------------------------
+var volatile byte EECON1 at 0x195
+var volatile bit EECON1_EEPGD at EECON1 : 7
+var volatile bit EECON1_CFGS at EECON1 : 6
+var volatile bit EECON1_LWLO at EECON1 : 5
+var volatile bit EECON1_FREE at EECON1 : 4
+var volatile bit EECON1_WRERR at EECON1 : 3
+var volatile bit EECON1_WREN at EECON1 : 2
+var volatile bit EECON1_WR at EECON1 : 1
+var volatile bit EECON1_RD at EECON1 : 0
+-- ------------------------------------------------
+var volatile byte EECON2 at 0x196
+-- ------------------------------------------------
+var volatile byte RCREG at 0x199
+-- ------------------------------------------------
+var volatile byte TXREG at 0x19A
+-- ------------------------------------------------
+var volatile byte SPBRGL at 0x19B
+alias SPBRG is SPBRGL
+-- ------------------------------------------------
+var volatile byte SPBRGH at 0x19C
+-- ------------------------------------------------
+var volatile byte RCSTA at 0x19D
+var volatile bit RCSTA_SPEN at RCSTA : 7
+var volatile bit RCSTA_RX9 at RCSTA : 6
+var volatile bit RCSTA_SREN at RCSTA : 5
+var volatile bit RCSTA_CREN at RCSTA : 4
+var volatile bit RCSTA_ADDEN at RCSTA : 3
+var volatile bit RCSTA_FERR at RCSTA : 2
+var volatile bit RCSTA_OERR at RCSTA : 1
+var volatile bit RCSTA_RX9D at RCSTA : 0
+-- ------------------------------------------------
+var volatile byte TXSTA at 0x19E
+var volatile bit TXSTA_CSRC at TXSTA : 7
+var volatile bit TXSTA_TX9 at TXSTA : 6
+var volatile bit TXSTA_TXEN at TXSTA : 5
+var volatile bit TXSTA_SYNC at TXSTA : 4
+var volatile bit TXSTA_SENDB at TXSTA : 3
+var volatile bit TXSTA_BRGH at TXSTA : 2
+var volatile bit TXSTA_TRMT at TXSTA : 1
+var volatile bit TXSTA_TX9D at TXSTA : 0
+-- ------------------------------------------------
+var volatile byte BAUDCON at 0x19F
+var volatile bit BAUDCON_ABDOVF at BAUDCON : 7
+var volatile bit BAUDCON_RCIDL at BAUDCON : 6
+var volatile bit BAUDCON_SCKP at BAUDCON : 4
+var volatile bit BAUDCON_BRG16 at BAUDCON : 3
+var volatile bit BAUDCON_WUE at BAUDCON : 1
+var volatile bit BAUDCON_ABDEN at BAUDCON : 0
+-- ------------------------------------------------
+var volatile byte WPUA at 0x20C
+var volatile bit WPUA_WPUA5 at WPUA : 5
+-- ------------------------------------------------
+var volatile byte WPUB at 0x20D
+var volatile bit WPUB_WPUB7 at WPUB : 7
+var volatile bit WPUB_WPUB6 at WPUB : 6
+var volatile bit WPUB_WPUB5 at WPUB : 5
+var volatile bit WPUB_WPUB4 at WPUB : 4
+var volatile bit WPUB_WPUB3 at WPUB : 3
+var volatile bit WPUB_WPUB2 at WPUB : 2
+var volatile bit WPUB_WPUB1 at WPUB : 1
+var volatile bit WPUB_WPUB0 at WPUB : 0
+-- ------------------------------------------------
+var volatile byte SSP1BUF at 0x211
+var volatile bit*8 SSP1BUF_SSPBUF at SSP1BUF : 0
+-- ------------------------------------------------
+var volatile byte SSP1ADD at 0x212
+var volatile bit*8 SSP1ADD_SSPADD at SSP1ADD : 0
+-- ------------------------------------------------
+var volatile byte SSP1MSK at 0x213
+var volatile bit*8 SSP1MSK_SSPMSK at SSP1MSK : 0
+-- ------------------------------------------------
+var volatile byte SSP1STAT at 0x214
+var volatile bit SSP1STAT_SMP at SSP1STAT : 7
+var volatile bit SSP1STAT_CKE at SSP1STAT : 6
+var volatile bit SSP1STAT_D at SSP1STAT : 5
+var volatile bit SSP1STAT_NA at SSP1STAT : 5
+var volatile bit SSP1STAT_P at SSP1STAT : 4
+var volatile bit SSP1STAT_S at SSP1STAT : 3
+var volatile bit SSP1STAT_R at SSP1STAT : 2
+var volatile bit SSP1STAT_NW at SSP1STAT : 2
+var volatile bit SSP1STAT_UA at SSP1STAT : 1
+var volatile bit SSP1STAT_BF at SSP1STAT : 0
+-- ------------------------------------------------
+var volatile byte SSP1CON1 at 0x215
+var volatile bit SSP1CON1_WCOL at SSP1CON1 : 7
+var volatile bit SSP1CON1_SSPOV at SSP1CON1 : 6
+var volatile bit SSP1CON1_SSPEN at SSP1CON1 : 5
+var volatile bit SSP1CON1_CKP at SSP1CON1 : 4
+var volatile bit SSP1CON1_SSPM3 at SSP1CON1 : 3
+var volatile bit SSP1CON1_SSPM2 at SSP1CON1 : 2
+var volatile bit SSP1CON1_SSPM1 at SSP1CON1 : 1
+var volatile bit SSP1CON1_SSPM0 at SSP1CON1 : 0
+-- ------------------------------------------------
+var volatile byte SSP1CON2 at 0x216
+var volatile bit SSP1CON2_GCEN at SSP1CON2 : 7
+var volatile bit SSP1CON2_ACKSTAT at SSP1CON2 : 6
+var volatile bit SSP1CON2_ACKDT at SSP1CON2 : 5
+var volatile bit SSP1CON2_ACKEN at SSP1CON2 : 4
+var volatile bit SSP1CON2_RCEN at SSP1CON2 : 3
+var volatile bit SSP1CON2_PEN at SSP1CON2 : 2
+var volatile bit SSP1CON2_RSEN at SSP1CON2 : 1
+var volatile bit SSP1CON2_SEN at SSP1CON2 : 0
+-- ------------------------------------------------
+var volatile byte SSP1CON3 at 0x217
+var volatile bit SSP1CON3_ACKTIM at SSP1CON3 : 7
+var volatile bit SSP1CON3_PCIE at SSP1CON3 : 6
+var volatile bit SSP1CON3_SCIE at SSP1CON3 : 5
+var volatile bit SSP1CON3_BOEN at SSP1CON3 : 4
+var volatile bit SSP1CON3_SDAHT at SSP1CON3 : 3
+var volatile bit SSP1CON3_SBCDE at SSP1CON3 : 2
+var volatile bit SSP1CON3_AHEN at SSP1CON3 : 1
+var volatile bit SSP1CON3_DHEN at SSP1CON3 : 0
+-- ------------------------------------------------
+var volatile byte CCPR1L at 0x291
+-- ------------------------------------------------
+var volatile byte CCPR1H at 0x292
+-- ------------------------------------------------
+var volatile byte CCP1CON at 0x293
+var volatile bit CCP1CON_P1M1 at CCP1CON : 7
+var volatile bit CCP1CON_P1M0 at CCP1CON : 6
+var volatile bit CCP1CON_DC1B1 at CCP1CON : 5
+var volatile bit CCP1CON_DC1B0 at CCP1CON : 4
+var volatile bit*2 CCP1CON_DC1B at CCP1CON : 4
+var volatile bit CCP1CON_CCP1M3 at CCP1CON : 3
+var volatile bit CCP1CON_CCP1M2 at CCP1CON : 2
+var volatile bit CCP1CON_CCP1M1 at CCP1CON : 1
+var volatile bit CCP1CON_CCP1M0 at CCP1CON : 0
+-- ------------------------------------------------
+var volatile byte PWM1CON at 0x294
+var volatile bit PWM1CON_P1RSEN at PWM1CON : 7
+var volatile bit PWM1CON_P1DC6 at PWM1CON : 6
+var volatile bit PWM1CON_P1DC5 at PWM1CON : 5
+var volatile bit PWM1CON_P1DC4 at PWM1CON : 4
+var volatile bit PWM1CON_P1DC3 at PWM1CON : 3
+var volatile bit PWM1CON_P1DC2 at PWM1CON : 2
+var volatile bit PWM1CON_P1DC1 at PWM1CON : 1
+var volatile bit PWM1CON_P1DC0 at PWM1CON : 0
+-- ------------------------------------------------
+var volatile byte CCP1AS at 0x295
+var volatile bit CCP1AS_CCP1ASE at CCP1AS : 7
+var volatile bit CCP1AS_CCP1AS2 at CCP1AS : 6
+var volatile bit CCP1AS_CCP1AS1 at CCP1AS : 5
+var volatile bit CCP1AS_CCP1AS0 at CCP1AS : 4
+var volatile bit CCP1AS_PSS1AC1 at CCP1AS : 3
+var volatile bit CCP1AS_PSS1AC0 at CCP1AS : 2
+var volatile bit CCP1AS_PSS1BD1 at CCP1AS : 1
+var volatile bit CCP1AS_PSS1BD0 at CCP1AS : 0
+-- ------------------------------------------------
+var volatile byte PSTR1CON at 0x296
+var volatile bit PSTR1CON_STR1SYNC at PSTR1CON : 4
+var volatile bit PSTR1CON_STR1D at PSTR1CON : 3
+var volatile bit PSTR1CON_STR1C at PSTR1CON : 2
+var volatile bit PSTR1CON_STR1B at PSTR1CON : 1
+var volatile bit PSTR1CON_STR1A at PSTR1CON : 0
+-- ------------------------------------------------
+var volatile byte IOCBP at 0x394
+var volatile bit IOCBP_IOCBP7 at IOCBP : 7
+var volatile bit IOCBP_IOCBP6 at IOCBP : 6
+var volatile bit IOCBP_IOCBP5 at IOCBP : 5
+var volatile bit IOCBP_IOCBP4 at IOCBP : 4
+var volatile bit IOCBP_IOCBP3 at IOCBP : 3
+var volatile bit IOCBP_IOCBP2 at IOCBP : 2
+var volatile bit IOCBP_IOCBP1 at IOCBP : 1
+var volatile bit IOCBP_IOCBP0 at IOCBP : 0
+-- ------------------------------------------------
+var volatile byte IOCBN at 0x395
+var volatile bit IOCBN_IOCBN7 at IOCBN : 7
+var volatile bit IOCBN_IOCBN6 at IOCBN : 6
+var volatile bit IOCBN_IOCBN5 at IOCBN : 5
+var volatile bit IOCBN_IOCBN4 at IOCBN : 4
+var volatile bit IOCBN_IOCBN3 at IOCBN : 3
+var volatile bit IOCBN_IOCBN2 at IOCBN : 2
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16f1827.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1401 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16F1827
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16f1827, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16f1827.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16f1827_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x27A0
+const byte PICTYPE[] = "16F1827"
+const byte DATASHEET[] = "41391"
+const byte PGMSPEC[] = "41390"
+--
+-- Vdd Range: 1.800-5.500 Nominal: 5.000
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16f1827
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 4096 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F,0x1A0-0x1EF,0x220-0x24F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSP1IF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCL1IF at PIR2 : 3
+var volatile bit PIR2_CCP2IF at PIR2 : 0
+-- ------------------------------------------------
+var volatile byte PIR3 at 0x013
+var volatile bit PIR3_CCP4IF at PIR3 : 5
+var volatile bit PIR3_CCP3IF at PIR3 : 4
+var volatile bit PIR3_TMR6IF at PIR3 : 3
+var volatile bit PIR3_TMR4IF at PIR3 : 1
+-- ------------------------------------------------
+var volatile byte PIR4 at 0x014
+var volatile bit PIR4_BCL2IF at PIR4 : 1
+var volatile bit PIR4_SSP2IF at PIR4 : 0
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH3 at CPSCON1 : 3
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_P1C_RA7_direction is pin_A7_direction
+alias pin_CCP2_RA7_direction is pin_A7_direction
+alias pin_P2A_RA7_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_CLKR_direction is pin_A6_direction
+alias pin_P1D_RA6_direction is pin_A6_direction
+alias pin_P2B_RA6_direction is pin_A6_direction
+alias pin_SDO_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_MCLR_direction is pin_A5_direction
+alias pin_VPP_direction is pin_A5_direction
+alias pin_SS1_RA5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_AN4_direction is pin_A4_direction
+alias pin_CPS4_direction is pin_A4_direction
+alias pin_C2OUT_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_CCP4_direction is pin_A4_direction
+alias pin_SRNQ_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_CPS3_direction is pin_A3_direction
+alias pin_C12IN3_NEG_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_C1OUT_direction is pin_A3_direction
+alias pin_CCP3_direction is pin_A3_direction
+alias pin_SRQ_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_CPS2_direction is pin_A2_direction
+alias pin_C12IN2_NEG_direction is pin_A2_direction
+alias pin_C12IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_CPS1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SS2_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_CPS0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_SDO2_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_AN6_direction is pin_B7_direction
+alias pin_CPS6_direction is pin_B7_direction
+alias pin_T1OSO_direction is pin_B7_direction
+alias pin_P1D_RB7_direction is pin_B7_direction
+alias pin_P2B_RB7_direction is pin_B7_direction
+alias pin_MDCIN1_direction is pin_B7_direction
+alias pin_ICSPDAT_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_AN5_direction is pin_B6_direction
+alias pin_CPS5_direction is pin_B6_direction
+alias pin_T1CKI_direction is pin_B6_direction
+alias pin_T1OSI_direction is pin_B6_direction
+alias pin_P1C_RB6_direction is pin_B6_direction
+alias pin_CCP2_RB6_direction is pin_B6_direction
+alias pin_P2A_RB6_direction is pin_B6_direction
+alias pin_ICSPCLK_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN7_direction is pin_B5_direction
+alias pin_CPS7_direction is pin_B5_direction
+alias pin_P1B_direction is pin_B5_direction
+alias pin_TX_RB5_direction is pin_B5_direction
+alias pin_CK_RB5_direction is pin_B5_direction
+alias pin_SCL2_direction is pin_B5_direction
+alias pin_SS1_RB5_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN8_direction is pin_B4_direction
+alias pin_CPS8_direction is pin_B4_direction
+alias pin_SCL1_direction is pin_B4_direction
+alias pin_SCK1_direction is pin_B4_direction
+alias pin_MDCIN2_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_CPS9_direction is pin_B3_direction
+alias pin_MDOUT_direction is pin_B3_direction
+alias pin_CCP1_RB3_direction is pin_B3_direction
+alias pin_P1A_RB3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN10_direction is pin_B2_direction
+alias pin_CPS10_direction is pin_B2_direction
+alias pin_MDMIN_direction is pin_B2_direction
+alias pin_TX_RB2_direction is pin_B2_direction
+alias pin_CK_RB2_direction is pin_B2_direction
+alias pin_RX_RB2_direction is pin_B2_direction
+alias pin_DT_RB2_direction is pin_B2_direction
+alias pin_SDA2_direction is pin_B2_direction
+alias pin_SDI2_direction is pin_B2_direction
+alias pin_SDO1_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN11_direction is pin_B1_direction
+alias pin_CPS11_direction is pin_B1_direction
+alias pin_RX_RB1_direction is pin_B1_direction
+alias pin_DT_RB1_direction is pin_B1_direction
+alias pin_SDA_direction is pin_B1_direction
+alias pin_SDI1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_SRI_direction is pin_B0_direction
+alias pin_T1G_direction is pin_B0_direction
+alias pin_CCP1_RB0_direction is pin_B0_direction
+alias pin_P1A_RB0_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_FLT0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSP1IE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCL1IE at PIE2 : 3
+var volatile bit PIE2_CCP2IE at PIE2 : 0
+-- ------------------------------------------------
+var volatile byte PIE3 at 0x093
+var volatile bit PIE3_CCP4IE at PIE3 : 5
+var volatile bit PIE3_CCP3IE at PIE3 : 4
+var volatile bit PIE3_TMR6IE at PIE3 : 3
+var volatile bit PIE3_TMR4IE at PIE3 : 1
+-- ------------------------------------------------
+var volatile byte PIE4 at 0x094
+var volatile bit PIE4_BCL2IE at PIE4 : 1
+var volatile bit PIE4_SSP2IE at PIE4 : 0
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_P1C_RA7 is pin_A7
+alias pin_CCP2_RA7 is pin_A7
+alias pin_P2A_RA7 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_CLKR is pin_A6
+alias pin_P1D_RA6 is pin_A6
+alias pin_P2B_RA6 is pin_A6
+alias pin_SDO is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_AN4 is pin_A4
+alias pin_CPS4 is pin_A4
+alias pin_C2OUT is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_CCP4 is pin_A4
+alias pin_SRNQ is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_CPS3 is pin_A3
+alias pin_C12IN3_NEG is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_C1OUT is pin_A3
+alias pin_CCP3 is pin_A3
+alias pin_SRQ is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_CPS2 is pin_A2
+alias pin_C12IN2_NEG is pin_A2
+alias pin_C12IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_CPS1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SS2 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_CPS0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_SDO2 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_AN6 is pin_B7
+alias pin_CPS6 is pin_B7
+alias pin_T1OSO is pin_B7
+alias pin_P1D_RB7 is pin_B7
+alias pin_P2B_RB7 is pin_B7
+alias pin_MDCIN1 is pin_B7
+alias pin_ICSPDAT is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_AN5 is pin_B6
+alias pin_CPS5 is pin_B6
+alias pin_T1CKI is pin_B6
+alias pin_T1OSI is pin_B6
+alias pin_P1C_RB6 is pin_B6
+alias pin_CCP2_RB6 is pin_B6
+alias pin_P2A_RB6 is pin_B6
+alias pin_ICSPCLK is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN7 is pin_B5
+alias pin_CPS7 is pin_B5
+alias pin_P1B is pin_B5
+alias pin_TX_RB5 is pin_B5
+alias pin_CK_RB5 is pin_B5
+alias pin_SCL2 is pin_B5
+alias pin_SS1_RB5 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN8 is pin_B4
+alias pin_CPS8 is pin_B4
+alias pin_SCL1 is pin_B4
+alias pin_SCK1 is pin_B4
+alias pin_MDCIN2 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_CPS9 is pin_B3
+alias pin_MDOUT is pin_B3
+alias pin_CCP1_RB3 is pin_B3
+alias pin_P1A_RB3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN10 is pin_B2
+alias pin_CPS10 is pin_B2
+alias pin_MDMIN is pin_B2
+alias pin_TX_RB2 is pin_B2
+alias pin_CK_RB2 is pin_B2
+alias pin_RX_RB2 is pin_B2
+alias pin_DT_RB2 is pin_B2
+alias pin_SDA2 is pin_B2
+alias pin_SDI2 is pin_B2
+alias pin_SDO1 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN11 is pin_B1
+alias pin_CPS11 is pin_B1
+alias pin_RX_RB1 is pin_B1
+alias pin_DT_RB1 is pin_B1
+alias pin_SDA is pin_B1
+alias pin_SDI1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_SRI is pin_B0
+alias pin_T1G is pin_B0
+alias pin_CCP1_RB0 is pin_B0
+alias pin_P1A_RB0 is pin_B0
+alias pin_INT is pin_B0
+alias pin_FLT0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte CM1CON0 at 0x111
+var volatile bit CM1CON0_C1ON at CM1CON0 : 7
+var volatile bit CM1CON0_C1OUT at CM1CON0 : 6
+var volatile bit CM1CON0_C1OE at CM1CON0 : 5
+var volatile bit CM1CON0_C1POL at CM1CON0 : 4
+var volatile bit CM1CON0_C1SP at CM1CON0 : 2
+var volatile bit CM1CON0_C1HYS at CM1CON0 : 1
+var volatile bit CM1CON0_C1SYNC at CM1CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM1CON1 at 0x112
+var volatile bit CM1CON1_C1INTP at CM1CON1 : 7
+var volatile bit CM1CON1_C1INTN at CM1CON1 : 6
+var volatile bit CM1CON1_C1PCH1 at CM1CON1 : 5
+var volatile bit CM1CON1_C1PCH0 at CM1CON1 : 4
+var volatile bit CM1CON1_C1NCH1 at CM1CON1 : 1
+var volatile bit CM1CON1_C1NCH0 at CM1CON1 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON0 at 0x113
+var volatile bit CM2CON0_C2ON at CM2CON0 : 7
+var volatile bit CM2CON0_C2OUT at CM2CON0 : 6
+var volatile bit CM2CON0_C2OE at CM2CON0 : 5
+var volatile bit CM2CON0_C2POL at CM2CON0 : 4
+var volatile bit CM2CON0_C2SP at CM2CON0 : 2
+var volatile bit CM2CON0_C2HYS at CM2CON0 : 1
+var volatile bit CM2CON0_C2SYNC at CM2CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON1 at 0x114
+var volatile bit CM2CON1_C2INTP at CM2CON1 : 7
+var volatile bit CM2CON1_C2INTN at CM2CON1 : 6
+var volatile bit CM2CON1_C2PCH1 at CM2CON1 : 5
+var volatile bit CM2CON1_C2PCH0 at CM2CON1 : 4
+var volatile bit CM2CON1_C2NCH1 at CM2CON1 : 1
+var volatile bit CM2CON1_C2NCH0 at CM2CON1 : 0
+-- ------------------------------------------------
+var volatile byte CMOUT at 0x115
+var volatile bit CMOUT_MC2OUT at CMOUT : 1
+var volatile bit CMOUT_MC1OUT at CMOUT : 0
+-- ------------------------------------------------
+var volatile byte BORCON at 0x116
+var volatile bit BORCON_SBOREN at BORCON : 7
+var volatile bit BORCON_BORRDY at BORCON : 0
+-- ------------------------------------------------
+var volatile byte FVRCON at 0x117
+var volatile bit FVRCON_FVREN at FVRCON : 7
+var volatile bit FVRCON_FVRRDY at FVRCON : 6
+var volatile bit FVRCON_CDAFVR1 at FVRCON : 3
+var volatile bit FVRCON_CDAFVR0 at FVRCON : 2
+var volatile bit FVRCON_ADFVR1 at FVRCON : 1
+var volatile bit FVRCON_ADFVR0 at FVRCON : 0
+-- ------------------------------------------------
+var volatile byte DACCON0 at 0x118
+var volatile bit DACCON0_DACEN at DACCON0 : 7
+var volatile bit DACCON0_DACLPS at DACCON0 : 6
+var volatile bit DACCON0_DACOE at DACCON0 : 5
+var volatile bit DACCON0_DACPSS1 at DACCON0 : 3
+var volatile bit DACCON0_DACPSS0 at DACCON0 : 2
+var volatile bit DACCON0_DACNSS at DACCON0 : 0
+-- ------------------------------------------------
+var volatile byte DACCON1 at 0x119
+var volatile bit DACCON1_DACR4 at DACCON1 : 4
+var volatile bit DACCON1_DACR3 at DACCON1 : 3
+var volatile bit DACCON1_DACR2 at DACCON1 : 2
+var volatile bit DACCON1_DACR1 at DACCON1 : 1
+var volatile bit DACCON1_DACR0 at DACCON1 : 0
+-- ------------------------------------------------
+var volatile byte SRCON0 at 0x11A
+var volatile bit SRCON0_SRLEN at SRCON0 : 7
+var volatile bit SRCON0_SRCLK2 at SRCON0 : 6
+var volatile bit SRCON0_SRCLK1 at SRCON0 : 5
+var volatile bit SRCON0_SRCLK0 at SRCON0 : 4
+var volatile bit SRCON0_SRQEN at SRCON0 : 3
+var volatile bit SRCON0_SRNQEN at SRCON0 : 2
+var volatile bit SRCON0_SRPS at SRCON0 : 1
+var volatile bit SRCON0_SRPR at SRCON0 : 0
+-- ------------------------------------------------
+var volatile byte SRCON1 at 0x11B
+var volatile bit SRCON1_SRSPE at SRCON1 : 7
+var volatile bit SRCON1_SRSCKE at SRCON1 : 6
+var volatile bit SRCON1_SRSC2E at SRCON1 : 5
+var volatile bit SRCON1_SRSC1E at SRCON1 : 4
+var volatile bit SRCON1_SRRPE at SRCON1 : 3
+var volatile bit SRCON1_SRRCKE at SRCON1 : 2
+var volatile bit SRCON1_SRRC2E at SRCON1 : 1
+var volatile bit SRCON1_SRRC1E at SRCON1 : 0
+-- ------------------------------------------------
+var volatile byte APFCON0 at 0x11D
+var volatile bit APFCON0_RXDTSEL at APFCON0 : 7
+var volatile bit APFCON0_SDO1SEL at APFCON0 : 6
+var volatile bit APFCON0_SS1SEL at APFCON0 : 5
+var volatile bit APFCON0_P2BSEL at APFCON0 : 4
+var volatile bit APFCON0_CCP2SEL at APFCON0 : 3
+var volatile bit APFCON0_P1DSEL at APFCON0 : 2
+var volatile bit APFCON0_P1CSEL at APFCON0 : 1
+var volatile bit APFCON0_CCP1SEL at APFCON0 : 0
+-- ------------------------------------------------
+var volatile byte APFCON1 at 0x11E
+var volatile bit APFCON1_TXCKSEL at APFCON1 : 0
+-- ------------------------------------------------
+var volatile byte ANSELA at 0x18C
+var volatile bit JANSEL_ANS4 at ANSELA : 4
+var volatile bit JANSEL_ANS3 at ANSELA : 3
+var volatile bit JANSEL_ANS2 at ANSELA : 2
+var volatile bit JANSEL_ANS1 at ANSELA : 1
+var volatile bit JANSEL_ANS0 at ANSELA : 0
+-- ------------------------------------------------
+var volatile byte ANSELB at 0x18D
+var volatile bit JANSEL_ANS16 at ANSELB : 7
+var volatile bit JANSEL_ANS15 at ANSELB : 6
+var volatile bit JANSEL_ANS14 at ANSELB : 5
+var volatile bit JANSEL_ANS13 at ANSELB : 4
+var volatile bit JANSEL_ANS12 at ANSELB : 3
+var volatile bit JANSEL_ANS11 at ANSELB : 2
+var volatile bit JANSEL_ANS10 at ANSELB : 1
+-- ------------------------------------------------
+var volatile word EEADR at 0x191
+-- ------------------------------------------------
+var volatile byte EEADRL at 0x191
+-- ------------------------------------------------
+var volatile byte EEADRH at 0x192
+var volatile bit*7 EEADRH_EEADRH at EEADRH : 0
+-- ------------------------------------------------
+var volatile word EEDAT at 0x193
+-- ------------------------------------------------
+var volatile byte EEDATL at 0x193
+-- ------------------------------------------------
+var volatile byte EEDATH at 0x194
+var volatile bit*6 EEDATH_EEDATH at EEDATH : 0
+-- ------------------------------------------------
+var volatile byte EECON1 at 0x195
+var volatile bit EECON1_EEPGD at EECON1 : 7
+var volatile bit EECON1_CFGS at EECON1 : 6
+var volatile bit EECON1_LWLO at EECON1 : 5
+var volatile bit EECON1_FREE at EECON1 : 4
+var volatile bit EECON1_WRERR at EECON1 : 3
+var volatile bit EECON1_WREN at EECON1 : 2
+var volatile bit EECON1_WR at EECON1 : 1
+var volatile bit EECON1_RD at EECON1 : 0
+-- ------------------------------------------------
+var volatile byte EECON2 at 0x196
+-- ------------------------------------------------
+var volatile byte RCREG at 0x199
+-- ------------------------------------------------
+var volatile byte TXREG at 0x19A
+-- ------------------------------------------------
+var volatile byte SPBRGL at 0x19B
+alias SPBRG is SPBRGL
+-- ------------------------------------------------
+var volatile byte SPBRGH at 0x19C
+-- ------------------------------------------------
+var volatile byte RCSTA at 0x19D
+var volatile bit RCSTA_SPEN at RCSTA : 7
+var volatile bit RCSTA_RX9 at RCSTA : 6
+var volatile bit RCSTA_SREN at RCSTA : 5
+var volatile bit RCSTA_CREN at RCSTA : 4
+var volatile bit RCSTA_ADDEN at RCSTA : 3
+var volatile bit RCSTA_FERR at RCSTA : 2
+var volatile bit RCSTA_OERR at RCSTA : 1
+var volatile bit RCSTA_RX9D at RCSTA : 0
+-- ------------------------------------------------
+var volatile byte TXSTA at 0x19E
+var volatile bit TXSTA_CSRC at TXSTA : 7
+var volatile bit TXSTA_TX9 at TXSTA : 6
+var volatile bit TXSTA_TXEN at TXSTA : 5
+var volatile bit TXSTA_SYNC at TXSTA : 4
+var volatile bit TXSTA_SENDB at TXSTA : 3
+var volatile bit TXSTA_BRGH at TXSTA : 2
+var volatile bit TXSTA_TRMT at TXSTA : 1
+var volatile bit TXSTA_TX9D at TXSTA : 0
+-- ------------------------------------------------
+var volatile byte BAUDCON at 0x19F
+var volatile bit BAUDCON_ABDOVF at BAUDCON : 7
+var volatile bit BAUDCON_RCIDL at BAUDCON : 6
+var volatile bit BAUDCON_SCKP at BAUDCON : 4
+var volatile bit BAUDCON_BRG16 at BAUDCON : 3
+var volatile bit BAUDCON_WUE at BAUDCON : 1
+var volatile bit BAUDCON_ABDEN at BAUDCON : 0
+-- ------------------------------------------------
+var volatile byte WPUA at 0x20C
+var volatile bit WPUA_WPUA5 at WPUA : 5
+-- ------------------------------------------------
+var volatile byte WPUB at 0x20D
+var volatile bit WPUB_WPUB7 at WPUB : 7
+var volatile bit WPUB_WPUB6 at WPUB : 6
+var volatile bit WPUB_WPUB5 at WPUB : 5
+var volatile bit WPUB_WPUB4 at WPUB : 4
+var volatile bit WPUB_WPUB3 at WPUB : 3
+var volatile bit WPUB_WPUB2 at WPUB : 2
+var volatile bit WPUB_WPUB1 at WPUB : 1
+var volatile bit WPUB_WPUB0 at WPUB : 0
+-- ------------------------------------------------
+var volatile byte SSP1BUF at 0x211
+var volatile bit*8 SSP1BUF_SSPBUF at SSP1BUF : 0
+-- ------------------------------------------------
+var volatile byte SSP1ADD at 0x212
+var volatile bit*8 SSP1ADD_SSPADD at SSP1ADD : 0
+-- ------------------------------------------------
+var volatile byte SSP1MSK at 0x213
+var volatile bit*8 SSP1MSK_SSPMSK at SSP1MSK : 0
+-- ------------------------------------------------
+var volatile byte SSP1STAT at 0x214
+var volatile bit SSP1STAT_SMP at SSP1STAT : 7
+var volatile bit SSP1STAT_CKE at SSP1STAT : 6
+var volatile bit SSP1STAT_D at SSP1STAT : 5
+var volatile bit SSP1STAT_NA at SSP1STAT : 5
+var volatile bit SSP1STAT_P at SSP1STAT : 4
+var volatile bit SSP1STAT_S at SSP1STAT : 3
+var volatile bit SSP1STAT_R at SSP1STAT : 2
+var volatile bit SSP1STAT_NW at SSP1STAT : 2
+var volatile bit SSP1STAT_UA at SSP1STAT : 1
+var volatile bit SSP1STAT_BF at SSP1STAT : 0
+-- ------------------------------------------------
+var volatile byte SSP1CON1 at 0x215
+var volatile bit SSP1CON1_WCOL at SSP1CON1 : 7
+var volatile bit SSP1CON1_SSPOV at SSP1CON1 : 6
+var volatile bit SSP1CON1_SSPEN at SSP1CON1 : 5
+var volatile bit SSP1CON1_CKP at SSP1CON1 : 4
+var volatile bit SSP1CON1_SSPM3 at SSP1CON1 : 3
+var volatile bit SSP1CON1_SSPM2 at SSP1CON1 : 2
+var volatile bit SSP1CON1_SSPM1 at SSP1CON1 : 1
+var volatile bit SSP1CON1_SSPM0 at SSP1CON1 : 0
+-- ------------------------------------------------
+var volatile byte SSP1CON2 at 0x216
+var volatile bit SSP1CON2_GCEN at SSP1CON2 : 7
+var volatile bit SSP1CON2_ACKSTAT at SSP1CON2 : 6
+var volatile bit SSP1CON2_ACKDT at SSP1CON2 : 5
+var volatile bit SSP1CON2_ACKEN at SSP1CON2 : 4
+var volatile bit SSP1CON2_RCEN at SSP1CON2 : 3
+var volatile bit SSP1CON2_PEN at SSP1CON2 : 2
+var volatile bit SSP1CON2_RSEN at SSP1CON2 : 1
+var volatile bit SSP1CON2_SEN at SSP1CON2 : 0
+-- ------------------------------------------------
+var volatile byte SSP1CON3 at 0x217
+var volatile bit SSP1CON3_ACKTIM at SSP1CON3 : 7
+var volatile bit SSP1CON3_PCIE at SSP1CON3 : 6
+var volatile bit SSP1CON3_SCIE at SSP1CON3 : 5
+var volatile bit SSP1CON3_BOEN at SSP1CON3 : 4
+var volatile bit SSP1CON3_SDAHT at SSP1CON3 : 3
+var volatile bit SSP1CON3_SBCDE at SSP1CON3 : 2
+var volatile bit SSP1CON3_AHEN at SSP1CON3 : 1
+var volatile bit SSP1CON3_DHEN at SSP1CON3 : 0
+-- ------------------------------------------------
+var volatile byte SSP2BUF at 0x219
+var volatile bit*8 SSP2BUF_SSPBUF at SSP2BUF : 0
+-- ------------------------------------------------
+var volatile byte SSP2ADD at 0x21A
+var volatile bit*8 SSP2ADD_SSPADD at SSP2ADD : 0
+-- ------------------------------------------------
+var volatile byte SSP2MSK at 0x21B
+var volatile bit*8 SSP2MSK_SSPMSK at SSP2MSK : 0
+-- ------------------------------------------------
+var volatile byte SSP2STAT at 0x21C
+var volatile bit SSP2STAT_SMP at SSP2STAT : 7
+var volatile bit SSP2STAT_CKE at SSP2STAT : 6
+var volatile bit SSP2STAT_D at SSP2STAT : 5
+var volatile bit SSP2STAT_NA at SSP2STAT : 5
+var volatile bit SSP2STAT_P at SSP2STAT : 4
+var volatile bit SSP2STAT_S at SSP2STAT : 3
+var volatile bit SSP2STAT_R at SSP2STAT : 2
+var volatile bit SSP2STAT_NW at SSP2STAT : 2
+var volatile bit SSP2STAT_UA at SSP2STAT : 1
+var volatile bit SSP2STAT_BF at SSP2STAT : 0
+-- ------------------------------------------------
+var volatile byte SSP2CON1 at 0x21D
+var volatile bit SSP2CON1_WCOL at SSP2CON1 : 7
+var volatile bit SSP2CON1_SSPOV at SSP2CON1 : 6
+var volatile bit SSP2CON1_SSPEN at SSP2CON1 : 5
+var volatile bit SSP2CON1_CKP at SSP2CON1 : 4
+var volatile bit SSP2CON1_SSPM3 at SSP2CON1 : 3
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16f1933.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1687 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16F1933
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16f1933, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16f1933.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16f1933_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x2300
+const byte PICTYPE[] = "16F1933"
+const byte DATASHEET[] = "41364"
+const byte PGMSPEC[] = "41360"
+--
+-- Vdd Range: 1.800-5.500 Nominal: 5.000
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16f1933
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 4096 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PORTC at 0x00E
+var volatile bit PORTC_RC7 at PORTC : 7
+var volatile bit PORTC_RC6 at PORTC : 6
+var volatile bit PORTC_RC5 at PORTC : 5
+var volatile bit PORTC_RC4 at PORTC : 4
+var volatile bit PORTC_RC3 at PORTC : 3
+var volatile bit PORTC_RC2 at PORTC : 2
+var volatile bit PORTC_RC1 at PORTC : 1
+var volatile bit PORTC_RC0 at PORTC : 0
+-- ------------------------------------------------
+var volatile byte PORTE at 0x010
+var volatile bit PORTE_RE3 at PORTE : 3
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSPIF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCLIF at PIR2 : 3
+var volatile bit PIR2_LCDIF at PIR2 : 2
+var volatile bit PIR2_CCP2IF at PIR2 : 0
+-- ------------------------------------------------
+var volatile byte PIR3 at 0x013
+var volatile bit PIR3_CCP5IF at PIR3 : 6
+var volatile bit PIR3_CCP4IF at PIR3 : 5
+var volatile bit PIR3_CCP3IF at PIR3 : 4
+var volatile bit PIR3_TMR6IF at PIR3 : 3
+var volatile bit PIR3_TMR4IF at PIR3 : 1
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRM at CPSCON0 : 6
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_SEG2_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_VCAP_RA6_direction is pin_A6_direction
+alias pin_SEG1_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_AN4_direction is pin_A5_direction
+alias pin_C2OUT_RA5_direction is pin_A5_direction
+alias pin_CPS7_direction is pin_A5_direction
+alias pin_SRNQ_RA5_direction is pin_A5_direction
+alias pin_SS_RA5_direction is pin_A5_direction
+alias pin_VCAP_RA5_direction is pin_A5_direction
+alias pin_SEG5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_C1OUT_direction is pin_A4_direction
+alias pin_CPS6_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_SRQ_direction is pin_A4_direction
+alias pin_CCP5_direction is pin_A4_direction
+alias pin_SEG4_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_C1IN_POS_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_COM3_direction is pin_A3_direction
+alias pin_SEG15_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_C2IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+alias pin_COM2_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SEG7_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_C2OUT_RA0_direction is pin_A0_direction
+alias pin_SRNQ_RA0_direction is pin_A0_direction
+alias pin_SS_RA0_direction is pin_A0_direction
+alias pin_VCAP_RA0_direction is pin_A0_direction
+alias pin_SEG12_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_ICSPDAT_direction is pin_B7_direction
+alias pin_ICDDAT_direction is pin_B7_direction
+alias pin_SEG13_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_ICSPCLK_direction is pin_B6_direction
+alias pin_ICDCLK_direction is pin_B6_direction
+alias pin_SEG14_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN13_direction is pin_B5_direction
+alias pin_CPS5_direction is pin_B5_direction
+alias pin_CCP3_RB5_direction is pin_B5_direction
+alias pin_P3A_RB5_direction is pin_B5_direction
+alias pin_T1G_RB5_direction is pin_B5_direction
+alias pin_COM1_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN11_direction is pin_B4_direction
+alias pin_CPS4_direction is pin_B4_direction
+alias pin_P1D_direction is pin_B4_direction
+alias pin_COM0_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_C12IN2_NEG_direction is pin_B3_direction
+alias pin_CPS3_direction is pin_B3_direction
+alias pin_CCP2_RB3_direction is pin_B3_direction
+alias pin_P2A_RB3_direction is pin_B3_direction
+alias pin_VLCD3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN8_direction is pin_B2_direction
+alias pin_CPS2_direction is pin_B2_direction
+alias pin_P1B_direction is pin_B2_direction
+alias pin_VLCD2_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN10_direction is pin_B1_direction
+alias pin_C12IN3_NEG_direction is pin_B1_direction
+alias pin_CPS1_direction is pin_B1_direction
+alias pin_P1C_direction is pin_B1_direction
+alias pin_VLCD1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_AN12_direction is pin_B0_direction
+alias pin_CPS0_direction is pin_B0_direction
+alias pin_CCP4_direction is pin_B0_direction
+alias pin_SRI_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_SEG0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISC at 0x08E
+var volatile byte PORTC_direction at TRISC
+--
+procedure PORTC_low_direction'put(byte in x) is
+ TRISC = (TRISC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low_direction'get() return byte is
+ return (TRISC & 0x0F)
+end function
+--
+procedure PORTC_high_direction'put(byte in x) is
+ TRISC = (TRISC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high_direction'get() return byte is
+ return (TRISC >> 4)
+end function
+--
+var volatile bit TRISC_TRISC7 at TRISC : 7
+var volatile bit pin_C7_direction at TRISC : 7
+alias pin_RX_direction is pin_C7_direction
+alias pin_DT_direction is pin_C7_direction
+alias pin_P3B_direction is pin_C7_direction
+alias pin_SEG8_direction is pin_C7_direction
+--
+var volatile bit TRISC_TRISC6 at TRISC : 6
+var volatile bit pin_C6_direction at TRISC : 6
+alias pin_TX_direction is pin_C6_direction
+alias pin_CK_direction is pin_C6_direction
+alias pin_CCP3_RC6_direction is pin_C6_direction
+alias pin_P3A_RC6_direction is pin_C6_direction
+alias pin_SEG9_direction is pin_C6_direction
+--
+var volatile bit TRISC_TRISC5 at TRISC : 5
+var volatile bit pin_C5_direction at TRISC : 5
+alias pin_SDO_direction is pin_C5_direction
+alias pin_SEG10_direction is pin_C5_direction
+--
+var volatile bit TRISC_TRISC4 at TRISC : 4
+var volatile bit pin_C4_direction at TRISC : 4
+alias pin_SDI_direction is pin_C4_direction
+alias pin_SDA_direction is pin_C4_direction
+alias pin_T1G_RC4_direction is pin_C4_direction
+alias pin_SEG11_direction is pin_C4_direction
+--
+var volatile bit TRISC_TRISC3 at TRISC : 3
+var volatile bit pin_C3_direction at TRISC : 3
+alias pin_SCK_direction is pin_C3_direction
+alias pin_SCL_direction is pin_C3_direction
+alias pin_SEG6_direction is pin_C3_direction
+--
+var volatile bit TRISC_TRISC2 at TRISC : 2
+var volatile bit pin_C2_direction at TRISC : 2
+alias pin_CCP1_direction is pin_C2_direction
+alias pin_P1A_direction is pin_C2_direction
+alias pin_SEG3_direction is pin_C2_direction
+--
+var volatile bit TRISC_TRISC1 at TRISC : 1
+var volatile bit pin_C1_direction at TRISC : 1
+alias pin_T1OSI_direction is pin_C1_direction
+alias pin_CCP2_RC1_direction is pin_C1_direction
+alias pin_P2A_RC1_direction is pin_C1_direction
+--
+var volatile bit TRISC_TRISC0 at TRISC : 0
+var volatile bit pin_C0_direction at TRISC : 0
+alias pin_T1OSO_direction is pin_C0_direction
+alias pin_T1CKI_direction is pin_C0_direction
+alias pin_P2B_direction is pin_C0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISE at 0x090
+var volatile byte PORTE_direction at TRISE
+--
+procedure PORTE_low_direction'put(byte in x) is
+ TRISE = (TRISE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low_direction'get() return byte is
+ return (TRISE & 0x0F)
+end function
+--
+procedure PORTE_high_direction'put(byte in x) is
+ TRISE = (TRISE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high_direction'get() return byte is
+ return (TRISE >> 4)
+end function
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSPIE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCLIE at PIE2 : 3
+var volatile bit PIE2_LCDIE at PIE2 : 2
+var volatile bit PIE2_CCP2IE at PIE2 : 0
+-- ------------------------------------------------
+var volatile byte PIE3 at 0x093
+var volatile bit PIE3_CCP5IE at PIE3 : 6
+var volatile bit PIE3_CCP4IE at PIE3 : 5
+var volatile bit PIE3_CCP3IE at PIE3 : 4
+var volatile bit PIE3_TMR6IE at PIE3 : 3
+var volatile bit PIE3_TMR4IE at PIE3 : 1
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_SEG2 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_VCAP_RA6 is pin_A6
+alias pin_SEG1 is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA5 at LATA : 5
+var volatile bit pin_A5 at PORTA : 5
+alias pin_AN4 is pin_A5
+alias pin_C2OUT_RA5 is pin_A5
+alias pin_CPS7 is pin_A5
+alias pin_SRNQ_RA5 is pin_A5
+alias pin_SS_RA5 is pin_A5
+alias pin_VCAP_RA5 is pin_A5
+alias pin_SEG5 is pin_A5
+--
+procedure pin_A5'put(bit in x at LATA : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_C1OUT is pin_A4
+alias pin_CPS6 is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_SRQ is pin_A4
+alias pin_CCP5 is pin_A4
+alias pin_SEG4 is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_C1IN_POS is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_COM3 is pin_A3
+alias pin_SEG15 is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_C2IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+alias pin_COM2 is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SEG7 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_C2OUT_RA0 is pin_A0
+alias pin_SRNQ_RA0 is pin_A0
+alias pin_SS_RA0 is pin_A0
+alias pin_VCAP_RA0 is pin_A0
+alias pin_SEG12 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_ICSPDAT is pin_B7
+alias pin_ICDDAT is pin_B7
+alias pin_SEG13 is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_ICSPCLK is pin_B6
+alias pin_ICDCLK is pin_B6
+alias pin_SEG14 is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN13 is pin_B5
+alias pin_CPS5 is pin_B5
+alias pin_CCP3_RB5 is pin_B5
+alias pin_P3A_RB5 is pin_B5
+alias pin_T1G_RB5 is pin_B5
+alias pin_COM1 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN11 is pin_B4
+alias pin_CPS4 is pin_B4
+alias pin_P1D is pin_B4
+alias pin_COM0 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_C12IN2_NEG is pin_B3
+alias pin_CPS3 is pin_B3
+alias pin_CCP2_RB3 is pin_B3
+alias pin_P2A_RB3 is pin_B3
+alias pin_VLCD3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN8 is pin_B2
+alias pin_CPS2 is pin_B2
+alias pin_P1B is pin_B2
+alias pin_VLCD2 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN10 is pin_B1
+alias pin_C12IN3_NEG is pin_B1
+alias pin_CPS1 is pin_B1
+alias pin_P1C is pin_B1
+alias pin_VLCD1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_AN12 is pin_B0
+alias pin_CPS0 is pin_B0
+alias pin_CCP4 is pin_B0
+alias pin_SRI is pin_B0
+alias pin_INT is pin_B0
+alias pin_SEG0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATC at 0x10E
+--
+procedure PORTC'put(byte in x) is
+ pragma inline
+ LATC = x
+end procedure
+--
+procedure PORTC_low'put(byte in x) is
+ LATC = (PORTC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low'get() return byte is
+ return (PORTC & 0x0F)
+end function
+--
+procedure PORTC_high'put(byte in x) is
+ LATC = (PORTC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high'get() return byte is
+ return (PORTC >> 4)
+end function
+--
+var volatile bit LATC_LATC7 at LATC : 7
+var volatile bit pin_C7 at PORTC : 7
+alias pin_RX is pin_C7
+alias pin_DT is pin_C7
+alias pin_P3B is pin_C7
+alias pin_SEG8 is pin_C7
+--
+procedure pin_C7'put(bit in x at LATC : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC6 at LATC : 6
+var volatile bit pin_C6 at PORTC : 6
+alias pin_TX is pin_C6
+alias pin_CK is pin_C6
+alias pin_CCP3_RC6 is pin_C6
+alias pin_P3A_RC6 is pin_C6
+alias pin_SEG9 is pin_C6
+--
+procedure pin_C6'put(bit in x at LATC : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC5 at LATC : 5
+var volatile bit pin_C5 at PORTC : 5
+alias pin_SDO is pin_C5
+alias pin_SEG10 is pin_C5
+--
+procedure pin_C5'put(bit in x at LATC : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC4 at LATC : 4
+var volatile bit pin_C4 at PORTC : 4
+alias pin_SDI is pin_C4
+alias pin_SDA is pin_C4
+alias pin_T1G_RC4 is pin_C4
+alias pin_SEG11 is pin_C4
+--
+procedure pin_C4'put(bit in x at LATC : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC3 at LATC : 3
+var volatile bit pin_C3 at PORTC : 3
+alias pin_SCK is pin_C3
+alias pin_SCL is pin_C3
+alias pin_SEG6 is pin_C3
+--
+procedure pin_C3'put(bit in x at LATC : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC2 at LATC : 2
+var volatile bit pin_C2 at PORTC : 2
+alias pin_CCP1 is pin_C2
+alias pin_P1A is pin_C2
+alias pin_SEG3 is pin_C2
+--
+procedure pin_C2'put(bit in x at LATC : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC1 at LATC : 1
+var volatile bit pin_C1 at PORTC : 1
+alias pin_T1OSI is pin_C1
+alias pin_CCP2_RC1 is pin_C1
+alias pin_P2A_RC1 is pin_C1
+--
+procedure pin_C1'put(bit in x at LATC : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC0 at LATC : 0
+var volatile bit pin_C0 at PORTC : 0
+alias pin_T1OSO is pin_C0
+alias pin_T1CKI is pin_C0
+alias pin_P2B is pin_C0
+--
+procedure pin_C0'put(bit in x at LATC : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATE at 0x110
+--
+procedure PORTE'put(byte in x) is
+ pragma inline
+ LATE = x
+end procedure
+--
+procedure PORTE_low'put(byte in x) is
+ LATE = (PORTE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low'get() return byte is
+ return (PORTE & 0x0F)
+end function
+--
+procedure PORTE_high'put(byte in x) is
+ LATE = (PORTE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high'get() return byte is
+ return (PORTE >> 4)
+end function
+--
+-- ------------------------------------------------
+var volatile byte CM1CON0 at 0x111
+var volatile bit CM1CON0_C1ON at CM1CON0 : 7
+var volatile bit CM1CON0_C1OUT at CM1CON0 : 6
+var volatile bit CM1CON0_C1OE at CM1CON0 : 5
+var volatile bit CM1CON0_C1POL at CM1CON0 : 4
+var volatile bit CM1CON0_C1SP at CM1CON0 : 2
+var volatile bit CM1CON0_C1HYS at CM1CON0 : 1
+var volatile bit CM1CON0_C1SYNC at CM1CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM1CON1 at 0x112
+var volatile bit CM1CON1_C1INTP at CM1CON1 : 7
+var volatile bit CM1CON1_C1INTN at CM1CON1 : 6
+var volatile bit CM1CON1_C1PCH1 at CM1CON1 : 5
+var volatile bit CM1CON1_C1PCH0 at CM1CON1 : 4
+var volatile bit CM1CON1_C1NCH1 at CM1CON1 : 1
+var volatile bit CM1CON1_C1NCH0 at CM1CON1 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON0 at 0x113
+var volatile bit CM2CON0_C2ON at CM2CON0 : 7
+var volatile bit CM2CON0_C2OUT at CM2CON0 : 6
+var volatile bit CM2CON0_C2OE at CM2CON0 : 5
+var volatile bit CM2CON0_C2POL at CM2CON0 : 4
+var volatile bit CM2CON0_C2SP at CM2CON0 : 2
+var volatile bit CM2CON0_C2HYS at CM2CON0 : 1
+var volatile bit CM2CON0_C2SYNC at CM2CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON1 at 0x114
+var volatile bit CM2CON1_C2INTP at CM2CON1 : 7
+var volatile bit CM2CON1_C2INTN at CM2CON1 : 6
+var volatile bit CM2CON1_C2PCH1 at CM2CON1 : 5
+var volatile bit CM2CON1_C2PCH0 at CM2CON1 : 4
+var volatile bit CM2CON1_C2NCH1 at CM2CON1 : 1
+var volatile bit CM2CON1_C2NCH0 at CM2CON1 : 0
+-- ------------------------------------------------
+var volatile byte CMOUT at 0x115
+var volatile bit CMOUT_MC2OUT at CMOUT : 1
+var volatile bit CMOUT_MC1OUT at CMOUT : 0
+-- ------------------------------------------------
+var volatile byte BORCON at 0x116
+var volatile bit BORCON_SBOREN at BORCON : 7
+var volatile bit BORCON_BORRDY at BORCON : 0
+-- ------------------------------------------------
+var volatile byte FVRCON at 0x117
+var volatile bit FVRCON_FVREN at FVRCON : 7
+var volatile bit FVRCON_FVRRDY at FVRCON : 6
+var volatile bit FVRCON_CDAFVR1 at FVRCON : 3
+var volatile bit FVRCON_CDAFVR0 at FVRCON : 2
+var volatile bit FVRCON_ADFVR1 at FVRCON : 1
+var volatile bit FVRCON_ADFVR0 at FVRCON : 0
+-- ------------------------------------------------
+var volatile byte DACCON0 at 0x118
+var volatile bit DACCON0_DACEN at DACCON0 : 7
+var volatile bit DACCON0_DACLPS at DACCON0 : 6
+var volatile bit DACCON0_DACOE at DACCON0 : 5
+var volatile bit DACCON0_DACPSS1 at DACCON0 : 3
+var volatile bit DACCON0_DACPSS0 at DACCON0 : 2
+var volatile bit DACCON0_DACNSS at DACCON0 : 0
+-- ------------------------------------------------
+var volatile byte DACCON1 at 0x119
+var volatile bit DACCON1_DACR4 at DACCON1 : 4
+var volatile bit DACCON1_DACR3 at DACCON1 : 3
+var volatile bit DACCON1_DACR2 at DACCON1 : 2
+var volatile bit DACCON1_DACR1 at DACCON1 : 1
+var volatile bit DACCON1_DACR0 at DACCON1 : 0
+-- ------------------------------------------------
+var volatile byte SRCON0 at 0x11A
+var volatile bit SRCON0_SRLEN at SRCON0 : 7
+var volatile bit SRCON0_SRCLK2 at SRCON0 : 6
+var volatile bit SRCON0_SRCLK1 at SRCON0 : 5
+var volatile bit SRCON0_SRCLK0 at SRCON0 : 4
+var volatile bit SRCON0_SRQEN at SRCON0 : 3
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16f1934.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1953 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16F1934
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16f1934, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16f1934.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16f1934_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x2340
+const byte PICTYPE[] = "16F1934"
+const byte DATASHEET[] = "41364"
+const byte PGMSPEC[] = "41360"
+--
+-- Vdd Range: 1.800-5.500 Nominal: 5.000
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16f1934
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 4096 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PORTC at 0x00E
+var volatile bit PORTC_RC7 at PORTC : 7
+var volatile bit PORTC_RC6 at PORTC : 6
+var volatile bit PORTC_RC5 at PORTC : 5
+var volatile bit PORTC_RC4 at PORTC : 4
+var volatile bit PORTC_RC3 at PORTC : 3
+var volatile bit PORTC_RC2 at PORTC : 2
+var volatile bit PORTC_RC1 at PORTC : 1
+var volatile bit PORTC_RC0 at PORTC : 0
+-- ------------------------------------------------
+var volatile byte PORTD at 0x00F
+var volatile bit PORTD_RD7 at PORTD : 7
+var volatile bit PORTD_RD6 at PORTD : 6
+var volatile bit PORTD_RD5 at PORTD : 5
+var volatile bit PORTD_RD4 at PORTD : 4
+var volatile bit PORTD_RD3 at PORTD : 3
+var volatile bit PORTD_RD2 at PORTD : 2
+var volatile bit PORTD_RD1 at PORTD : 1
+var volatile bit PORTD_RD0 at PORTD : 0
+-- ------------------------------------------------
+var volatile byte PORTE at 0x010
+var volatile bit PORTE_RE3 at PORTE : 3
+var volatile bit PORTE_RE2 at PORTE : 2
+var volatile bit PORTE_RE1 at PORTE : 1
+var volatile bit PORTE_RE0 at PORTE : 0
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSPIF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCLIF at PIR2 : 3
+var volatile bit PIR2_LCDIF at PIR2 : 2
+var volatile bit PIR2_CCP2IF at PIR2 : 0
+-- ------------------------------------------------
+var volatile byte PIR3 at 0x013
+var volatile bit PIR3_CCP5IF at PIR3 : 6
+var volatile bit PIR3_CCP4IF at PIR3 : 5
+var volatile bit PIR3_CCP3IF at PIR3 : 4
+var volatile bit PIR3_TMR6IF at PIR3 : 3
+var volatile bit PIR3_TMR4IF at PIR3 : 1
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH3 at CPSCON1 : 3
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_SEG2_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_VCAP_RA6_direction is pin_A6_direction
+alias pin_SEG1_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_AN4_direction is pin_A5_direction
+alias pin_C2OUT_RA5_direction is pin_A5_direction
+alias pin_CPS7_direction is pin_A5_direction
+alias pin_SRNQ_RA5_direction is pin_A5_direction
+alias pin_SS_RA5_direction is pin_A5_direction
+alias pin_VCAP_RA5_direction is pin_A5_direction
+alias pin_SEG5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_C1OUT_direction is pin_A4_direction
+alias pin_CPS6_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_SRQ_direction is pin_A4_direction
+alias pin_SEG4_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_C1IN_POS_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_SEG15_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_C2IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+alias pin_COM2_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SEG7_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_C2OUT_RA0_direction is pin_A0_direction
+alias pin_SRNQ_RA0_direction is pin_A0_direction
+alias pin_SS_RA0_direction is pin_A0_direction
+alias pin_VCAP_RA0_direction is pin_A0_direction
+alias pin_SEG12_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_ICSPDAT_direction is pin_B7_direction
+alias pin_ICDDAT_direction is pin_B7_direction
+alias pin_SEG13_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_ICSPCLK_direction is pin_B6_direction
+alias pin_ICDCLK_direction is pin_B6_direction
+alias pin_SEG14_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN13_direction is pin_B5_direction
+alias pin_CPS5_direction is pin_B5_direction
+alias pin_CCP3_RB5_direction is pin_B5_direction
+alias pin_P3A_RB5_direction is pin_B5_direction
+alias pin_T1G_RB5_direction is pin_B5_direction
+alias pin_COM1_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN11_direction is pin_B4_direction
+alias pin_CPS4_direction is pin_B4_direction
+alias pin_COM0_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_C12IN2_NEG_direction is pin_B3_direction
+alias pin_CPS3_direction is pin_B3_direction
+alias pin_CCP2_RB3_direction is pin_B3_direction
+alias pin_P2A_RB3_direction is pin_B3_direction
+alias pin_VLCD3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN8_direction is pin_B2_direction
+alias pin_CPS2_direction is pin_B2_direction
+alias pin_VLCD2_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN10_direction is pin_B1_direction
+alias pin_C12IN3_NEG_direction is pin_B1_direction
+alias pin_CPS1_direction is pin_B1_direction
+alias pin_VLCD1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_AN12_direction is pin_B0_direction
+alias pin_CPS0_direction is pin_B0_direction
+alias pin_SRI_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_SEG0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISC at 0x08E
+var volatile byte PORTC_direction at TRISC
+--
+procedure PORTC_low_direction'put(byte in x) is
+ TRISC = (TRISC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low_direction'get() return byte is
+ return (TRISC & 0x0F)
+end function
+--
+procedure PORTC_high_direction'put(byte in x) is
+ TRISC = (TRISC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high_direction'get() return byte is
+ return (TRISC >> 4)
+end function
+--
+var volatile bit TRISC_TRISC7 at TRISC : 7
+var volatile bit pin_C7_direction at TRISC : 7
+alias pin_RX_direction is pin_C7_direction
+alias pin_DT_direction is pin_C7_direction
+alias pin_SEG8_direction is pin_C7_direction
+--
+var volatile bit TRISC_TRISC6 at TRISC : 6
+var volatile bit pin_C6_direction at TRISC : 6
+alias pin_TX_direction is pin_C6_direction
+alias pin_CK_direction is pin_C6_direction
+alias pin_SEG9_direction is pin_C6_direction
+--
+var volatile bit TRISC_TRISC5 at TRISC : 5
+var volatile bit pin_C5_direction at TRISC : 5
+alias pin_SDO_direction is pin_C5_direction
+alias pin_SEG10_direction is pin_C5_direction
+--
+var volatile bit TRISC_TRISC4 at TRISC : 4
+var volatile bit pin_C4_direction at TRISC : 4
+alias pin_SDI_direction is pin_C4_direction
+alias pin_SDA_direction is pin_C4_direction
+alias pin_T1G_RC4_direction is pin_C4_direction
+alias pin_SEG11_direction is pin_C4_direction
+--
+var volatile bit TRISC_TRISC3 at TRISC : 3
+var volatile bit pin_C3_direction at TRISC : 3
+alias pin_SCL_direction is pin_C3_direction
+alias pin_SCK_direction is pin_C3_direction
+alias pin_SEG6_direction is pin_C3_direction
+--
+var volatile bit TRISC_TRISC2 at TRISC : 2
+var volatile bit pin_C2_direction at TRISC : 2
+alias pin_CCP1_direction is pin_C2_direction
+alias pin_P1A_direction is pin_C2_direction
+alias pin_SEG3_direction is pin_C2_direction
+--
+var volatile bit TRISC_TRISC1 at TRISC : 1
+var volatile bit pin_C1_direction at TRISC : 1
+alias pin_T1OSI_direction is pin_C1_direction
+alias pin_CCP2_RC1_direction is pin_C1_direction
+alias pin_P2A_RC1_direction is pin_C1_direction
+--
+var volatile bit TRISC_TRISC0 at TRISC : 0
+var volatile bit pin_C0_direction at TRISC : 0
+alias pin_T1OSO_direction is pin_C0_direction
+alias pin_T1CKI_direction is pin_C0_direction
+alias pin_P2B_RC0_direction is pin_C0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISD at 0x08F
+var volatile byte PORTD_direction at TRISD
+--
+procedure PORTD_low_direction'put(byte in x) is
+ TRISD = (TRISD & 0xF0) | (x & 0x0F)
+end procedure
+function PORTD_low_direction'get() return byte is
+ return (TRISD & 0x0F)
+end function
+--
+procedure PORTD_high_direction'put(byte in x) is
+ TRISD = (TRISD & 0x0F) | (x << 4)
+end procedure
+function PORTD_high_direction'get() return byte is
+ return (TRISD >> 4)
+end function
+--
+var volatile bit TRISD_TRISD7 at TRISD : 7
+var volatile bit pin_D7_direction at TRISD : 7
+alias pin_CPS15_direction is pin_D7_direction
+alias pin_P1D_direction is pin_D7_direction
+alias pin_SEG20_direction is pin_D7_direction
+--
+var volatile bit TRISD_TRISD6 at TRISD : 6
+var volatile bit pin_D6_direction at TRISD : 6
+alias pin_CPS14_direction is pin_D6_direction
+alias pin_P1C_direction is pin_D6_direction
+alias pin_SEG19_direction is pin_D6_direction
+--
+var volatile bit TRISD_TRISD5 at TRISD : 5
+var volatile bit pin_D5_direction at TRISD : 5
+alias pin_CPS13_direction is pin_D5_direction
+alias pin_P1B_direction is pin_D5_direction
+alias pin_SEG18_direction is pin_D5_direction
+--
+var volatile bit TRISD_TRISD4 at TRISD : 4
+var volatile bit pin_D4_direction at TRISD : 4
+alias pin_CPS12_direction is pin_D4_direction
+alias pin_P2D_direction is pin_D4_direction
+alias pin_SEG17_direction is pin_D4_direction
+--
+var volatile bit TRISD_TRISD3 at TRISD : 3
+var volatile bit pin_D3_direction at TRISD : 3
+alias pin_CPS11_direction is pin_D3_direction
+alias pin_P2C_direction is pin_D3_direction
+alias pin_SEG16_direction is pin_D3_direction
+--
+var volatile bit TRISD_TRISD2 at TRISD : 2
+var volatile bit pin_D2_direction at TRISD : 2
+alias pin_CPS10_direction is pin_D2_direction
+alias pin_P2B_RD2_direction is pin_D2_direction
+--
+var volatile bit TRISD_TRISD1 at TRISD : 1
+var volatile bit pin_D1_direction at TRISD : 1
+alias pin_CPS9_direction is pin_D1_direction
+alias pin_CCP4_direction is pin_D1_direction
+--
+var volatile bit TRISD_TRISD0 at TRISD : 0
+var volatile bit pin_D0_direction at TRISD : 0
+alias pin_CPS8_direction is pin_D0_direction
+alias pin_COM3_direction is pin_D0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISE at 0x090
+var volatile byte PORTE_direction at TRISE
+--
+procedure PORTE_low_direction'put(byte in x) is
+ TRISE = (TRISE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low_direction'get() return byte is
+ return (TRISE & 0x0F)
+end function
+--
+procedure PORTE_high_direction'put(byte in x) is
+ TRISE = (TRISE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high_direction'get() return byte is
+ return (TRISE >> 4)
+end function
+--
+var volatile bit TRISE_TRISE2 at TRISE : 2
+var volatile bit pin_E2_direction at TRISE : 2
+alias pin_AN7_direction is pin_E2_direction
+alias pin_CCP5_direction is pin_E2_direction
+alias pin_SEG23_direction is pin_E2_direction
+--
+var volatile bit TRISE_TRISE1 at TRISE : 1
+var volatile bit pin_E1_direction at TRISE : 1
+alias pin_AN6_direction is pin_E1_direction
+alias pin_P3B_direction is pin_E1_direction
+alias pin_SEG22_direction is pin_E1_direction
+--
+var volatile bit TRISE_TRISE0 at TRISE : 0
+var volatile bit pin_E0_direction at TRISE : 0
+alias pin_AN5_direction is pin_E0_direction
+alias pin_P3A_RE0_direction is pin_E0_direction
+alias pin_CCP3_RE0_direction is pin_E0_direction
+alias pin_SEG21_direction is pin_E0_direction
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSPIE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCLIE at PIE2 : 3
+var volatile bit PIE2_LCDIE at PIE2 : 2
+var volatile bit PIE2_CCP2IE at PIE2 : 0
+-- ------------------------------------------------
+var volatile byte PIE3 at 0x093
+var volatile bit PIE3_CCP5IE at PIE3 : 6
+var volatile bit PIE3_CCP4IE at PIE3 : 5
+var volatile bit PIE3_CCP3IE at PIE3 : 4
+var volatile bit PIE3_TMR6IE at PIE3 : 3
+var volatile bit PIE3_TMR4IE at PIE3 : 1
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_SEG2 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_VCAP_RA6 is pin_A6
+alias pin_SEG1 is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA5 at LATA : 5
+var volatile bit pin_A5 at PORTA : 5
+alias pin_AN4 is pin_A5
+alias pin_C2OUT_RA5 is pin_A5
+alias pin_CPS7 is pin_A5
+alias pin_SRNQ_RA5 is pin_A5
+alias pin_SS_RA5 is pin_A5
+alias pin_VCAP_RA5 is pin_A5
+alias pin_SEG5 is pin_A5
+--
+procedure pin_A5'put(bit in x at LATA : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_C1OUT is pin_A4
+alias pin_CPS6 is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_SRQ is pin_A4
+alias pin_SEG4 is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_C1IN_POS is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_SEG15 is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_C2IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+alias pin_COM2 is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SEG7 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_C2OUT_RA0 is pin_A0
+alias pin_SRNQ_RA0 is pin_A0
+alias pin_SS_RA0 is pin_A0
+alias pin_VCAP_RA0 is pin_A0
+alias pin_SEG12 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_ICSPDAT is pin_B7
+alias pin_ICDDAT is pin_B7
+alias pin_SEG13 is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_ICSPCLK is pin_B6
+alias pin_ICDCLK is pin_B6
+alias pin_SEG14 is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN13 is pin_B5
+alias pin_CPS5 is pin_B5
+alias pin_CCP3_RB5 is pin_B5
+alias pin_P3A_RB5 is pin_B5
+alias pin_T1G_RB5 is pin_B5
+alias pin_COM1 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN11 is pin_B4
+alias pin_CPS4 is pin_B4
+alias pin_COM0 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_C12IN2_NEG is pin_B3
+alias pin_CPS3 is pin_B3
+alias pin_CCP2_RB3 is pin_B3
+alias pin_P2A_RB3 is pin_B3
+alias pin_VLCD3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN8 is pin_B2
+alias pin_CPS2 is pin_B2
+alias pin_VLCD2 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN10 is pin_B1
+alias pin_C12IN3_NEG is pin_B1
+alias pin_CPS1 is pin_B1
+alias pin_VLCD1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_AN12 is pin_B0
+alias pin_CPS0 is pin_B0
+alias pin_SRI is pin_B0
+alias pin_INT is pin_B0
+alias pin_SEG0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATC at 0x10E
+--
+procedure PORTC'put(byte in x) is
+ pragma inline
+ LATC = x
+end procedure
+--
+procedure PORTC_low'put(byte in x) is
+ LATC = (PORTC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low'get() return byte is
+ return (PORTC & 0x0F)
+end function
+--
+procedure PORTC_high'put(byte in x) is
+ LATC = (PORTC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high'get() return byte is
+ return (PORTC >> 4)
+end function
+--
+var volatile bit LATC_LATC7 at LATC : 7
+var volatile bit pin_C7 at PORTC : 7
+alias pin_RX is pin_C7
+alias pin_DT is pin_C7
+alias pin_SEG8 is pin_C7
+--
+procedure pin_C7'put(bit in x at LATC : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC6 at LATC : 6
+var volatile bit pin_C6 at PORTC : 6
+alias pin_TX is pin_C6
+alias pin_CK is pin_C6
+alias pin_SEG9 is pin_C6
+--
+procedure pin_C6'put(bit in x at LATC : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC5 at LATC : 5
+var volatile bit pin_C5 at PORTC : 5
+alias pin_SDO is pin_C5
+alias pin_SEG10 is pin_C5
+--
+procedure pin_C5'put(bit in x at LATC : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC4 at LATC : 4
+var volatile bit pin_C4 at PORTC : 4
+alias pin_SDI is pin_C4
+alias pin_SDA is pin_C4
+alias pin_T1G_RC4 is pin_C4
+alias pin_SEG11 is pin_C4
+--
+procedure pin_C4'put(bit in x at LATC : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC3 at LATC : 3
+var volatile bit pin_C3 at PORTC : 3
+alias pin_SCL is pin_C3
+alias pin_SCK is pin_C3
+alias pin_SEG6 is pin_C3
+--
+procedure pin_C3'put(bit in x at LATC : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC2 at LATC : 2
+var volatile bit pin_C2 at PORTC : 2
+alias pin_CCP1 is pin_C2
+alias pin_P1A is pin_C2
+alias pin_SEG3 is pin_C2
+--
+procedure pin_C2'put(bit in x at LATC : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC1 at LATC : 1
+var volatile bit pin_C1 at PORTC : 1
+alias pin_T1OSI is pin_C1
+alias pin_CCP2_RC1 is pin_C1
+alias pin_P2A_RC1 is pin_C1
+--
+procedure pin_C1'put(bit in x at LATC : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC0 at LATC : 0
+var volatile bit pin_C0 at PORTC : 0
+alias pin_T1OSO is pin_C0
+alias pin_T1CKI is pin_C0
+alias pin_P2B_RC0 is pin_C0
+--
+procedure pin_C0'put(bit in x at LATC : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATD at 0x10F
+--
+procedure PORTD'put(byte in x) is
+ pragma inline
+ LATD = x
+end procedure
+--
+procedure PORTD_low'put(byte in x) is
+ LATD = (PORTD & 0xF0) | (x & 0x0F)
+end procedure
+function PORTD_low'get() return byte is
+ return (PORTD & 0x0F)
+end function
+--
+procedure PORTD_high'put(byte in x) is
+ LATD = (PORTD & 0x0F) | (x << 4)
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16f1936.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1687 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16F1936
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16f1936, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16f1936.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16f1936_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x2360
+const byte PICTYPE[] = "16F1936"
+const byte DATASHEET[] = "41364"
+const byte PGMSPEC[] = "41360"
+--
+-- Vdd Range: 1.800-5.500 Nominal: 5.000
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16f1936
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 8192 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F,0x1A0-0x1EF,0x220-0x26F
+pragma data 0x2A0-0x2EF,0x320-0x32F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PORTC at 0x00E
+var volatile bit PORTC_RC7 at PORTC : 7
+var volatile bit PORTC_RC6 at PORTC : 6
+var volatile bit PORTC_RC5 at PORTC : 5
+var volatile bit PORTC_RC4 at PORTC : 4
+var volatile bit PORTC_RC3 at PORTC : 3
+var volatile bit PORTC_RC2 at PORTC : 2
+var volatile bit PORTC_RC1 at PORTC : 1
+var volatile bit PORTC_RC0 at PORTC : 0
+-- ------------------------------------------------
+var volatile byte PORTE at 0x010
+var volatile bit PORTE_RE3 at PORTE : 3
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSPIF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCLIF at PIR2 : 3
+var volatile bit PIR2_LCDIF at PIR2 : 2
+var volatile bit PIR2_CCP2IF at PIR2 : 0
+-- ------------------------------------------------
+var volatile byte PIR3 at 0x013
+var volatile bit PIR3_CCP5IF at PIR3 : 6
+var volatile bit PIR3_CCP4IF at PIR3 : 5
+var volatile bit PIR3_CCP3IF at PIR3 : 4
+var volatile bit PIR3_TMR6IF at PIR3 : 3
+var volatile bit PIR3_TMR4IF at PIR3 : 1
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_SEG2_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_VCAP_RA6_direction is pin_A6_direction
+alias pin_SEG1_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_AN4_direction is pin_A5_direction
+alias pin_C2OUT_RA5_direction is pin_A5_direction
+alias pin_CPS7_direction is pin_A5_direction
+alias pin_SRNQ_RA5_direction is pin_A5_direction
+alias pin_SS_RA5_direction is pin_A5_direction
+alias pin_VCAP_RA5_direction is pin_A5_direction
+alias pin_SEG5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_C1OUT_direction is pin_A4_direction
+alias pin_CPS6_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_SRQ_direction is pin_A4_direction
+alias pin_CCP5_direction is pin_A4_direction
+alias pin_SEG4_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_C1IN_POS_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_COM3_direction is pin_A3_direction
+alias pin_SEG15_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_C2IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+alias pin_COM2_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SEG7_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_C2OUT_RA0_direction is pin_A0_direction
+alias pin_SRNQ_RA0_direction is pin_A0_direction
+alias pin_SS_RA0_direction is pin_A0_direction
+alias pin_VCAP_RA0_direction is pin_A0_direction
+alias pin_SEG12_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_ICSPDAT_direction is pin_B7_direction
+alias pin_ICDDAT_direction is pin_B7_direction
+alias pin_SEG13_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_ICSPCLK_direction is pin_B6_direction
+alias pin_ICDCLK_direction is pin_B6_direction
+alias pin_SEG14_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN13_direction is pin_B5_direction
+alias pin_CPS5_direction is pin_B5_direction
+alias pin_CCP3_RB5_direction is pin_B5_direction
+alias pin_P3A_RB5_direction is pin_B5_direction
+alias pin_T1G_RB5_direction is pin_B5_direction
+alias pin_COM1_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN11_direction is pin_B4_direction
+alias pin_CPS4_direction is pin_B4_direction
+alias pin_P1D_direction is pin_B4_direction
+alias pin_COM0_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_C12IN2_NEG_direction is pin_B3_direction
+alias pin_CPS3_direction is pin_B3_direction
+alias pin_CCP2_RB3_direction is pin_B3_direction
+alias pin_P2A_RB3_direction is pin_B3_direction
+alias pin_VLCD3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN8_direction is pin_B2_direction
+alias pin_CPS2_direction is pin_B2_direction
+alias pin_P1B_direction is pin_B2_direction
+alias pin_VLCD2_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN10_direction is pin_B1_direction
+alias pin_C12IN3_NEG_direction is pin_B1_direction
+alias pin_CPS1_direction is pin_B1_direction
+alias pin_P1C_direction is pin_B1_direction
+alias pin_VLCD1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_AN12_direction is pin_B0_direction
+alias pin_CPS0_direction is pin_B0_direction
+alias pin_CCP4_direction is pin_B0_direction
+alias pin_SRI_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_SEG0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISC at 0x08E
+var volatile byte PORTC_direction at TRISC
+--
+procedure PORTC_low_direction'put(byte in x) is
+ TRISC = (TRISC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low_direction'get() return byte is
+ return (TRISC & 0x0F)
+end function
+--
+procedure PORTC_high_direction'put(byte in x) is
+ TRISC = (TRISC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high_direction'get() return byte is
+ return (TRISC >> 4)
+end function
+--
+var volatile bit TRISC_TRISC7 at TRISC : 7
+var volatile bit pin_C7_direction at TRISC : 7
+alias pin_RX_direction is pin_C7_direction
+alias pin_DT_direction is pin_C7_direction
+alias pin_P3B_direction is pin_C7_direction
+alias pin_SEG8_direction is pin_C7_direction
+--
+var volatile bit TRISC_TRISC6 at TRISC : 6
+var volatile bit pin_C6_direction at TRISC : 6
+alias pin_TX_direction is pin_C6_direction
+alias pin_CK_direction is pin_C6_direction
+alias pin_CCP3_RC6_direction is pin_C6_direction
+alias pin_P3A_RC6_direction is pin_C6_direction
+alias pin_SEG9_direction is pin_C6_direction
+--
+var volatile bit TRISC_TRISC5 at TRISC : 5
+var volatile bit pin_C5_direction at TRISC : 5
+alias pin_SDO_direction is pin_C5_direction
+alias pin_SEG10_direction is pin_C5_direction
+--
+var volatile bit TRISC_TRISC4 at TRISC : 4
+var volatile bit pin_C4_direction at TRISC : 4
+alias pin_SDI_direction is pin_C4_direction
+alias pin_SDA_direction is pin_C4_direction
+alias pin_T1G_RC4_direction is pin_C4_direction
+alias pin_SEG11_direction is pin_C4_direction
+--
+var volatile bit TRISC_TRISC3 at TRISC : 3
+var volatile bit pin_C3_direction at TRISC : 3
+alias pin_SCK_direction is pin_C3_direction
+alias pin_SCL_direction is pin_C3_direction
+alias pin_SEG6_direction is pin_C3_direction
+--
+var volatile bit TRISC_TRISC2 at TRISC : 2
+var volatile bit pin_C2_direction at TRISC : 2
+alias pin_CCP1_direction is pin_C2_direction
+alias pin_P1A_direction is pin_C2_direction
+alias pin_SEG3_direction is pin_C2_direction
+--
+var volatile bit TRISC_TRISC1 at TRISC : 1
+var volatile bit pin_C1_direction at TRISC : 1
+alias pin_T1OSI_direction is pin_C1_direction
+alias pin_CCP2_RC1_direction is pin_C1_direction
+alias pin_P2A_RC1_direction is pin_C1_direction
+--
+var volatile bit TRISC_TRISC0 at TRISC : 0
+var volatile bit pin_C0_direction at TRISC : 0
+alias pin_T1OSO_direction is pin_C0_direction
+alias pin_T1CKI_direction is pin_C0_direction
+alias pin_P2B_direction is pin_C0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISE at 0x090
+var volatile byte PORTE_direction at TRISE
+--
+procedure PORTE_low_direction'put(byte in x) is
+ TRISE = (TRISE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low_direction'get() return byte is
+ return (TRISE & 0x0F)
+end function
+--
+procedure PORTE_high_direction'put(byte in x) is
+ TRISE = (TRISE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high_direction'get() return byte is
+ return (TRISE >> 4)
+end function
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSPIE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCLIE at PIE2 : 3
+var volatile bit PIE2_LCDIE at PIE2 : 2
+var volatile bit PIE2_CCP2IE at PIE2 : 0
+-- ------------------------------------------------
+var volatile byte PIE3 at 0x093
+var volatile bit PIE3_CCP5IE at PIE3 : 6
+var volatile bit PIE3_CCP4IE at PIE3 : 5
+var volatile bit PIE3_CCP3IE at PIE3 : 4
+var volatile bit PIE3_TMR6IE at PIE3 : 3
+var volatile bit PIE3_TMR4IE at PIE3 : 1
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_SEG2 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_VCAP_RA6 is pin_A6
+alias pin_SEG1 is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA5 at LATA : 5
+var volatile bit pin_A5 at PORTA : 5
+alias pin_AN4 is pin_A5
+alias pin_C2OUT_RA5 is pin_A5
+alias pin_CPS7 is pin_A5
+alias pin_SRNQ_RA5 is pin_A5
+alias pin_SS_RA5 is pin_A5
+alias pin_VCAP_RA5 is pin_A5
+alias pin_SEG5 is pin_A5
+--
+procedure pin_A5'put(bit in x at LATA : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_C1OUT is pin_A4
+alias pin_CPS6 is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_SRQ is pin_A4
+alias pin_CCP5 is pin_A4
+alias pin_SEG4 is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_C1IN_POS is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_COM3 is pin_A3
+alias pin_SEG15 is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_C2IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+alias pin_COM2 is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SEG7 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_C2OUT_RA0 is pin_A0
+alias pin_SRNQ_RA0 is pin_A0
+alias pin_SS_RA0 is pin_A0
+alias pin_VCAP_RA0 is pin_A0
+alias pin_SEG12 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_ICSPDAT is pin_B7
+alias pin_ICDDAT is pin_B7
+alias pin_SEG13 is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_ICSPCLK is pin_B6
+alias pin_ICDCLK is pin_B6
+alias pin_SEG14 is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN13 is pin_B5
+alias pin_CPS5 is pin_B5
+alias pin_CCP3_RB5 is pin_B5
+alias pin_P3A_RB5 is pin_B5
+alias pin_T1G_RB5 is pin_B5
+alias pin_COM1 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN11 is pin_B4
+alias pin_CPS4 is pin_B4
+alias pin_P1D is pin_B4
+alias pin_COM0 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_C12IN2_NEG is pin_B3
+alias pin_CPS3 is pin_B3
+alias pin_CCP2_RB3 is pin_B3
+alias pin_P2A_RB3 is pin_B3
+alias pin_VLCD3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN8 is pin_B2
+alias pin_CPS2 is pin_B2
+alias pin_P1B is pin_B2
+alias pin_VLCD2 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN10 is pin_B1
+alias pin_C12IN3_NEG is pin_B1
+alias pin_CPS1 is pin_B1
+alias pin_P1C is pin_B1
+alias pin_VLCD1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_AN12 is pin_B0
+alias pin_CPS0 is pin_B0
+alias pin_CCP4 is pin_B0
+alias pin_SRI is pin_B0
+alias pin_INT is pin_B0
+alias pin_SEG0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATC at 0x10E
+--
+procedure PORTC'put(byte in x) is
+ pragma inline
+ LATC = x
+end procedure
+--
+procedure PORTC_low'put(byte in x) is
+ LATC = (PORTC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low'get() return byte is
+ return (PORTC & 0x0F)
+end function
+--
+procedure PORTC_high'put(byte in x) is
+ LATC = (PORTC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high'get() return byte is
+ return (PORTC >> 4)
+end function
+--
+var volatile bit LATC_LATC7 at LATC : 7
+var volatile bit pin_C7 at PORTC : 7
+alias pin_RX is pin_C7
+alias pin_DT is pin_C7
+alias pin_P3B is pin_C7
+alias pin_SEG8 is pin_C7
+--
+procedure pin_C7'put(bit in x at LATC : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC6 at LATC : 6
+var volatile bit pin_C6 at PORTC : 6
+alias pin_TX is pin_C6
+alias pin_CK is pin_C6
+alias pin_CCP3_RC6 is pin_C6
+alias pin_P3A_RC6 is pin_C6
+alias pin_SEG9 is pin_C6
+--
+procedure pin_C6'put(bit in x at LATC : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC5 at LATC : 5
+var volatile bit pin_C5 at PORTC : 5
+alias pin_SDO is pin_C5
+alias pin_SEG10 is pin_C5
+--
+procedure pin_C5'put(bit in x at LATC : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC4 at LATC : 4
+var volatile bit pin_C4 at PORTC : 4
+alias pin_SDI is pin_C4
+alias pin_SDA is pin_C4
+alias pin_T1G_RC4 is pin_C4
+alias pin_SEG11 is pin_C4
+--
+procedure pin_C4'put(bit in x at LATC : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC3 at LATC : 3
+var volatile bit pin_C3 at PORTC : 3
+alias pin_SCK is pin_C3
+alias pin_SCL is pin_C3
+alias pin_SEG6 is pin_C3
+--
+procedure pin_C3'put(bit in x at LATC : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC2 at LATC : 2
+var volatile bit pin_C2 at PORTC : 2
+alias pin_CCP1 is pin_C2
+alias pin_P1A is pin_C2
+alias pin_SEG3 is pin_C2
+--
+procedure pin_C2'put(bit in x at LATC : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC1 at LATC : 1
+var volatile bit pin_C1 at PORTC : 1
+alias pin_T1OSI is pin_C1
+alias pin_CCP2_RC1 is pin_C1
+alias pin_P2A_RC1 is pin_C1
+--
+procedure pin_C1'put(bit in x at LATC : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC0 at LATC : 0
+var volatile bit pin_C0 at PORTC : 0
+alias pin_T1OSO is pin_C0
+alias pin_T1CKI is pin_C0
+alias pin_P2B is pin_C0
+--
+procedure pin_C0'put(bit in x at LATC : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATE at 0x110
+--
+procedure PORTE'put(byte in x) is
+ pragma inline
+ LATE = x
+end procedure
+--
+procedure PORTE_low'put(byte in x) is
+ LATE = (PORTE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low'get() return byte is
+ return (PORTE & 0x0F)
+end function
+--
+procedure PORTE_high'put(byte in x) is
+ LATE = (PORTE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high'get() return byte is
+ return (PORTE >> 4)
+end function
+--
+-- ------------------------------------------------
+var volatile byte CM1CON0 at 0x111
+var volatile bit CM1CON0_C1ON at CM1CON0 : 7
+var volatile bit CM1CON0_C1OUT at CM1CON0 : 6
+var volatile bit CM1CON0_C1OE at CM1CON0 : 5
+var volatile bit CM1CON0_C1POL at CM1CON0 : 4
+var volatile bit CM1CON0_C1SP at CM1CON0 : 2
+var volatile bit CM1CON0_C1HYS at CM1CON0 : 1
+var volatile bit CM1CON0_C1SYNC at CM1CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM1CON1 at 0x112
+var volatile bit CM1CON1_C1INTP at CM1CON1 : 7
+var volatile bit CM1CON1_C1INTN at CM1CON1 : 6
+var volatile bit CM1CON1_C1PCH1 at CM1CON1 : 5
+var volatile bit CM1CON1_C1PCH0 at CM1CON1 : 4
+var volatile bit CM1CON1_C1NCH1 at CM1CON1 : 1
+var volatile bit CM1CON1_C1NCH0 at CM1CON1 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON0 at 0x113
+var volatile bit CM2CON0_C2ON at CM2CON0 : 7
+var volatile bit CM2CON0_C2OUT at CM2CON0 : 6
+var volatile bit CM2CON0_C2OE at CM2CON0 : 5
+var volatile bit CM2CON0_C2POL at CM2CON0 : 4
+var volatile bit CM2CON0_C2SP at CM2CON0 : 2
+var volatile bit CM2CON0_C2HYS at CM2CON0 : 1
+var volatile bit CM2CON0_C2SYNC at CM2CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON1 at 0x114
+var volatile bit CM2CON1_C2INTP at CM2CON1 : 7
+var volatile bit CM2CON1_C2INTN at CM2CON1 : 6
+var volatile bit CM2CON1_C2PCH1 at CM2CON1 : 5
+var volatile bit CM2CON1_C2PCH0 at CM2CON1 : 4
+var volatile bit CM2CON1_C2NCH1 at CM2CON1 : 1
+var volatile bit CM2CON1_C2NCH0 at CM2CON1 : 0
+-- ------------------------------------------------
+var volatile byte CMOUT at 0x115
+var volatile bit CMOUT_MC2OUT at CMOUT : 1
+var volatile bit CMOUT_MC1OUT at CMOUT : 0
+-- ------------------------------------------------
+var volatile byte BORCON at 0x116
+var volatile bit BORCON_SBOREN at BORCON : 7
+var volatile bit BORCON_BORRDY at BORCON : 0
+-- ------------------------------------------------
+var volatile byte FVRCON at 0x117
+var volatile bit FVRCON_FVREN at FVRCON : 7
+var volatile bit FVRCON_FVRRDY at FVRCON : 6
+var volatile bit FVRCON_CDAFVR1 at FVRCON : 3
+var volatile bit FVRCON_CDAFVR0 at FVRCON : 2
+var volatile bit FVRCON_ADFVR1 at FVRCON : 1
+var volatile bit FVRCON_ADFVR0 at FVRCON : 0
+-- ------------------------------------------------
+var volatile byte DACCON0 at 0x118
+var volatile bit DACCON0_DACEN at DACCON0 : 7
+var volatile bit DACCON0_DACLPS at DACCON0 : 6
+var volatile bit DACCON0_DACOE at DACCON0 : 5
+var volatile bit DACCON0_DACPSS1 at DACCON0 : 3
+var volatile bit DACCON0_DACPSS0 at DACCON0 : 2
+var volatile bit DACCON0_DACNSS at DACCON0 : 0
+-- ------------------------------------------------
+var volatile byte DACCON1 at 0x119
+var volatile bit DACCON1_DACR4 at DACCON1 : 4
+var volatile bit DACCON1_DACR3 at DACCON1 : 3
+var volatile bit DACCON1_DACR2 at DACCON1 : 2
+var volatile bit DACCON1_DACR1 at DACCON1 : 1
+var volatile bit DACCON1_DACR0 at DACCON1 : 0
+-- ------------------------------------------------
+var volatile byte SRCON0 at 0x11A
+var volatile bit SRCON0_SRLEN at SRCON0 : 7
+var volatile bit SRCON0_SRCLK2 at SRCON0 : 6
+var volatile bit SRCON0_SRCLK1 at SRCON0 : 5
+var volatile bit SRCON0_SRCLK0 at SRCON0 : 4
+var volatile bit SRCON0_SRQEN at SRCON0 : 3
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16f1937.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1954 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16F1937
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16f1937, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16f1937.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16f1937_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x2380
+const byte PICTYPE[] = "16F1937"
+const byte DATASHEET[] = "41364"
+const byte PGMSPEC[] = "41360"
+--
+-- Vdd Range: 1.800-5.500 Nominal: 5.000
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16f1937
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 8192 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F,0x1A0-0x1EF,0x220-0x26F
+pragma data 0x2A0-0x2EF,0x320-0x32F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PORTC at 0x00E
+var volatile bit PORTC_RC7 at PORTC : 7
+var volatile bit PORTC_RC6 at PORTC : 6
+var volatile bit PORTC_RC5 at PORTC : 5
+var volatile bit PORTC_RC4 at PORTC : 4
+var volatile bit PORTC_RC3 at PORTC : 3
+var volatile bit PORTC_RC2 at PORTC : 2
+var volatile bit PORTC_RC1 at PORTC : 1
+var volatile bit PORTC_RC0 at PORTC : 0
+-- ------------------------------------------------
+var volatile byte PORTD at 0x00F
+var volatile bit PORTD_RD7 at PORTD : 7
+var volatile bit PORTD_RD6 at PORTD : 6
+var volatile bit PORTD_RD5 at PORTD : 5
+var volatile bit PORTD_RD4 at PORTD : 4
+var volatile bit PORTD_RD3 at PORTD : 3
+var volatile bit PORTD_RD2 at PORTD : 2
+var volatile bit PORTD_RD1 at PORTD : 1
+var volatile bit PORTD_RD0 at PORTD : 0
+-- ------------------------------------------------
+var volatile byte PORTE at 0x010
+var volatile bit PORTE_RE3 at PORTE : 3
+var volatile bit PORTE_RE2 at PORTE : 2
+var volatile bit PORTE_RE1 at PORTE : 1
+var volatile bit PORTE_RE0 at PORTE : 0
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSPIF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCLIF at PIR2 : 3
+var volatile bit PIR2_LCDIF at PIR2 : 2
+var volatile bit PIR2_CCP2IF at PIR2 : 0
+-- ------------------------------------------------
+var volatile byte PIR3 at 0x013
+var volatile bit PIR3_CCP5IF at PIR3 : 6
+var volatile bit PIR3_CCP4IF at PIR3 : 5
+var volatile bit PIR3_CCP3IF at PIR3 : 4
+var volatile bit PIR3_TMR6IF at PIR3 : 3
+var volatile bit PIR3_TMR4IF at PIR3 : 1
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH3 at CPSCON1 : 3
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_SEG2_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_VCAP_RA6_direction is pin_A6_direction
+alias pin_SEG1_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_AN4_direction is pin_A5_direction
+alias pin_C2OUT_RA5_direction is pin_A5_direction
+alias pin_CPS7_direction is pin_A5_direction
+alias pin_SRNQ_RA5_direction is pin_A5_direction
+alias pin_SS_RA5_direction is pin_A5_direction
+alias pin_VCAP_RA5_direction is pin_A5_direction
+alias pin_SEG5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_C1OUT_direction is pin_A4_direction
+alias pin_CPS6_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_SRQ_direction is pin_A4_direction
+alias pin_SEG4_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_C1IN_POS_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_SEG15_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_C2IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+alias pin_COM2_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SEG7_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_C2OUT_RA0_direction is pin_A0_direction
+alias pin_SRNQ_RA0_direction is pin_A0_direction
+alias pin_SS_RA0_direction is pin_A0_direction
+alias pin_VCAP_RA0_direction is pin_A0_direction
+alias pin_SEG12_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_ICSPDAT_direction is pin_B7_direction
+alias pin_ICDDAT_direction is pin_B7_direction
+alias pin_SEG13_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_ICSPCLK_direction is pin_B6_direction
+alias pin_ICDCLK_direction is pin_B6_direction
+alias pin_SEG14_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN13_direction is pin_B5_direction
+alias pin_CPS5_direction is pin_B5_direction
+alias pin_CCP3_RB5_direction is pin_B5_direction
+alias pin_P3A_RB5_direction is pin_B5_direction
+alias pin_T1G_RB5_direction is pin_B5_direction
+alias pin_COM1_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN11_direction is pin_B4_direction
+alias pin_CPS4_direction is pin_B4_direction
+alias pin_COM0_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_C12IN2_NEG_direction is pin_B3_direction
+alias pin_CPS3_direction is pin_B3_direction
+alias pin_CCP2_RB3_direction is pin_B3_direction
+alias pin_P2A_RB3_direction is pin_B3_direction
+alias pin_VLCD3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN8_direction is pin_B2_direction
+alias pin_CPS2_direction is pin_B2_direction
+alias pin_VLCD2_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN10_direction is pin_B1_direction
+alias pin_C12IN3_NEG_direction is pin_B1_direction
+alias pin_CPS1_direction is pin_B1_direction
+alias pin_VLCD1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_AN12_direction is pin_B0_direction
+alias pin_CPS0_direction is pin_B0_direction
+alias pin_SRI_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_SEG0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISC at 0x08E
+var volatile byte PORTC_direction at TRISC
+--
+procedure PORTC_low_direction'put(byte in x) is
+ TRISC = (TRISC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low_direction'get() return byte is
+ return (TRISC & 0x0F)
+end function
+--
+procedure PORTC_high_direction'put(byte in x) is
+ TRISC = (TRISC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high_direction'get() return byte is
+ return (TRISC >> 4)
+end function
+--
+var volatile bit TRISC_TRISC7 at TRISC : 7
+var volatile bit pin_C7_direction at TRISC : 7
+alias pin_RX_direction is pin_C7_direction
+alias pin_DT_direction is pin_C7_direction
+alias pin_SEG8_direction is pin_C7_direction
+--
+var volatile bit TRISC_TRISC6 at TRISC : 6
+var volatile bit pin_C6_direction at TRISC : 6
+alias pin_TX_direction is pin_C6_direction
+alias pin_CK_direction is pin_C6_direction
+alias pin_SEG9_direction is pin_C6_direction
+--
+var volatile bit TRISC_TRISC5 at TRISC : 5
+var volatile bit pin_C5_direction at TRISC : 5
+alias pin_SDO_direction is pin_C5_direction
+alias pin_SEG10_direction is pin_C5_direction
+--
+var volatile bit TRISC_TRISC4 at TRISC : 4
+var volatile bit pin_C4_direction at TRISC : 4
+alias pin_SDI_direction is pin_C4_direction
+alias pin_SDA_direction is pin_C4_direction
+alias pin_T1G_RC4_direction is pin_C4_direction
+alias pin_SEG11_direction is pin_C4_direction
+--
+var volatile bit TRISC_TRISC3 at TRISC : 3
+var volatile bit pin_C3_direction at TRISC : 3
+alias pin_SCL_direction is pin_C3_direction
+alias pin_SCK_direction is pin_C3_direction
+alias pin_SEG6_direction is pin_C3_direction
+--
+var volatile bit TRISC_TRISC2 at TRISC : 2
+var volatile bit pin_C2_direction at TRISC : 2
+alias pin_CCP1_direction is pin_C2_direction
+alias pin_P1A_direction is pin_C2_direction
+alias pin_SEG3_direction is pin_C2_direction
+--
+var volatile bit TRISC_TRISC1 at TRISC : 1
+var volatile bit pin_C1_direction at TRISC : 1
+alias pin_T1OSI_direction is pin_C1_direction
+alias pin_CCP2_RC1_direction is pin_C1_direction
+alias pin_P2A_RC1_direction is pin_C1_direction
+--
+var volatile bit TRISC_TRISC0 at TRISC : 0
+var volatile bit pin_C0_direction at TRISC : 0
+alias pin_T1OSO_direction is pin_C0_direction
+alias pin_T1CKI_direction is pin_C0_direction
+alias pin_P2B_RC0_direction is pin_C0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISD at 0x08F
+var volatile byte PORTD_direction at TRISD
+--
+procedure PORTD_low_direction'put(byte in x) is
+ TRISD = (TRISD & 0xF0) | (x & 0x0F)
+end procedure
+function PORTD_low_direction'get() return byte is
+ return (TRISD & 0x0F)
+end function
+--
+procedure PORTD_high_direction'put(byte in x) is
+ TRISD = (TRISD & 0x0F) | (x << 4)
+end procedure
+function PORTD_high_direction'get() return byte is
+ return (TRISD >> 4)
+end function
+--
+var volatile bit TRISD_TRISD7 at TRISD : 7
+var volatile bit pin_D7_direction at TRISD : 7
+alias pin_CPS15_direction is pin_D7_direction
+alias pin_P1D_direction is pin_D7_direction
+alias pin_SEG20_direction is pin_D7_direction
+--
+var volatile bit TRISD_TRISD6 at TRISD : 6
+var volatile bit pin_D6_direction at TRISD : 6
+alias pin_CPS14_direction is pin_D6_direction
+alias pin_P1C_direction is pin_D6_direction
+alias pin_SEG19_direction is pin_D6_direction
+--
+var volatile bit TRISD_TRISD5 at TRISD : 5
+var volatile bit pin_D5_direction at TRISD : 5
+alias pin_CPS13_direction is pin_D5_direction
+alias pin_P1B_direction is pin_D5_direction
+alias pin_SEG18_direction is pin_D5_direction
+--
+var volatile bit TRISD_TRISD4 at TRISD : 4
+var volatile bit pin_D4_direction at TRISD : 4
+alias pin_CPS12_direction is pin_D4_direction
+alias pin_P2D_direction is pin_D4_direction
+alias pin_SEG17_direction is pin_D4_direction
+--
+var volatile bit TRISD_TRISD3 at TRISD : 3
+var volatile bit pin_D3_direction at TRISD : 3
+alias pin_CPS11_direction is pin_D3_direction
+alias pin_P2C_direction is pin_D3_direction
+alias pin_SEG16_direction is pin_D3_direction
+--
+var volatile bit TRISD_TRISD2 at TRISD : 2
+var volatile bit pin_D2_direction at TRISD : 2
+alias pin_CPS10_direction is pin_D2_direction
+alias pin_P2B_RD2_direction is pin_D2_direction
+--
+var volatile bit TRISD_TRISD1 at TRISD : 1
+var volatile bit pin_D1_direction at TRISD : 1
+alias pin_CPS9_direction is pin_D1_direction
+alias pin_CCP4_direction is pin_D1_direction
+--
+var volatile bit TRISD_TRISD0 at TRISD : 0
+var volatile bit pin_D0_direction at TRISD : 0
+alias pin_CPS8_direction is pin_D0_direction
+alias pin_COM3_direction is pin_D0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISE at 0x090
+var volatile byte PORTE_direction at TRISE
+--
+procedure PORTE_low_direction'put(byte in x) is
+ TRISE = (TRISE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low_direction'get() return byte is
+ return (TRISE & 0x0F)
+end function
+--
+procedure PORTE_high_direction'put(byte in x) is
+ TRISE = (TRISE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high_direction'get() return byte is
+ return (TRISE >> 4)
+end function
+--
+var volatile bit TRISE_TRISE2 at TRISE : 2
+var volatile bit pin_E2_direction at TRISE : 2
+alias pin_AN7_direction is pin_E2_direction
+alias pin_CCP5_direction is pin_E2_direction
+alias pin_SEG23_direction is pin_E2_direction
+--
+var volatile bit TRISE_TRISE1 at TRISE : 1
+var volatile bit pin_E1_direction at TRISE : 1
+alias pin_AN6_direction is pin_E1_direction
+alias pin_P3B_direction is pin_E1_direction
+alias pin_SEG22_direction is pin_E1_direction
+--
+var volatile bit TRISE_TRISE0 at TRISE : 0
+var volatile bit pin_E0_direction at TRISE : 0
+alias pin_AN5_direction is pin_E0_direction
+alias pin_P3A_RE0_direction is pin_E0_direction
+alias pin_CCP3_RE0_direction is pin_E0_direction
+alias pin_SEG21_direction is pin_E0_direction
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSPIE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCLIE at PIE2 : 3
+var volatile bit PIE2_LCDIE at PIE2 : 2
+var volatile bit PIE2_CCP2IE at PIE2 : 0
+-- ------------------------------------------------
+var volatile byte PIE3 at 0x093
+var volatile bit PIE3_CCP5IE at PIE3 : 6
+var volatile bit PIE3_CCP4IE at PIE3 : 5
+var volatile bit PIE3_CCP3IE at PIE3 : 4
+var volatile bit PIE3_TMR6IE at PIE3 : 3
+var volatile bit PIE3_TMR4IE at PIE3 : 1
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_SEG2 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_VCAP_RA6 is pin_A6
+alias pin_SEG1 is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA5 at LATA : 5
+var volatile bit pin_A5 at PORTA : 5
+alias pin_AN4 is pin_A5
+alias pin_C2OUT_RA5 is pin_A5
+alias pin_CPS7 is pin_A5
+alias pin_SRNQ_RA5 is pin_A5
+alias pin_SS_RA5 is pin_A5
+alias pin_VCAP_RA5 is pin_A5
+alias pin_SEG5 is pin_A5
+--
+procedure pin_A5'put(bit in x at LATA : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_C1OUT is pin_A4
+alias pin_CPS6 is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_SRQ is pin_A4
+alias pin_SEG4 is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_C1IN_POS is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_SEG15 is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_C2IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+alias pin_COM2 is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SEG7 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_C2OUT_RA0 is pin_A0
+alias pin_SRNQ_RA0 is pin_A0
+alias pin_SS_RA0 is pin_A0
+alias pin_VCAP_RA0 is pin_A0
+alias pin_SEG12 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_ICSPDAT is pin_B7
+alias pin_ICDDAT is pin_B7
+alias pin_SEG13 is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_ICSPCLK is pin_B6
+alias pin_ICDCLK is pin_B6
+alias pin_SEG14 is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN13 is pin_B5
+alias pin_CPS5 is pin_B5
+alias pin_CCP3_RB5 is pin_B5
+alias pin_P3A_RB5 is pin_B5
+alias pin_T1G_RB5 is pin_B5
+alias pin_COM1 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN11 is pin_B4
+alias pin_CPS4 is pin_B4
+alias pin_COM0 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_C12IN2_NEG is pin_B3
+alias pin_CPS3 is pin_B3
+alias pin_CCP2_RB3 is pin_B3
+alias pin_P2A_RB3 is pin_B3
+alias pin_VLCD3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN8 is pin_B2
+alias pin_CPS2 is pin_B2
+alias pin_VLCD2 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN10 is pin_B1
+alias pin_C12IN3_NEG is pin_B1
+alias pin_CPS1 is pin_B1
+alias pin_VLCD1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_AN12 is pin_B0
+alias pin_CPS0 is pin_B0
+alias pin_SRI is pin_B0
+alias pin_INT is pin_B0
+alias pin_SEG0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATC at 0x10E
+--
+procedure PORTC'put(byte in x) is
+ pragma inline
+ LATC = x
+end procedure
+--
+procedure PORTC_low'put(byte in x) is
+ LATC = (PORTC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low'get() return byte is
+ return (PORTC & 0x0F)
+end function
+--
+procedure PORTC_high'put(byte in x) is
+ LATC = (PORTC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high'get() return byte is
+ return (PORTC >> 4)
+end function
+--
+var volatile bit LATC_LATC7 at LATC : 7
+var volatile bit pin_C7 at PORTC : 7
+alias pin_RX is pin_C7
+alias pin_DT is pin_C7
+alias pin_SEG8 is pin_C7
+--
+procedure pin_C7'put(bit in x at LATC : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC6 at LATC : 6
+var volatile bit pin_C6 at PORTC : 6
+alias pin_TX is pin_C6
+alias pin_CK is pin_C6
+alias pin_SEG9 is pin_C6
+--
+procedure pin_C6'put(bit in x at LATC : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC5 at LATC : 5
+var volatile bit pin_C5 at PORTC : 5
+alias pin_SDO is pin_C5
+alias pin_SEG10 is pin_C5
+--
+procedure pin_C5'put(bit in x at LATC : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC4 at LATC : 4
+var volatile bit pin_C4 at PORTC : 4
+alias pin_SDI is pin_C4
+alias pin_SDA is pin_C4
+alias pin_T1G_RC4 is pin_C4
+alias pin_SEG11 is pin_C4
+--
+procedure pin_C4'put(bit in x at LATC : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC3 at LATC : 3
+var volatile bit pin_C3 at PORTC : 3
+alias pin_SCL is pin_C3
+alias pin_SCK is pin_C3
+alias pin_SEG6 is pin_C3
+--
+procedure pin_C3'put(bit in x at LATC : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC2 at LATC : 2
+var volatile bit pin_C2 at PORTC : 2
+alias pin_CCP1 is pin_C2
+alias pin_P1A is pin_C2
+alias pin_SEG3 is pin_C2
+--
+procedure pin_C2'put(bit in x at LATC : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC1 at LATC : 1
+var volatile bit pin_C1 at PORTC : 1
+alias pin_T1OSI is pin_C1
+alias pin_CCP2_RC1 is pin_C1
+alias pin_P2A_RC1 is pin_C1
+--
+procedure pin_C1'put(bit in x at LATC : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC0 at LATC : 0
+var volatile bit pin_C0 at PORTC : 0
+alias pin_T1OSO is pin_C0
+alias pin_T1CKI is pin_C0
+alias pin_P2B_RC0 is pin_C0
+--
+procedure pin_C0'put(bit in x at LATC : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATD at 0x10F
+--
+procedure PORTD'put(byte in x) is
+ pragma inline
+ LATD = x
+end procedure
+--
+procedure PORTD_low'put(byte in x) is
+ LATD = (PORTD & 0xF0) | (x & 0x0F)
+end procedure
+function PORTD_low'get() return byte is
+ return (PORTD & 0x0F)
+end function
+--
+procedure PORTD_high'put(byte in x) is
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16f1938.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1666 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16F1938
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16f1938, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16f1938.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16f1938_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x23A0
+const byte PICTYPE[] = "16F1938"
+const byte DATASHEET[] = "41364"
+const byte PGMSPEC[] = "41360"
+--
+-- Vdd Range: 1.800-5.500 Nominal: 5.000
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16f1938
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 16384 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F,0x1A0-0x1EF,0x220-0x26F
+pragma data 0x2A0-0x2EF,0x320-0x36F,0x3A0-0x3EF,0x420-0x46F,0x4A0-0x4EF
+pragma data 0x520-0x56F,0x5A0-0x5EF,0x620-0x64F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PORTC at 0x00E
+var volatile bit PORTC_RC7 at PORTC : 7
+var volatile bit PORTC_RC6 at PORTC : 6
+var volatile bit PORTC_RC5 at PORTC : 5
+var volatile bit PORTC_RC4 at PORTC : 4
+var volatile bit PORTC_RC3 at PORTC : 3
+var volatile bit PORTC_RC2 at PORTC : 2
+var volatile bit PORTC_RC1 at PORTC : 1
+var volatile bit PORTC_RC0 at PORTC : 0
+-- ------------------------------------------------
+var volatile byte PORTE at 0x010
+var volatile bit PORTE_RE3 at PORTE : 3
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSPIF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCLIF at PIR2 : 3
+var volatile bit PIR2_LCDIF at PIR2 : 2
+var volatile bit PIR2_CCP2IF at PIR2 : 0
+-- ------------------------------------------------
+var volatile byte PIR3 at 0x013
+var volatile bit PIR3_CCP5IF at PIR3 : 6
+var volatile bit PIR3_CCP4IF at PIR3 : 5
+var volatile bit PIR3_CCP3IF at PIR3 : 4
+var volatile bit PIR3_TMR6IF at PIR3 : 3
+var volatile bit PIR3_TMR4IF at PIR3 : 1
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_SEG2_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_VCAP_RA6_direction is pin_A6_direction
+alias pin_SEG1_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_AN4_direction is pin_A5_direction
+alias pin_C2OUT_RA5_direction is pin_A5_direction
+alias pin_CPS7_direction is pin_A5_direction
+alias pin_SRNQ_RA5_direction is pin_A5_direction
+alias pin_SS_RA5_direction is pin_A5_direction
+alias pin_VCAP_RA5_direction is pin_A5_direction
+alias pin_SEG5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_C1OUT_direction is pin_A4_direction
+alias pin_CPS6_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_SRQ_direction is pin_A4_direction
+alias pin_CCP5_direction is pin_A4_direction
+alias pin_SEG4_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_C1IN_POS_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_COM3_direction is pin_A3_direction
+alias pin_SEG15_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_C2IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+alias pin_COM2_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SEG7_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_C2OUT_RA0_direction is pin_A0_direction
+alias pin_SRNQ_RA0_direction is pin_A0_direction
+alias pin_SS_RA0_direction is pin_A0_direction
+alias pin_VCAP_RA0_direction is pin_A0_direction
+alias pin_SEG12_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_ICSPDAT_direction is pin_B7_direction
+alias pin_ICDDAT_direction is pin_B7_direction
+alias pin_SEG13_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_ICSPCLK_direction is pin_B6_direction
+alias pin_ICDCLK_direction is pin_B6_direction
+alias pin_SEG14_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN13_direction is pin_B5_direction
+alias pin_CPS5_direction is pin_B5_direction
+alias pin_CCP3_RB5_direction is pin_B5_direction
+alias pin_P3A_RB5_direction is pin_B5_direction
+alias pin_T1G_RB5_direction is pin_B5_direction
+alias pin_COM1_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN11_direction is pin_B4_direction
+alias pin_CPS4_direction is pin_B4_direction
+alias pin_P1D_direction is pin_B4_direction
+alias pin_COM0_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_C12IN2_NEG_direction is pin_B3_direction
+alias pin_CPS3_direction is pin_B3_direction
+alias pin_CCP2_RB3_direction is pin_B3_direction
+alias pin_P2A_RB3_direction is pin_B3_direction
+alias pin_VLCD3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN8_direction is pin_B2_direction
+alias pin_CPS2_direction is pin_B2_direction
+alias pin_P1B_direction is pin_B2_direction
+alias pin_VLCD2_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN10_direction is pin_B1_direction
+alias pin_C12IN3_NEG_direction is pin_B1_direction
+alias pin_CPS1_direction is pin_B1_direction
+alias pin_P1C_direction is pin_B1_direction
+alias pin_VLCD1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_AN12_direction is pin_B0_direction
+alias pin_CPS0_direction is pin_B0_direction
+alias pin_CCP4_direction is pin_B0_direction
+alias pin_SRI_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_SEG0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISC at 0x08E
+var volatile byte PORTC_direction at TRISC
+--
+procedure PORTC_low_direction'put(byte in x) is
+ TRISC = (TRISC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low_direction'get() return byte is
+ return (TRISC & 0x0F)
+end function
+--
+procedure PORTC_high_direction'put(byte in x) is
+ TRISC = (TRISC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high_direction'get() return byte is
+ return (TRISC >> 4)
+end function
+--
+var volatile bit TRISC_TRISC7 at TRISC : 7
+var volatile bit pin_C7_direction at TRISC : 7
+alias pin_RX_direction is pin_C7_direction
+alias pin_DT_direction is pin_C7_direction
+alias pin_P3B_direction is pin_C7_direction
+alias pin_SEG8_direction is pin_C7_direction
+--
+var volatile bit TRISC_TRISC6 at TRISC : 6
+var volatile bit pin_C6_direction at TRISC : 6
+alias pin_TX_direction is pin_C6_direction
+alias pin_CK_direction is pin_C6_direction
+alias pin_CCP3_RC6_direction is pin_C6_direction
+alias pin_P3A_RC6_direction is pin_C6_direction
+alias pin_SEG9_direction is pin_C6_direction
+--
+var volatile bit TRISC_TRISC5 at TRISC : 5
+var volatile bit pin_C5_direction at TRISC : 5
+alias pin_SDO_direction is pin_C5_direction
+alias pin_SEG10_direction is pin_C5_direction
+--
+var volatile bit TRISC_TRISC4 at TRISC : 4
+var volatile bit pin_C4_direction at TRISC : 4
+alias pin_SDI_direction is pin_C4_direction
+alias pin_SDA_direction is pin_C4_direction
+alias pin_T1G_RC4_direction is pin_C4_direction
+alias pin_SEG11_direction is pin_C4_direction
+--
+var volatile bit TRISC_TRISC3 at TRISC : 3
+var volatile bit pin_C3_direction at TRISC : 3
+alias pin_SCK_direction is pin_C3_direction
+alias pin_SCL_direction is pin_C3_direction
+alias pin_SEG6_direction is pin_C3_direction
+--
+var volatile bit TRISC_TRISC2 at TRISC : 2
+var volatile bit pin_C2_direction at TRISC : 2
+alias pin_CCP1_direction is pin_C2_direction
+alias pin_P1A_direction is pin_C2_direction
+alias pin_SEG3_direction is pin_C2_direction
+--
+var volatile bit TRISC_TRISC1 at TRISC : 1
+var volatile bit pin_C1_direction at TRISC : 1
+alias pin_T1OSI_direction is pin_C1_direction
+alias pin_CCP2_RC1_direction is pin_C1_direction
+alias pin_P2A_RC1_direction is pin_C1_direction
+--
+var volatile bit TRISC_TRISC0 at TRISC : 0
+var volatile bit pin_C0_direction at TRISC : 0
+alias pin_T1OSO_direction is pin_C0_direction
+alias pin_T1CKI_direction is pin_C0_direction
+alias pin_P2B_direction is pin_C0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISE at 0x090
+var volatile byte PORTE_direction at TRISE
+--
+procedure PORTE_low_direction'put(byte in x) is
+ TRISE = (TRISE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low_direction'get() return byte is
+ return (TRISE & 0x0F)
+end function
+--
+procedure PORTE_high_direction'put(byte in x) is
+ TRISE = (TRISE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high_direction'get() return byte is
+ return (TRISE >> 4)
+end function
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSPIE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCLIE at PIE2 : 3
+var volatile bit PIE2_LCDIE at PIE2 : 2
+var volatile bit PIE2_CCP2IE at PIE2 : 0
+-- ------------------------------------------------
+var volatile byte PIE3 at 0x093
+var volatile bit PIE3_CCP5IE at PIE3 : 6
+var volatile bit PIE3_CCP4IE at PIE3 : 5
+var volatile bit PIE3_CCP3IE at PIE3 : 4
+var volatile bit PIE3_TMR6IE at PIE3 : 3
+var volatile bit PIE3_TMR4IE at PIE3 : 1
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_SEG2 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_VCAP_RA6 is pin_A6
+alias pin_SEG1 is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA5 at LATA : 5
+var volatile bit pin_A5 at PORTA : 5
+alias pin_AN4 is pin_A5
+alias pin_C2OUT_RA5 is pin_A5
+alias pin_CPS7 is pin_A5
+alias pin_SRNQ_RA5 is pin_A5
+alias pin_SS_RA5 is pin_A5
+alias pin_VCAP_RA5 is pin_A5
+alias pin_SEG5 is pin_A5
+--
+procedure pin_A5'put(bit in x at LATA : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_C1OUT is pin_A4
+alias pin_CPS6 is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_SRQ is pin_A4
+alias pin_CCP5 is pin_A4
+alias pin_SEG4 is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_C1IN_POS is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_COM3 is pin_A3
+alias pin_SEG15 is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_C2IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+alias pin_COM2 is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SEG7 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_C2OUT_RA0 is pin_A0
+alias pin_SRNQ_RA0 is pin_A0
+alias pin_SS_RA0 is pin_A0
+alias pin_VCAP_RA0 is pin_A0
+alias pin_SEG12 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_ICSPDAT is pin_B7
+alias pin_ICDDAT is pin_B7
+alias pin_SEG13 is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_ICSPCLK is pin_B6
+alias pin_ICDCLK is pin_B6
+alias pin_SEG14 is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN13 is pin_B5
+alias pin_CPS5 is pin_B5
+alias pin_CCP3_RB5 is pin_B5
+alias pin_P3A_RB5 is pin_B5
+alias pin_T1G_RB5 is pin_B5
+alias pin_COM1 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN11 is pin_B4
+alias pin_CPS4 is pin_B4
+alias pin_P1D is pin_B4
+alias pin_COM0 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_C12IN2_NEG is pin_B3
+alias pin_CPS3 is pin_B3
+alias pin_CCP2_RB3 is pin_B3
+alias pin_P2A_RB3 is pin_B3
+alias pin_VLCD3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN8 is pin_B2
+alias pin_CPS2 is pin_B2
+alias pin_P1B is pin_B2
+alias pin_VLCD2 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN10 is pin_B1
+alias pin_C12IN3_NEG is pin_B1
+alias pin_CPS1 is pin_B1
+alias pin_P1C is pin_B1
+alias pin_VLCD1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_AN12 is pin_B0
+alias pin_CPS0 is pin_B0
+alias pin_CCP4 is pin_B0
+alias pin_SRI is pin_B0
+alias pin_INT is pin_B0
+alias pin_SEG0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATC at 0x10E
+--
+procedure PORTC'put(byte in x) is
+ pragma inline
+ LATC = x
+end procedure
+--
+procedure PORTC_low'put(byte in x) is
+ LATC = (PORTC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low'get() return byte is
+ return (PORTC & 0x0F)
+end function
+--
+procedure PORTC_high'put(byte in x) is
+ LATC = (PORTC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high'get() return byte is
+ return (PORTC >> 4)
+end function
+--
+var volatile bit LATC_LATC7 at LATC : 7
+var volatile bit pin_C7 at PORTC : 7
+alias pin_RX is pin_C7
+alias pin_DT is pin_C7
+alias pin_P3B is pin_C7
+alias pin_SEG8 is pin_C7
+--
+procedure pin_C7'put(bit in x at LATC : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC6 at LATC : 6
+var volatile bit pin_C6 at PORTC : 6
+alias pin_TX is pin_C6
+alias pin_CK is pin_C6
+alias pin_CCP3_RC6 is pin_C6
+alias pin_P3A_RC6 is pin_C6
+alias pin_SEG9 is pin_C6
+--
+procedure pin_C6'put(bit in x at LATC : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC5 at LATC : 5
+var volatile bit pin_C5 at PORTC : 5
+alias pin_SDO is pin_C5
+alias pin_SEG10 is pin_C5
+--
+procedure pin_C5'put(bit in x at LATC : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC4 at LATC : 4
+var volatile bit pin_C4 at PORTC : 4
+alias pin_SDI is pin_C4
+alias pin_SDA is pin_C4
+alias pin_T1G_RC4 is pin_C4
+alias pin_SEG11 is pin_C4
+--
+procedure pin_C4'put(bit in x at LATC : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC3 at LATC : 3
+var volatile bit pin_C3 at PORTC : 3
+alias pin_SCK is pin_C3
+alias pin_SCL is pin_C3
+alias pin_SEG6 is pin_C3
+--
+procedure pin_C3'put(bit in x at LATC : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC2 at LATC : 2
+var volatile bit pin_C2 at PORTC : 2
+alias pin_CCP1 is pin_C2
+alias pin_P1A is pin_C2
+alias pin_SEG3 is pin_C2
+--
+procedure pin_C2'put(bit in x at LATC : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC1 at LATC : 1
+var volatile bit pin_C1 at PORTC : 1
+alias pin_T1OSI is pin_C1
+alias pin_CCP2_RC1 is pin_C1
+alias pin_P2A_RC1 is pin_C1
+--
+procedure pin_C1'put(bit in x at LATC : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC0 at LATC : 0
+var volatile bit pin_C0 at PORTC : 0
+alias pin_T1OSO is pin_C0
+alias pin_T1CKI is pin_C0
+alias pin_P2B is pin_C0
+--
+procedure pin_C0'put(bit in x at LATC : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte CM1CON0 at 0x111
+var volatile bit CM1CON0_C1ON at CM1CON0 : 7
+var volatile bit CM1CON0_C1OUT at CM1CON0 : 6
+var volatile bit CM1CON0_C1OE at CM1CON0 : 5
+var volatile bit CM1CON0_C1POL at CM1CON0 : 4
+var volatile bit CM1CON0_C1SP at CM1CON0 : 2
+var volatile bit CM1CON0_C1HYS at CM1CON0 : 1
+var volatile bit CM1CON0_C1SYNC at CM1CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM1CON1 at 0x112
+var volatile bit CM1CON1_C1INTP at CM1CON1 : 7
+var volatile bit CM1CON1_C1INTN at CM1CON1 : 6
+var volatile bit CM1CON1_C1PCH1 at CM1CON1 : 5
+var volatile bit CM1CON1_C1PCH0 at CM1CON1 : 4
+var volatile bit CM1CON1_C1NCH1 at CM1CON1 : 1
+var volatile bit CM1CON1_C1NCH0 at CM1CON1 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON0 at 0x113
+var volatile bit CM2CON0_C2ON at CM2CON0 : 7
+var volatile bit CM2CON0_C2OUT at CM2CON0 : 6
+var volatile bit CM2CON0_C2OE at CM2CON0 : 5
+var volatile bit CM2CON0_C2POL at CM2CON0 : 4
+var volatile bit CM2CON0_C2SP at CM2CON0 : 2
+var volatile bit CM2CON0_C2HYS at CM2CON0 : 1
+var volatile bit CM2CON0_C2SYNC at CM2CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON1 at 0x114
+var volatile bit CM2CON1_C2INTP at CM2CON1 : 7
+var volatile bit CM2CON1_C2INTN at CM2CON1 : 6
+var volatile bit CM2CON1_C2PCH1 at CM2CON1 : 5
+var volatile bit CM2CON1_C2PCH0 at CM2CON1 : 4
+var volatile bit CM2CON1_C2NCH1 at CM2CON1 : 1
+var volatile bit CM2CON1_C2NCH0 at CM2CON1 : 0
+-- ------------------------------------------------
+var volatile byte CMOUT at 0x115
+var volatile bit CMOUT_MC2OUT at CMOUT : 1
+var volatile bit CMOUT_MC1OUT at CMOUT : 0
+-- ------------------------------------------------
+var volatile byte BORCON at 0x116
+var volatile bit BORCON_SBOREN at BORCON : 7
+var volatile bit BORCON_BORRDY at BORCON : 0
+-- ------------------------------------------------
+var volatile byte FVRCON at 0x117
+var volatile bit FVRCON_FVREN at FVRCON : 7
+var volatile bit FVRCON_FVRRDY at FVRCON : 6
+var volatile bit FVRCON_CDAFVR1 at FVRCON : 3
+var volatile bit FVRCON_CDAFVR0 at FVRCON : 2
+var volatile bit FVRCON_ADFVR1 at FVRCON : 1
+var volatile bit FVRCON_ADFVR0 at FVRCON : 0
+-- ------------------------------------------------
+var volatile byte DACCON0 at 0x118
+var volatile bit DACCON0_DACEN at DACCON0 : 7
+var volatile bit DACCON0_DACLPS at DACCON0 : 6
+var volatile bit DACCON0_DACOE at DACCON0 : 5
+var volatile bit DACCON0_DACPSS1 at DACCON0 : 3
+var volatile bit DACCON0_DACPSS0 at DACCON0 : 2
+var volatile bit DACCON0_DACNSS at DACCON0 : 0
+-- ------------------------------------------------
+var volatile byte DACCON1 at 0x119
+var volatile bit DACCON1_DACR4 at DACCON1 : 4
+var volatile bit DACCON1_DACR3 at DACCON1 : 3
+var volatile bit DACCON1_DACR2 at DACCON1 : 2
+var volatile bit DACCON1_DACR1 at DACCON1 : 1
+var volatile bit DACCON1_DACR0 at DACCON1 : 0
+-- ------------------------------------------------
+var volatile byte SRCON0 at 0x11A
+var volatile bit SRCON0_SRLEN at SRCON0 : 7
+var volatile bit SRCON0_SRCLK2 at SRCON0 : 6
+var volatile bit SRCON0_SRCLK1 at SRCON0 : 5
+var volatile bit SRCON0_SRCLK0 at SRCON0 : 4
+var volatile bit SRCON0_SRQEN at SRCON0 : 3
+var volatile bit SRCON0_SRNQEN at SRCON0 : 2
+var volatile bit SRCON0_SRPS at SRCON0 : 1
+var volatile bit SRCON0_SRPR at SRCON0 : 0
+-- ------------------------------------------------
+var volatile byte SRCON1 at 0x11B
+var volatile bit SRCON1_SRSPE at SRCON1 : 7
+var volatile bit SRCON1_SRSCKE at SRCON1 : 6
+var volatile bit SRCON1_SRSC2E at SRCON1 : 5
+var volatile bit SRCON1_SRSC1E at SRCON1 : 4
+var volatile bit SRCON1_SRRPE at SRCON1 : 3
+var volatile bit SRCON1_SRRCKE at SRCON1 : 2
+var volatile bit SRCON1_SRRC2E at SRCON1 : 1
+var volatile bit SRCON1_SRRC1E at SRCON1 : 0
+-- ------------------------------------------------
+var volatile byte APFCON at 0x11D
+var volatile bit APFCON_CCP3SEL at APFCON : 6
+var volatile bit APFCON_T1GSEL at APFCON : 5
+var volatile bit APFCON_P2BSEL at APFCON : 4
+var volatile bit APFCON_SRNQSEL at APFCON : 3
+var volatile bit APFCON_C2OUTSEL at APFCON : 2
+var volatile bit APFCON_SSSEL at APFCON : 1
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16f1939.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1955 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16F1939
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16f1939, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16f1939.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16f1939_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x23C0
+const byte PICTYPE[] = "16F1939"
+const byte DATASHEET[] = "41364"
+const byte PGMSPEC[] = "41360"
+--
+-- Vdd Range: 1.800-5.500 Nominal: 5.000
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16f1939
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 16384 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F,0x1A0-0x1EF,0x220-0x26F
+pragma data 0x2A0-0x2EF,0x320-0x36F,0x3A0-0x3EF,0x420-0x46F,0x4A0-0x4EF
+pragma data 0x520-0x56F,0x5A0-0x5EF,0x620-0x64F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PORTC at 0x00E
+var volatile bit PORTC_RC7 at PORTC : 7
+var volatile bit PORTC_RC6 at PORTC : 6
+var volatile bit PORTC_RC5 at PORTC : 5
+var volatile bit PORTC_RC4 at PORTC : 4
+var volatile bit PORTC_RC3 at PORTC : 3
+var volatile bit PORTC_RC2 at PORTC : 2
+var volatile bit PORTC_RC1 at PORTC : 1
+var volatile bit PORTC_RC0 at PORTC : 0
+-- ------------------------------------------------
+var volatile byte PORTD at 0x00F
+var volatile bit PORTD_RD7 at PORTD : 7
+var volatile bit PORTD_RD6 at PORTD : 6
+var volatile bit PORTD_RD5 at PORTD : 5
+var volatile bit PORTD_RD4 at PORTD : 4
+var volatile bit PORTD_RD3 at PORTD : 3
+var volatile bit PORTD_RD2 at PORTD : 2
+var volatile bit PORTD_RD1 at PORTD : 1
+var volatile bit PORTD_RD0 at PORTD : 0
+-- ------------------------------------------------
+var volatile byte PORTE at 0x010
+var volatile bit PORTE_RE3 at PORTE : 3
+var volatile bit PORTE_RE2 at PORTE : 2
+var volatile bit PORTE_RE1 at PORTE : 1
+var volatile bit PORTE_RE0 at PORTE : 0
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSPIF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCLIF at PIR2 : 3
+var volatile bit PIR2_LCDIF at PIR2 : 2
+var volatile bit PIR2_CCP2IF at PIR2 : 0
+-- ------------------------------------------------
+var volatile byte PIR3 at 0x013
+var volatile bit PIR3_CCP5IF at PIR3 : 6
+var volatile bit PIR3_CCP4IF at PIR3 : 5
+var volatile bit PIR3_CCP3IF at PIR3 : 4
+var volatile bit PIR3_TMR6IF at PIR3 : 3
+var volatile bit PIR3_TMR4IF at PIR3 : 1
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH3 at CPSCON1 : 3
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_SEG2_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_VCAP_RA6_direction is pin_A6_direction
+alias pin_SEG1_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_AN4_direction is pin_A5_direction
+alias pin_C2OUT_RA5_direction is pin_A5_direction
+alias pin_CPS7_direction is pin_A5_direction
+alias pin_SRNQ_RA5_direction is pin_A5_direction
+alias pin_SS_RA5_direction is pin_A5_direction
+alias pin_VCAP_RA5_direction is pin_A5_direction
+alias pin_SEG5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_C1OUT_direction is pin_A4_direction
+alias pin_CPS6_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_SRQ_direction is pin_A4_direction
+alias pin_SEG4_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_C1IN_POS_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_SEG15_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_C2IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+alias pin_COM2_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SEG7_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_C2OUT_RA0_direction is pin_A0_direction
+alias pin_SRNQ_RA0_direction is pin_A0_direction
+alias pin_SS_RA0_direction is pin_A0_direction
+alias pin_VCAP_RA0_direction is pin_A0_direction
+alias pin_SEG12_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_ICSPDAT_direction is pin_B7_direction
+alias pin_ICDDAT_direction is pin_B7_direction
+alias pin_SEG13_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_ICSPCLK_direction is pin_B6_direction
+alias pin_ICDCLK_direction is pin_B6_direction
+alias pin_SEG14_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN13_direction is pin_B5_direction
+alias pin_CPS5_direction is pin_B5_direction
+alias pin_CCP3_RB5_direction is pin_B5_direction
+alias pin_P3A_RB5_direction is pin_B5_direction
+alias pin_T1G_RB5_direction is pin_B5_direction
+alias pin_COM1_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN11_direction is pin_B4_direction
+alias pin_CPS4_direction is pin_B4_direction
+alias pin_COM0_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_C12IN2_NEG_direction is pin_B3_direction
+alias pin_CPS3_direction is pin_B3_direction
+alias pin_CCP2_RB3_direction is pin_B3_direction
+alias pin_P2A_RB3_direction is pin_B3_direction
+alias pin_VLCD3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN8_direction is pin_B2_direction
+alias pin_CPS2_direction is pin_B2_direction
+alias pin_VLCD2_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN10_direction is pin_B1_direction
+alias pin_C12IN3_NEG_direction is pin_B1_direction
+alias pin_CPS1_direction is pin_B1_direction
+alias pin_VLCD1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_AN12_direction is pin_B0_direction
+alias pin_CPS0_direction is pin_B0_direction
+alias pin_SRI_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_SEG0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISC at 0x08E
+var volatile byte PORTC_direction at TRISC
+--
+procedure PORTC_low_direction'put(byte in x) is
+ TRISC = (TRISC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low_direction'get() return byte is
+ return (TRISC & 0x0F)
+end function
+--
+procedure PORTC_high_direction'put(byte in x) is
+ TRISC = (TRISC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high_direction'get() return byte is
+ return (TRISC >> 4)
+end function
+--
+var volatile bit TRISC_TRISC7 at TRISC : 7
+var volatile bit pin_C7_direction at TRISC : 7
+alias pin_RX_direction is pin_C7_direction
+alias pin_DT_direction is pin_C7_direction
+alias pin_SEG8_direction is pin_C7_direction
+--
+var volatile bit TRISC_TRISC6 at TRISC : 6
+var volatile bit pin_C6_direction at TRISC : 6
+alias pin_TX_direction is pin_C6_direction
+alias pin_CK_direction is pin_C6_direction
+alias pin_SEG9_direction is pin_C6_direction
+--
+var volatile bit TRISC_TRISC5 at TRISC : 5
+var volatile bit pin_C5_direction at TRISC : 5
+alias pin_SDO_direction is pin_C5_direction
+alias pin_SEG10_direction is pin_C5_direction
+--
+var volatile bit TRISC_TRISC4 at TRISC : 4
+var volatile bit pin_C4_direction at TRISC : 4
+alias pin_SDI_direction is pin_C4_direction
+alias pin_SDA_direction is pin_C4_direction
+alias pin_T1G_RC4_direction is pin_C4_direction
+alias pin_SEG11_direction is pin_C4_direction
+--
+var volatile bit TRISC_TRISC3 at TRISC : 3
+var volatile bit pin_C3_direction at TRISC : 3
+alias pin_SCL_direction is pin_C3_direction
+alias pin_SCK_direction is pin_C3_direction
+alias pin_SEG6_direction is pin_C3_direction
+--
+var volatile bit TRISC_TRISC2 at TRISC : 2
+var volatile bit pin_C2_direction at TRISC : 2
+alias pin_CCP1_direction is pin_C2_direction
+alias pin_P1A_direction is pin_C2_direction
+alias pin_SEG3_direction is pin_C2_direction
+--
+var volatile bit TRISC_TRISC1 at TRISC : 1
+var volatile bit pin_C1_direction at TRISC : 1
+alias pin_T1OSI_direction is pin_C1_direction
+alias pin_CCP2_RC1_direction is pin_C1_direction
+alias pin_P2A_RC1_direction is pin_C1_direction
+--
+var volatile bit TRISC_TRISC0 at TRISC : 0
+var volatile bit pin_C0_direction at TRISC : 0
+alias pin_T1OSO_direction is pin_C0_direction
+alias pin_T1CKI_direction is pin_C0_direction
+alias pin_P2B_RC0_direction is pin_C0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISD at 0x08F
+var volatile byte PORTD_direction at TRISD
+--
+procedure PORTD_low_direction'put(byte in x) is
+ TRISD = (TRISD & 0xF0) | (x & 0x0F)
+end procedure
+function PORTD_low_direction'get() return byte is
+ return (TRISD & 0x0F)
+end function
+--
+procedure PORTD_high_direction'put(byte in x) is
+ TRISD = (TRISD & 0x0F) | (x << 4)
+end procedure
+function PORTD_high_direction'get() return byte is
+ return (TRISD >> 4)
+end function
+--
+var volatile bit TRISD_TRISD7 at TRISD : 7
+var volatile bit pin_D7_direction at TRISD : 7
+alias pin_CPS15_direction is pin_D7_direction
+alias pin_P1D_direction is pin_D7_direction
+alias pin_SEG20_direction is pin_D7_direction
+--
+var volatile bit TRISD_TRISD6 at TRISD : 6
+var volatile bit pin_D6_direction at TRISD : 6
+alias pin_CPS14_direction is pin_D6_direction
+alias pin_P1C_direction is pin_D6_direction
+alias pin_SEG19_direction is pin_D6_direction
+--
+var volatile bit TRISD_TRISD5 at TRISD : 5
+var volatile bit pin_D5_direction at TRISD : 5
+alias pin_CPS13_direction is pin_D5_direction
+alias pin_P1B_direction is pin_D5_direction
+alias pin_SEG18_direction is pin_D5_direction
+--
+var volatile bit TRISD_TRISD4 at TRISD : 4
+var volatile bit pin_D4_direction at TRISD : 4
+alias pin_CPS12_direction is pin_D4_direction
+alias pin_P2D_direction is pin_D4_direction
+alias pin_SEG17_direction is pin_D4_direction
+--
+var volatile bit TRISD_TRISD3 at TRISD : 3
+var volatile bit pin_D3_direction at TRISD : 3
+alias pin_CPS11_direction is pin_D3_direction
+alias pin_P2C_direction is pin_D3_direction
+alias pin_SEG16_direction is pin_D3_direction
+--
+var volatile bit TRISD_TRISD2 at TRISD : 2
+var volatile bit pin_D2_direction at TRISD : 2
+alias pin_CPS10_direction is pin_D2_direction
+alias pin_P2B_RD2_direction is pin_D2_direction
+--
+var volatile bit TRISD_TRISD1 at TRISD : 1
+var volatile bit pin_D1_direction at TRISD : 1
+alias pin_CPS9_direction is pin_D1_direction
+alias pin_CCP4_direction is pin_D1_direction
+--
+var volatile bit TRISD_TRISD0 at TRISD : 0
+var volatile bit pin_D0_direction at TRISD : 0
+alias pin_CPS8_direction is pin_D0_direction
+alias pin_COM3_direction is pin_D0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISE at 0x090
+var volatile byte PORTE_direction at TRISE
+--
+procedure PORTE_low_direction'put(byte in x) is
+ TRISE = (TRISE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low_direction'get() return byte is
+ return (TRISE & 0x0F)
+end function
+--
+procedure PORTE_high_direction'put(byte in x) is
+ TRISE = (TRISE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high_direction'get() return byte is
+ return (TRISE >> 4)
+end function
+--
+var volatile bit TRISE_TRISE2 at TRISE : 2
+var volatile bit pin_E2_direction at TRISE : 2
+alias pin_AN7_direction is pin_E2_direction
+alias pin_CCP5_direction is pin_E2_direction
+alias pin_SEG23_direction is pin_E2_direction
+--
+var volatile bit TRISE_TRISE1 at TRISE : 1
+var volatile bit pin_E1_direction at TRISE : 1
+alias pin_AN6_direction is pin_E1_direction
+alias pin_P3B_direction is pin_E1_direction
+alias pin_SEG22_direction is pin_E1_direction
+--
+var volatile bit TRISE_TRISE0 at TRISE : 0
+var volatile bit pin_E0_direction at TRISE : 0
+alias pin_AN5_direction is pin_E0_direction
+alias pin_P3A_RE0_direction is pin_E0_direction
+alias pin_CCP3_RE0_direction is pin_E0_direction
+alias pin_SEG21_direction is pin_E0_direction
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSPIE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCLIE at PIE2 : 3
+var volatile bit PIE2_LCDIE at PIE2 : 2
+var volatile bit PIE2_CCP2IE at PIE2 : 0
+-- ------------------------------------------------
+var volatile byte PIE3 at 0x093
+var volatile bit PIE3_CCP5IE at PIE3 : 6
+var volatile bit PIE3_CCP4IE at PIE3 : 5
+var volatile bit PIE3_CCP3IE at PIE3 : 4
+var volatile bit PIE3_TMR6IE at PIE3 : 3
+var volatile bit PIE3_TMR4IE at PIE3 : 1
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_SEG2 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_VCAP_RA6 is pin_A6
+alias pin_SEG1 is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA5 at LATA : 5
+var volatile bit pin_A5 at PORTA : 5
+alias pin_AN4 is pin_A5
+alias pin_C2OUT_RA5 is pin_A5
+alias pin_CPS7 is pin_A5
+alias pin_SRNQ_RA5 is pin_A5
+alias pin_SS_RA5 is pin_A5
+alias pin_VCAP_RA5 is pin_A5
+alias pin_SEG5 is pin_A5
+--
+procedure pin_A5'put(bit in x at LATA : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_C1OUT is pin_A4
+alias pin_CPS6 is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_SRQ is pin_A4
+alias pin_SEG4 is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_C1IN_POS is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_SEG15 is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_C2IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+alias pin_COM2 is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SEG7 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_C2OUT_RA0 is pin_A0
+alias pin_SRNQ_RA0 is pin_A0
+alias pin_SS_RA0 is pin_A0
+alias pin_VCAP_RA0 is pin_A0
+alias pin_SEG12 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_ICSPDAT is pin_B7
+alias pin_ICDDAT is pin_B7
+alias pin_SEG13 is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_ICSPCLK is pin_B6
+alias pin_ICDCLK is pin_B6
+alias pin_SEG14 is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN13 is pin_B5
+alias pin_CPS5 is pin_B5
+alias pin_CCP3_RB5 is pin_B5
+alias pin_P3A_RB5 is pin_B5
+alias pin_T1G_RB5 is pin_B5
+alias pin_COM1 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN11 is pin_B4
+alias pin_CPS4 is pin_B4
+alias pin_COM0 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_C12IN2_NEG is pin_B3
+alias pin_CPS3 is pin_B3
+alias pin_CCP2_RB3 is pin_B3
+alias pin_P2A_RB3 is pin_B3
+alias pin_VLCD3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN8 is pin_B2
+alias pin_CPS2 is pin_B2
+alias pin_VLCD2 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN10 is pin_B1
+alias pin_C12IN3_NEG is pin_B1
+alias pin_CPS1 is pin_B1
+alias pin_VLCD1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_AN12 is pin_B0
+alias pin_CPS0 is pin_B0
+alias pin_SRI is pin_B0
+alias pin_INT is pin_B0
+alias pin_SEG0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATC at 0x10E
+--
+procedure PORTC'put(byte in x) is
+ pragma inline
+ LATC = x
+end procedure
+--
+procedure PORTC_low'put(byte in x) is
+ LATC = (PORTC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low'get() return byte is
+ return (PORTC & 0x0F)
+end function
+--
+procedure PORTC_high'put(byte in x) is
+ LATC = (PORTC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high'get() return byte is
+ return (PORTC >> 4)
+end function
+--
+var volatile bit LATC_LATC7 at LATC : 7
+var volatile bit pin_C7 at PORTC : 7
+alias pin_RX is pin_C7
+alias pin_DT is pin_C7
+alias pin_SEG8 is pin_C7
+--
+procedure pin_C7'put(bit in x at LATC : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC6 at LATC : 6
+var volatile bit pin_C6 at PORTC : 6
+alias pin_TX is pin_C6
+alias pin_CK is pin_C6
+alias pin_SEG9 is pin_C6
+--
+procedure pin_C6'put(bit in x at LATC : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC5 at LATC : 5
+var volatile bit pin_C5 at PORTC : 5
+alias pin_SDO is pin_C5
+alias pin_SEG10 is pin_C5
+--
+procedure pin_C5'put(bit in x at LATC : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC4 at LATC : 4
+var volatile bit pin_C4 at PORTC : 4
+alias pin_SDI is pin_C4
+alias pin_SDA is pin_C4
+alias pin_T1G_RC4 is pin_C4
+alias pin_SEG11 is pin_C4
+--
+procedure pin_C4'put(bit in x at LATC : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC3 at LATC : 3
+var volatile bit pin_C3 at PORTC : 3
+alias pin_SCL is pin_C3
+alias pin_SCK is pin_C3
+alias pin_SEG6 is pin_C3
+--
+procedure pin_C3'put(bit in x at LATC : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC2 at LATC : 2
+var volatile bit pin_C2 at PORTC : 2
+alias pin_CCP1 is pin_C2
+alias pin_P1A is pin_C2
+alias pin_SEG3 is pin_C2
+--
+procedure pin_C2'put(bit in x at LATC : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC1 at LATC : 1
+var volatile bit pin_C1 at PORTC : 1
+alias pin_T1OSI is pin_C1
+alias pin_CCP2_RC1 is pin_C1
+alias pin_P2A_RC1 is pin_C1
+--
+procedure pin_C1'put(bit in x at LATC : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC0 at LATC : 0
+var volatile bit pin_C0 at PORTC : 0
+alias pin_T1OSO is pin_C0
+alias pin_T1CKI is pin_C0
+alias pin_P2B_RC0 is pin_C0
+--
+procedure pin_C0'put(bit in x at LATC : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATD at 0x10F
+--
+procedure PORTD'put(byte in x) is
+ pragma inline
+ LATD = x
+end procedure
+--
+procedure PORTD_low'put(byte in x) is
+ LATD = (PORTD & 0xF0) | (x & 0x0F)
+end procedure
+function PORTD_low'get() return byte is
+ return (PORTD & 0x0F)
+end function
+--
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16lf1826.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1210 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16LF1826
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16lf1826, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16lf1826.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16lf1826_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x2880
+const byte PICTYPE[] = "16LF1826"
+const byte DATASHEET[] = "41391"
+const byte PGMSPEC[] = "41390"
+--
+-- Vdd Range: 1.800-3.600 Nominal: 3.300
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16lf1826
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 2048 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSP1IF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCL1IF at PIR2 : 3
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH3 at CPSCON1 : 3
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_P1C_RA7_direction is pin_A7_direction
+alias pin_P2A_RA7_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_CLKR_direction is pin_A6_direction
+alias pin_P1D_RA6_direction is pin_A6_direction
+alias pin_P2B_RA6_direction is pin_A6_direction
+alias pin_SDO_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_MCLR_direction is pin_A5_direction
+alias pin_VPP_direction is pin_A5_direction
+alias pin_SS1_RA5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_AN4_direction is pin_A4_direction
+alias pin_CPS4_direction is pin_A4_direction
+alias pin_C2OUT_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_SRNQ_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_CPS3_direction is pin_A3_direction
+alias pin_C12IN3_NEG_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_C1OUT_direction is pin_A3_direction
+alias pin_SRQ_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_CPS2_direction is pin_A2_direction
+alias pin_C12IN2_NEG_direction is pin_A2_direction
+alias pin_C12IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_CPS1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SS2_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_CPS0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_SDO2_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_AN6_direction is pin_B7_direction
+alias pin_CPS6_direction is pin_B7_direction
+alias pin_T1OSO_direction is pin_B7_direction
+alias pin_P1D_RB7_direction is pin_B7_direction
+alias pin_P2B_RB7_direction is pin_B7_direction
+alias pin_MDCIN1_direction is pin_B7_direction
+alias pin_ICSPDAT_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_AN5_direction is pin_B6_direction
+alias pin_CPS5_direction is pin_B6_direction
+alias pin_T1CKI_direction is pin_B6_direction
+alias pin_T1OSI_direction is pin_B6_direction
+alias pin_P1C_RB6_direction is pin_B6_direction
+alias pin_P2A_RB6_direction is pin_B6_direction
+alias pin_ICSPCLK_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN7_direction is pin_B5_direction
+alias pin_CPS7_direction is pin_B5_direction
+alias pin_P1B_direction is pin_B5_direction
+alias pin_TX_RB5_direction is pin_B5_direction
+alias pin_CK_RB5_direction is pin_B5_direction
+alias pin_SCL2_direction is pin_B5_direction
+alias pin_SS1_RB5_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN8_direction is pin_B4_direction
+alias pin_CPS8_direction is pin_B4_direction
+alias pin_SCL1_direction is pin_B4_direction
+alias pin_SCK1_direction is pin_B4_direction
+alias pin_MDCIN2_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_CPS9_direction is pin_B3_direction
+alias pin_MDOUT_direction is pin_B3_direction
+alias pin_CCP1_RB3_direction is pin_B3_direction
+alias pin_P1A_RB3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN10_direction is pin_B2_direction
+alias pin_CPS10_direction is pin_B2_direction
+alias pin_MDMIN_direction is pin_B2_direction
+alias pin_TX_RB2_direction is pin_B2_direction
+alias pin_CK_RB2_direction is pin_B2_direction
+alias pin_RX_RB2_direction is pin_B2_direction
+alias pin_DT_RB2_direction is pin_B2_direction
+alias pin_SDA2_direction is pin_B2_direction
+alias pin_SDI2_direction is pin_B2_direction
+alias pin_SDO1_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN11_direction is pin_B1_direction
+alias pin_CPS11_direction is pin_B1_direction
+alias pin_RX_RB1_direction is pin_B1_direction
+alias pin_DT_RB1_direction is pin_B1_direction
+alias pin_SDA_direction is pin_B1_direction
+alias pin_SDI1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_SRI_direction is pin_B0_direction
+alias pin_T1G_direction is pin_B0_direction
+alias pin_CCP1_RB0_direction is pin_B0_direction
+alias pin_P1A_RB0_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_FLT0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSP1IE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCL1IE at PIE2 : 3
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_P1C_RA7 is pin_A7
+alias pin_P2A_RA7 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_CLKR is pin_A6
+alias pin_P1D_RA6 is pin_A6
+alias pin_P2B_RA6 is pin_A6
+alias pin_SDO is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_AN4 is pin_A4
+alias pin_CPS4 is pin_A4
+alias pin_C2OUT is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_SRNQ is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_CPS3 is pin_A3
+alias pin_C12IN3_NEG is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_C1OUT is pin_A3
+alias pin_SRQ is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_CPS2 is pin_A2
+alias pin_C12IN2_NEG is pin_A2
+alias pin_C12IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_CPS1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SS2 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_CPS0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_SDO2 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_AN6 is pin_B7
+alias pin_CPS6 is pin_B7
+alias pin_T1OSO is pin_B7
+alias pin_P1D_RB7 is pin_B7
+alias pin_P2B_RB7 is pin_B7
+alias pin_MDCIN1 is pin_B7
+alias pin_ICSPDAT is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_AN5 is pin_B6
+alias pin_CPS5 is pin_B6
+alias pin_T1CKI is pin_B6
+alias pin_T1OSI is pin_B6
+alias pin_P1C_RB6 is pin_B6
+alias pin_P2A_RB6 is pin_B6
+alias pin_ICSPCLK is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN7 is pin_B5
+alias pin_CPS7 is pin_B5
+alias pin_P1B is pin_B5
+alias pin_TX_RB5 is pin_B5
+alias pin_CK_RB5 is pin_B5
+alias pin_SCL2 is pin_B5
+alias pin_SS1_RB5 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN8 is pin_B4
+alias pin_CPS8 is pin_B4
+alias pin_SCL1 is pin_B4
+alias pin_SCK1 is pin_B4
+alias pin_MDCIN2 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_CPS9 is pin_B3
+alias pin_MDOUT is pin_B3
+alias pin_CCP1_RB3 is pin_B3
+alias pin_P1A_RB3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN10 is pin_B2
+alias pin_CPS10 is pin_B2
+alias pin_MDMIN is pin_B2
+alias pin_TX_RB2 is pin_B2
+alias pin_CK_RB2 is pin_B2
+alias pin_RX_RB2 is pin_B2
+alias pin_DT_RB2 is pin_B2
+alias pin_SDA2 is pin_B2
+alias pin_SDI2 is pin_B2
+alias pin_SDO1 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN11 is pin_B1
+alias pin_CPS11 is pin_B1
+alias pin_RX_RB1 is pin_B1
+alias pin_DT_RB1 is pin_B1
+alias pin_SDA is pin_B1
+alias pin_SDI1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_SRI is pin_B0
+alias pin_T1G is pin_B0
+alias pin_CCP1_RB0 is pin_B0
+alias pin_P1A_RB0 is pin_B0
+alias pin_INT is pin_B0
+alias pin_FLT0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte CM1CON0 at 0x111
+var volatile bit CM1CON0_C1ON at CM1CON0 : 7
+var volatile bit CM1CON0_C1OUT at CM1CON0 : 6
+var volatile bit CM1CON0_C1OE at CM1CON0 : 5
+var volatile bit CM1CON0_C1POL at CM1CON0 : 4
+var volatile bit CM1CON0_C1SP at CM1CON0 : 2
+var volatile bit CM1CON0_C1HYS at CM1CON0 : 1
+var volatile bit CM1CON0_C1SYNC at CM1CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM1CON1 at 0x112
+var volatile bit CM1CON1_C1INTP at CM1CON1 : 7
+var volatile bit CM1CON1_C1INTN at CM1CON1 : 6
+var volatile bit CM1CON1_C1PCH1 at CM1CON1 : 5
+var volatile bit CM1CON1_C1PCH0 at CM1CON1 : 4
+var volatile bit CM1CON1_C1NCH1 at CM1CON1 : 1
+var volatile bit CM1CON1_C1NCH0 at CM1CON1 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON0 at 0x113
+var volatile bit CM2CON0_C2ON at CM2CON0 : 7
+var volatile bit CM2CON0_C2OUT at CM2CON0 : 6
+var volatile bit CM2CON0_C2OE at CM2CON0 : 5
+var volatile bit CM2CON0_C2POL at CM2CON0 : 4
+var volatile bit CM2CON0_C2SP at CM2CON0 : 2
+var volatile bit CM2CON0_C2HYS at CM2CON0 : 1
+var volatile bit CM2CON0_C2SYNC at CM2CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON1 at 0x114
+var volatile bit CM2CON1_C2INTP at CM2CON1 : 7
+var volatile bit CM2CON1_C2INTN at CM2CON1 : 6
+var volatile bit CM2CON1_C2PCH1 at CM2CON1 : 5
+var volatile bit CM2CON1_C2PCH0 at CM2CON1 : 4
+var volatile bit CM2CON1_C2NCH1 at CM2CON1 : 1
+var volatile bit CM2CON1_C2NCH0 at CM2CON1 : 0
+-- ------------------------------------------------
+var volatile byte CMOUT at 0x115
+var volatile bit CMOUT_MC2OUT at CMOUT : 1
+var volatile bit CMOUT_MC1OUT at CMOUT : 0
+-- ------------------------------------------------
+var volatile byte BORCON at 0x116
+var volatile bit BORCON_SBOREN at BORCON : 7
+var volatile bit BORCON_BORRDY at BORCON : 0
+-- ------------------------------------------------
+var volatile byte FVRCON at 0x117
+var volatile bit FVRCON_FVREN at FVRCON : 7
+var volatile bit FVRCON_FVRRDY at FVRCON : 6
+var volatile bit FVRCON_CDAFVR1 at FVRCON : 3
+var volatile bit FVRCON_CDAFVR0 at FVRCON : 2
+var volatile bit FVRCON_ADFVR1 at FVRCON : 1
+var volatile bit FVRCON_ADFVR0 at FVRCON : 0
+-- ------------------------------------------------
+var volatile byte DACCON0 at 0x118
+var volatile bit DACCON0_DACEN at DACCON0 : 7
+var volatile bit DACCON0_DACLPS at DACCON0 : 6
+var volatile bit DACCON0_DACOE at DACCON0 : 5
+var volatile bit DACCON0_DACPSS1 at DACCON0 : 3
+var volatile bit DACCON0_DACPSS0 at DACCON0 : 2
+var volatile bit DACCON0_DACNSS at DACCON0 : 0
+-- ------------------------------------------------
+var volatile byte DACCON1 at 0x119
+var volatile bit DACCON1_DACR4 at DACCON1 : 4
+var volatile bit DACCON1_DACR3 at DACCON1 : 3
+var volatile bit DACCON1_DACR2 at DACCON1 : 2
+var volatile bit DACCON1_DACR1 at DACCON1 : 1
+var volatile bit DACCON1_DACR0 at DACCON1 : 0
+-- ------------------------------------------------
+var volatile byte SRCON0 at 0x11A
+var volatile bit SRCON0_SRLEN at SRCON0 : 7
+var volatile bit SRCON0_SRCLK2 at SRCON0 : 6
+var volatile bit SRCON0_SRCLK1 at SRCON0 : 5
+var volatile bit SRCON0_SRCLK0 at SRCON0 : 4
+var volatile bit SRCON0_SRQEN at SRCON0 : 3
+var volatile bit SRCON0_SRNQEN at SRCON0 : 2
+var volatile bit SRCON0_SRPS at SRCON0 : 1
+var volatile bit SRCON0_SRPR at SRCON0 : 0
+-- ------------------------------------------------
+var volatile byte SRCON1 at 0x11B
+var volatile bit SRCON1_SRSPE at SRCON1 : 7
+var volatile bit SRCON1_SRSCKE at SRCON1 : 6
+var volatile bit SRCON1_SRSC2E at SRCON1 : 5
+var volatile bit SRCON1_SRSC1E at SRCON1 : 4
+var volatile bit SRCON1_SRRPE at SRCON1 : 3
+var volatile bit SRCON1_SRRCKE at SRCON1 : 2
+var volatile bit SRCON1_SRRC2E at SRCON1 : 1
+var volatile bit SRCON1_SRRC1E at SRCON1 : 0
+-- ------------------------------------------------
+var volatile byte APFCON0 at 0x11D
+var volatile bit APFCON0_RXDTSEL at APFCON0 : 7
+var volatile bit APFCON0_SDO1SEL at APFCON0 : 6
+var volatile bit APFCON0_SS1SEL at APFCON0 : 5
+var volatile bit APFCON0_P1DSEL at APFCON0 : 2
+var volatile bit APFCON0_P1CSEL at APFCON0 : 1
+var volatile bit APFCON0_CCP1SEL at APFCON0 : 0
+-- ------------------------------------------------
+var volatile byte APFCON1 at 0x11E
+var volatile bit APFCON1_TXCKSEL at APFCON1 : 0
+-- ------------------------------------------------
+var volatile byte ANSELA at 0x18C
+var volatile bit JANSEL_ANS4 at ANSELA : 4
+var volatile bit JANSEL_ANS3 at ANSELA : 3
+var volatile bit JANSEL_ANS2 at ANSELA : 2
+var volatile bit JANSEL_ANS1 at ANSELA : 1
+var volatile bit JANSEL_ANS0 at ANSELA : 0
+-- ------------------------------------------------
+var volatile byte ANSELB at 0x18D
+var volatile bit JANSEL_ANS16 at ANSELB : 7
+var volatile bit JANSEL_ANS15 at ANSELB : 6
+var volatile bit JANSEL_ANS14 at ANSELB : 5
+var volatile bit JANSEL_ANS13 at ANSELB : 4
+var volatile bit JANSEL_ANS12 at ANSELB : 3
+var volatile bit JANSEL_ANS11 at ANSELB : 2
+var volatile bit JANSEL_ANS10 at ANSELB : 1
+-- ------------------------------------------------
+var volatile word EEADR at 0x191
+-- ------------------------------------------------
+var volatile byte EEADRL at 0x191
+-- ------------------------------------------------
+var volatile byte EEADRH at 0x192
+var volatile bit*7 EEADRH_EEADRH at EEADRH : 0
+-- ------------------------------------------------
+var volatile word EEDAT at 0x193
+-- ------------------------------------------------
+var volatile byte EEDATL at 0x193
+-- ------------------------------------------------
+var volatile byte EEDATH at 0x194
+var volatile bit*6 EEDATH_EEDATH at EEDATH : 0
+-- ------------------------------------------------
+var volatile byte EECON1 at 0x195
+var volatile bit EECON1_EEPGD at EECON1 : 7
+var volatile bit EECON1_CFGS at EECON1 : 6
+var volatile bit EECON1_LWLO at EECON1 : 5
+var volatile bit EECON1_FREE at EECON1 : 4
+var volatile bit EECON1_WRERR at EECON1 : 3
+var volatile bit EECON1_WREN at EECON1 : 2
+var volatile bit EECON1_WR at EECON1 : 1
+var volatile bit EECON1_RD at EECON1 : 0
+-- ------------------------------------------------
+var volatile byte EECON2 at 0x196
+-- ------------------------------------------------
+var volatile byte RCREG at 0x199
+-- ------------------------------------------------
+var volatile byte TXREG at 0x19A
+-- ------------------------------------------------
+var volatile byte SPBRGL at 0x19B
+alias SPBRG is SPBRGL
+-- ------------------------------------------------
+var volatile byte SPBRGH at 0x19C
+-- ------------------------------------------------
+var volatile byte RCSTA at 0x19D
+var volatile bit RCSTA_SPEN at RCSTA : 7
+var volatile bit RCSTA_RX9 at RCSTA : 6
+var volatile bit RCSTA_SREN at RCSTA : 5
+var volatile bit RCSTA_CREN at RCSTA : 4
+var volatile bit RCSTA_ADDEN at RCSTA : 3
+var volatile bit RCSTA_FERR at RCSTA : 2
+var volatile bit RCSTA_OERR at RCSTA : 1
+var volatile bit RCSTA_RX9D at RCSTA : 0
+-- ------------------------------------------------
+var volatile byte TXSTA at 0x19E
+var volatile bit TXSTA_CSRC at TXSTA : 7
+var volatile bit TXSTA_TX9 at TXSTA : 6
+var volatile bit TXSTA_TXEN at TXSTA : 5
+var volatile bit TXSTA_SYNC at TXSTA : 4
+var volatile bit TXSTA_SENDB at TXSTA : 3
+var volatile bit TXSTA_BRGH at TXSTA : 2
+var volatile bit TXSTA_TRMT at TXSTA : 1
+var volatile bit TXSTA_TX9D at TXSTA : 0
+-- ------------------------------------------------
+var volatile byte BAUDCON at 0x19F
+var volatile bit BAUDCON_ABDOVF at BAUDCON : 7
+var volatile bit BAUDCON_RCIDL at BAUDCON : 6
+var volatile bit BAUDCON_SCKP at BAUDCON : 4
+var volatile bit BAUDCON_BRG16 at BAUDCON : 3
+var volatile bit BAUDCON_WUE at BAUDCON : 1
+var volatile bit BAUDCON_ABDEN at BAUDCON : 0
+-- ------------------------------------------------
+var volatile byte WPUA at 0x20C
+var volatile bit WPUA_WPUA5 at WPUA : 5
+-- ------------------------------------------------
+var volatile byte WPUB at 0x20D
+var volatile bit WPUB_WPUB7 at WPUB : 7
+var volatile bit WPUB_WPUB6 at WPUB : 6
+var volatile bit WPUB_WPUB5 at WPUB : 5
+var volatile bit WPUB_WPUB4 at WPUB : 4
+var volatile bit WPUB_WPUB3 at WPUB : 3
+var volatile bit WPUB_WPUB2 at WPUB : 2
+var volatile bit WPUB_WPUB1 at WPUB : 1
+var volatile bit WPUB_WPUB0 at WPUB : 0
+-- ------------------------------------------------
+var volatile byte SSP1BUF at 0x211
+var volatile bit*8 SSP1BUF_SSPBUF at SSP1BUF : 0
+-- ------------------------------------------------
+var volatile byte SSP1ADD at 0x212
+var volatile bit*8 SSP1ADD_SSPADD at SSP1ADD : 0
+-- ------------------------------------------------
+var volatile byte SSP1MSK at 0x213
+var volatile bit*8 SSP1MSK_SSPMSK at SSP1MSK : 0
+-- ------------------------------------------------
+var volatile byte SSP1STAT at 0x214
+var volatile bit SSP1STAT_SMP at SSP1STAT : 7
+var volatile bit SSP1STAT_CKE at SSP1STAT : 6
+var volatile bit SSP1STAT_D at SSP1STAT : 5
+var volatile bit SSP1STAT_NA at SSP1STAT : 5
+var volatile bit SSP1STAT_P at SSP1STAT : 4
+var volatile bit SSP1STAT_S at SSP1STAT : 3
+var volatile bit SSP1STAT_R at SSP1STAT : 2
+var volatile bit SSP1STAT_NW at SSP1STAT : 2
+var volatile bit SSP1STAT_UA at SSP1STAT : 1
+var volatile bit SSP1STAT_BF at SSP1STAT : 0
+-- ------------------------------------------------
+var volatile byte SSP1CON1 at 0x215
+var volatile bit SSP1CON1_WCOL at SSP1CON1 : 7
+var volatile bit SSP1CON1_SSPOV at SSP1CON1 : 6
+var volatile bit SSP1CON1_SSPEN at SSP1CON1 : 5
+var volatile bit SSP1CON1_CKP at SSP1CON1 : 4
+var volatile bit SSP1CON1_SSPM3 at SSP1CON1 : 3
+var volatile bit SSP1CON1_SSPM2 at SSP1CON1 : 2
+var volatile bit SSP1CON1_SSPM1 at SSP1CON1 : 1
+var volatile bit SSP1CON1_SSPM0 at SSP1CON1 : 0
+-- ------------------------------------------------
+var volatile byte SSP1CON2 at 0x216
+var volatile bit SSP1CON2_GCEN at SSP1CON2 : 7
+var volatile bit SSP1CON2_ACKSTAT at SSP1CON2 : 6
+var volatile bit SSP1CON2_ACKDT at SSP1CON2 : 5
+var volatile bit SSP1CON2_ACKEN at SSP1CON2 : 4
+var volatile bit SSP1CON2_RCEN at SSP1CON2 : 3
+var volatile bit SSP1CON2_PEN at SSP1CON2 : 2
+var volatile bit SSP1CON2_RSEN at SSP1CON2 : 1
+var volatile bit SSP1CON2_SEN at SSP1CON2 : 0
+-- ------------------------------------------------
+var volatile byte SSP1CON3 at 0x217
+var volatile bit SSP1CON3_ACKTIM at SSP1CON3 : 7
+var volatile bit SSP1CON3_PCIE at SSP1CON3 : 6
+var volatile bit SSP1CON3_SCIE at SSP1CON3 : 5
+var volatile bit SSP1CON3_BOEN at SSP1CON3 : 4
+var volatile bit SSP1CON3_SDAHT at SSP1CON3 : 3
+var volatile bit SSP1CON3_SBCDE at SSP1CON3 : 2
+var volatile bit SSP1CON3_AHEN at SSP1CON3 : 1
+var volatile bit SSP1CON3_DHEN at SSP1CON3 : 0
+-- ------------------------------------------------
+var volatile byte CCPR1L at 0x291
+-- ------------------------------------------------
+var volatile byte CCPR1H at 0x292
+-- ------------------------------------------------
+var volatile byte CCP1CON at 0x293
+var volatile bit CCP1CON_P1M1 at CCP1CON : 7
+var volatile bit CCP1CON_P1M0 at CCP1CON : 6
+var volatile bit CCP1CON_DC1B1 at CCP1CON : 5
+var volatile bit CCP1CON_DC1B0 at CCP1CON : 4
+var volatile bit*2 CCP1CON_DC1B at CCP1CON : 4
+var volatile bit CCP1CON_CCP1M3 at CCP1CON : 3
+var volatile bit CCP1CON_CCP1M2 at CCP1CON : 2
+var volatile bit CCP1CON_CCP1M1 at CCP1CON : 1
+var volatile bit CCP1CON_CCP1M0 at CCP1CON : 0
+-- ------------------------------------------------
+var volatile byte PWM1CON at 0x294
+var volatile bit PWM1CON_P1RSEN at PWM1CON : 7
+var volatile bit PWM1CON_P1DC6 at PWM1CON : 6
+var volatile bit PWM1CON_P1DC5 at PWM1CON : 5
+var volatile bit PWM1CON_P1DC4 at PWM1CON : 4
+var volatile bit PWM1CON_P1DC3 at PWM1CON : 3
+var volatile bit PWM1CON_P1DC2 at PWM1CON : 2
+var volatile bit PWM1CON_P1DC1 at PWM1CON : 1
+var volatile bit PWM1CON_P1DC0 at PWM1CON : 0
+-- ------------------------------------------------
+var volatile byte CCP1AS at 0x295
+var volatile bit CCP1AS_CCP1ASE at CCP1AS : 7
+var volatile bit CCP1AS_CCP1AS2 at CCP1AS : 6
+var volatile bit CCP1AS_CCP1AS1 at CCP1AS : 5
+var volatile bit CCP1AS_CCP1AS0 at CCP1AS : 4
+var volatile bit CCP1AS_PSS1AC1 at CCP1AS : 3
+var volatile bit CCP1AS_PSS1AC0 at CCP1AS : 2
+var volatile bit CCP1AS_PSS1BD1 at CCP1AS : 1
+var volatile bit CCP1AS_PSS1BD0 at CCP1AS : 0
+-- ------------------------------------------------
+var volatile byte PSTR1CON at 0x296
+var volatile bit PSTR1CON_STR1SYNC at PSTR1CON : 4
+var volatile bit PSTR1CON_STR1D at PSTR1CON : 3
+var volatile bit PSTR1CON_STR1C at PSTR1CON : 2
+var volatile bit PSTR1CON_STR1B at PSTR1CON : 1
+var volatile bit PSTR1CON_STR1A at PSTR1CON : 0
+-- ------------------------------------------------
+var volatile byte IOCBP at 0x394
+var volatile bit IOCBP_IOCBP7 at IOCBP : 7
+var volatile bit IOCBP_IOCBP6 at IOCBP : 6
+var volatile bit IOCBP_IOCBP5 at IOCBP : 5
+var volatile bit IOCBP_IOCBP4 at IOCBP : 4
+var volatile bit IOCBP_IOCBP3 at IOCBP : 3
+var volatile bit IOCBP_IOCBP2 at IOCBP : 2
+var volatile bit IOCBP_IOCBP1 at IOCBP : 1
+var volatile bit IOCBP_IOCBP0 at IOCBP : 0
+-- ------------------------------------------------
+var volatile byte IOCBN at 0x395
+var volatile bit IOCBN_IOCBN7 at IOCBN : 7
+var volatile bit IOCBN_IOCBN6 at IOCBN : 6
+var volatile bit IOCBN_IOCBN5 at IOCBN : 5
+var volatile bit IOCBN_IOCBN4 at IOCBN : 4
+var volatile bit IOCBN_IOCBN3 at IOCBN : 3
+var volatile bit IOCBN_IOCBN2 at IOCBN : 2
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16lf1827.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1397 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16LF1827
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16lf1827, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16lf1827.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16lf1827_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x28A0
+const byte PICTYPE[] = "16LF1827"
+const byte DATASHEET[] = "41391"
+const byte PGMSPEC[] = "41390"
+--
+-- Vdd Range: 1.800-3.600 Nominal: 3.300
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16lf1827
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 4096 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F,0x1A0-0x1EF,0x220-0x24F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSP1IF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCL1IF at PIR2 : 3
+var volatile bit PIR2_CCP2IF at PIR2 : 0
+-- ------------------------------------------------
+var volatile byte PIR3 at 0x013
+var volatile bit PIR3_CCP4IF at PIR3 : 5
+var volatile bit PIR3_CCP3IF at PIR3 : 4
+var volatile bit PIR3_TMR6IF at PIR3 : 3
+var volatile bit PIR3_TMR4IF at PIR3 : 1
+-- ------------------------------------------------
+var volatile byte PIR4 at 0x014
+var volatile bit PIR4_BCL2IF at PIR4 : 1
+var volatile bit PIR4_SSP2IF at PIR4 : 0
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH3 at CPSCON1 : 3
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_P1C_RA7_direction is pin_A7_direction
+alias pin_CCP2_RA7_direction is pin_A7_direction
+alias pin_P2A_RA7_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_CLKR_direction is pin_A6_direction
+alias pin_P1D_RA6_direction is pin_A6_direction
+alias pin_P2B_RA6_direction is pin_A6_direction
+alias pin_SDO_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_MCLR_direction is pin_A5_direction
+alias pin_VPP_direction is pin_A5_direction
+alias pin_SS1_RA5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_AN4_direction is pin_A4_direction
+alias pin_CPS4_direction is pin_A4_direction
+alias pin_C2OUT_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_CCP4_direction is pin_A4_direction
+alias pin_SRNQ_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_CPS3_direction is pin_A3_direction
+alias pin_C12IN3_NEG_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_C1OUT_direction is pin_A3_direction
+alias pin_CCP3_direction is pin_A3_direction
+alias pin_SRQ_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_CPS2_direction is pin_A2_direction
+alias pin_C12IN2_NEG_direction is pin_A2_direction
+alias pin_C12IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_CPS1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SS2_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_CPS0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_SDO2_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_AN6_direction is pin_B7_direction
+alias pin_CPS6_direction is pin_B7_direction
+alias pin_T1OSO_direction is pin_B7_direction
+alias pin_P1D_RB7_direction is pin_B7_direction
+alias pin_P2B_RB7_direction is pin_B7_direction
+alias pin_MDCIN1_direction is pin_B7_direction
+alias pin_ICSPDAT_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_AN5_direction is pin_B6_direction
+alias pin_CPS5_direction is pin_B6_direction
+alias pin_T1CKI_direction is pin_B6_direction
+alias pin_T1OSI_direction is pin_B6_direction
+alias pin_P1C_RB6_direction is pin_B6_direction
+alias pin_CCP2_RB6_direction is pin_B6_direction
+alias pin_P2A_RB6_direction is pin_B6_direction
+alias pin_ICSPCLK_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN7_direction is pin_B5_direction
+alias pin_CPS7_direction is pin_B5_direction
+alias pin_P1B_direction is pin_B5_direction
+alias pin_TX_RB5_direction is pin_B5_direction
+alias pin_CK_RB5_direction is pin_B5_direction
+alias pin_SCL2_direction is pin_B5_direction
+alias pin_SS1_RB5_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN8_direction is pin_B4_direction
+alias pin_CPS8_direction is pin_B4_direction
+alias pin_SCL1_direction is pin_B4_direction
+alias pin_SCK1_direction is pin_B4_direction
+alias pin_MDCIN2_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_CPS9_direction is pin_B3_direction
+alias pin_MDOUT_direction is pin_B3_direction
+alias pin_CCP1_RB3_direction is pin_B3_direction
+alias pin_P1A_RB3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN10_direction is pin_B2_direction
+alias pin_CPS10_direction is pin_B2_direction
+alias pin_MDMIN_direction is pin_B2_direction
+alias pin_TX_RB2_direction is pin_B2_direction
+alias pin_CK_RB2_direction is pin_B2_direction
+alias pin_RX_RB2_direction is pin_B2_direction
+alias pin_DT_RB2_direction is pin_B2_direction
+alias pin_SDA2_direction is pin_B2_direction
+alias pin_SDI2_direction is pin_B2_direction
+alias pin_SDO1_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN11_direction is pin_B1_direction
+alias pin_CPS11_direction is pin_B1_direction
+alias pin_RX_RB1_direction is pin_B1_direction
+alias pin_DT_RB1_direction is pin_B1_direction
+alias pin_SDA_direction is pin_B1_direction
+alias pin_SDI1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_SRI_direction is pin_B0_direction
+alias pin_T1G_direction is pin_B0_direction
+alias pin_CCP1_RB0_direction is pin_B0_direction
+alias pin_P1A_RB0_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_FLT0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSP1IE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCL1IE at PIE2 : 3
+var volatile bit PIE2_CCP2IE at PIE2 : 0
+-- ------------------------------------------------
+var volatile byte PIE3 at 0x093
+var volatile bit PIE3_CCP4IE at PIE3 : 5
+var volatile bit PIE3_CCP3IE at PIE3 : 4
+var volatile bit PIE3_TMR6IE at PIE3 : 3
+var volatile bit PIE3_TMR4IE at PIE3 : 1
+-- ------------------------------------------------
+var volatile byte PIE4 at 0x094
+var volatile bit PIE4_BCL2IE at PIE4 : 1
+var volatile bit PIE4_SSP2IE at PIE4 : 0
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_P1C_RA7 is pin_A7
+alias pin_CCP2_RA7 is pin_A7
+alias pin_P2A_RA7 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_CLKR is pin_A6
+alias pin_P1D_RA6 is pin_A6
+alias pin_P2B_RA6 is pin_A6
+alias pin_SDO is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_AN4 is pin_A4
+alias pin_CPS4 is pin_A4
+alias pin_C2OUT is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_CCP4 is pin_A4
+alias pin_SRNQ is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_CPS3 is pin_A3
+alias pin_C12IN3_NEG is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_C1OUT is pin_A3
+alias pin_CCP3 is pin_A3
+alias pin_SRQ is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_CPS2 is pin_A2
+alias pin_C12IN2_NEG is pin_A2
+alias pin_C12IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_CPS1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SS2 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_CPS0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_SDO2 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_AN6 is pin_B7
+alias pin_CPS6 is pin_B7
+alias pin_T1OSO is pin_B7
+alias pin_P1D_RB7 is pin_B7
+alias pin_P2B_RB7 is pin_B7
+alias pin_MDCIN1 is pin_B7
+alias pin_ICSPDAT is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_AN5 is pin_B6
+alias pin_CPS5 is pin_B6
+alias pin_T1CKI is pin_B6
+alias pin_T1OSI is pin_B6
+alias pin_P1C_RB6 is pin_B6
+alias pin_CCP2_RB6 is pin_B6
+alias pin_P2A_RB6 is pin_B6
+alias pin_ICSPCLK is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN7 is pin_B5
+alias pin_CPS7 is pin_B5
+alias pin_P1B is pin_B5
+alias pin_TX_RB5 is pin_B5
+alias pin_CK_RB5 is pin_B5
+alias pin_SCL2 is pin_B5
+alias pin_SS1_RB5 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN8 is pin_B4
+alias pin_CPS8 is pin_B4
+alias pin_SCL1 is pin_B4
+alias pin_SCK1 is pin_B4
+alias pin_MDCIN2 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_CPS9 is pin_B3
+alias pin_MDOUT is pin_B3
+alias pin_CCP1_RB3 is pin_B3
+alias pin_P1A_RB3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN10 is pin_B2
+alias pin_CPS10 is pin_B2
+alias pin_MDMIN is pin_B2
+alias pin_TX_RB2 is pin_B2
+alias pin_CK_RB2 is pin_B2
+alias pin_RX_RB2 is pin_B2
+alias pin_DT_RB2 is pin_B2
+alias pin_SDA2 is pin_B2
+alias pin_SDI2 is pin_B2
+alias pin_SDO1 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN11 is pin_B1
+alias pin_CPS11 is pin_B1
+alias pin_RX_RB1 is pin_B1
+alias pin_DT_RB1 is pin_B1
+alias pin_SDA is pin_B1
+alias pin_SDI1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_SRI is pin_B0
+alias pin_T1G is pin_B0
+alias pin_CCP1_RB0 is pin_B0
+alias pin_P1A_RB0 is pin_B0
+alias pin_INT is pin_B0
+alias pin_FLT0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte CM1CON0 at 0x111
+var volatile bit CM1CON0_C1ON at CM1CON0 : 7
+var volatile bit CM1CON0_C1OUT at CM1CON0 : 6
+var volatile bit CM1CON0_C1OE at CM1CON0 : 5
+var volatile bit CM1CON0_C1POL at CM1CON0 : 4
+var volatile bit CM1CON0_C1SP at CM1CON0 : 2
+var volatile bit CM1CON0_C1HYS at CM1CON0 : 1
+var volatile bit CM1CON0_C1SYNC at CM1CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM1CON1 at 0x112
+var volatile bit CM1CON1_C1INTP at CM1CON1 : 7
+var volatile bit CM1CON1_C1INTN at CM1CON1 : 6
+var volatile bit CM1CON1_C1PCH1 at CM1CON1 : 5
+var volatile bit CM1CON1_C1PCH0 at CM1CON1 : 4
+var volatile bit CM1CON1_C1NCH1 at CM1CON1 : 1
+var volatile bit CM1CON1_C1NCH0 at CM1CON1 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON0 at 0x113
+var volatile bit CM2CON0_C2ON at CM2CON0 : 7
+var volatile bit CM2CON0_C2OUT at CM2CON0 : 6
+var volatile bit CM2CON0_C2OE at CM2CON0 : 5
+var volatile bit CM2CON0_C2POL at CM2CON0 : 4
+var volatile bit CM2CON0_C2SP at CM2CON0 : 2
+var volatile bit CM2CON0_C2HYS at CM2CON0 : 1
+var volatile bit CM2CON0_C2SYNC at CM2CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON1 at 0x114
+var volatile bit CM2CON1_C2INTP at CM2CON1 : 7
+var volatile bit CM2CON1_C2INTN at CM2CON1 : 6
+var volatile bit CM2CON1_C2PCH1 at CM2CON1 : 5
+var volatile bit CM2CON1_C2PCH0 at CM2CON1 : 4
+var volatile bit CM2CON1_C2NCH1 at CM2CON1 : 1
+var volatile bit CM2CON1_C2NCH0 at CM2CON1 : 0
+-- ------------------------------------------------
+var volatile byte CMOUT at 0x115
+var volatile bit CMOUT_MC2OUT at CMOUT : 1
+var volatile bit CMOUT_MC1OUT at CMOUT : 0
+-- ------------------------------------------------
+var volatile byte BORCON at 0x116
+var volatile bit BORCON_SBOREN at BORCON : 7
+var volatile bit BORCON_BORRDY at BORCON : 0
+-- ------------------------------------------------
+var volatile byte FVRCON at 0x117
+var volatile bit FVRCON_FVREN at FVRCON : 7
+var volatile bit FVRCON_FVRRDY at FVRCON : 6
+var volatile bit FVRCON_CDAFVR1 at FVRCON : 3
+var volatile bit FVRCON_CDAFVR0 at FVRCON : 2
+var volatile bit FVRCON_ADFVR1 at FVRCON : 1
+var volatile bit FVRCON_ADFVR0 at FVRCON : 0
+-- ------------------------------------------------
+var volatile byte DACCON0 at 0x118
+var volatile bit DACCON0_DACEN at DACCON0 : 7
+var volatile bit DACCON0_DACLPS at DACCON0 : 6
+var volatile bit DACCON0_DACOE at DACCON0 : 5
+var volatile bit DACCON0_DACPSS1 at DACCON0 : 3
+var volatile bit DACCON0_DACPSS0 at DACCON0 : 2
+var volatile bit DACCON0_DACNSS at DACCON0 : 0
+-- ------------------------------------------------
+var volatile byte DACCON1 at 0x119
+var volatile bit DACCON1_DACR4 at DACCON1 : 4
+var volatile bit DACCON1_DACR3 at DACCON1 : 3
+var volatile bit DACCON1_DACR2 at DACCON1 : 2
+var volatile bit DACCON1_DACR1 at DACCON1 : 1
+var volatile bit DACCON1_DACR0 at DACCON1 : 0
+-- ------------------------------------------------
+var volatile byte SRCON0 at 0x11A
+var volatile bit SRCON0_SRLEN at SRCON0 : 7
+var volatile bit SRCON0_SRCLK2 at SRCON0 : 6
+var volatile bit SRCON0_SRCLK1 at SRCON0 : 5
+var volatile bit SRCON0_SRCLK0 at SRCON0 : 4
+var volatile bit SRCON0_SRQEN at SRCON0 : 3
+var volatile bit SRCON0_SRNQEN at SRCON0 : 2
+var volatile bit SRCON0_SRPS at SRCON0 : 1
+var volatile bit SRCON0_SRPR at SRCON0 : 0
+-- ------------------------------------------------
+var volatile byte SRCON1 at 0x11B
+var volatile bit SRCON1_SRSPE at SRCON1 : 7
+var volatile bit SRCON1_SRSCKE at SRCON1 : 6
+var volatile bit SRCON1_SRSC2E at SRCON1 : 5
+var volatile bit SRCON1_SRSC1E at SRCON1 : 4
+var volatile bit SRCON1_SRRPE at SRCON1 : 3
+var volatile bit SRCON1_SRRCKE at SRCON1 : 2
+var volatile bit SRCON1_SRRC2E at SRCON1 : 1
+var volatile bit SRCON1_SRRC1E at SRCON1 : 0
+-- ------------------------------------------------
+var volatile byte APFCON0 at 0x11D
+var volatile bit APFCON0_RXDTSEL at APFCON0 : 7
+var volatile bit APFCON0_SDO1SEL at APFCON0 : 6
+var volatile bit APFCON0_SS1SEL at APFCON0 : 5
+var volatile bit APFCON0_P2BSEL at APFCON0 : 4
+var volatile bit APFCON0_CCP2SEL at APFCON0 : 3
+var volatile bit APFCON0_P1DSEL at APFCON0 : 2
+var volatile bit APFCON0_P1CSEL at APFCON0 : 1
+var volatile bit APFCON0_CCP1SEL at APFCON0 : 0
+-- ------------------------------------------------
+var volatile byte APFCON1 at 0x11E
+var volatile bit APFCON1_TXCKSEL at APFCON1 : 0
+-- ------------------------------------------------
+var volatile byte ANSELA at 0x18C
+var volatile bit JANSEL_ANS4 at ANSELA : 4
+var volatile bit JANSEL_ANS3 at ANSELA : 3
+var volatile bit JANSEL_ANS2 at ANSELA : 2
+var volatile bit JANSEL_ANS1 at ANSELA : 1
+var volatile bit JANSEL_ANS0 at ANSELA : 0
+-- ------------------------------------------------
+var volatile byte ANSELB at 0x18D
+var volatile bit JANSEL_ANS16 at ANSELB : 7
+var volatile bit JANSEL_ANS15 at ANSELB : 6
+var volatile bit JANSEL_ANS14 at ANSELB : 5
+var volatile bit JANSEL_ANS13 at ANSELB : 4
+var volatile bit JANSEL_ANS12 at ANSELB : 3
+var volatile bit JANSEL_ANS11 at ANSELB : 2
+var volatile bit JANSEL_ANS10 at ANSELB : 1
+-- ------------------------------------------------
+var volatile word EEADR at 0x191
+-- ------------------------------------------------
+var volatile byte EEADRL at 0x191
+-- ------------------------------------------------
+var volatile byte EEADRH at 0x192
+var volatile bit*7 EEADRH_EEADRH at EEADRH : 0
+-- ------------------------------------------------
+var volatile word EEDAT at 0x193
+-- ------------------------------------------------
+var volatile byte EEDATL at 0x193
+-- ------------------------------------------------
+var volatile byte EEDATH at 0x194
+var volatile bit*6 EEDATH_EEDATH at EEDATH : 0
+-- ------------------------------------------------
+var volatile byte EECON1 at 0x195
+var volatile bit EECON1_EEPGD at EECON1 : 7
+var volatile bit EECON1_CFGS at EECON1 : 6
+var volatile bit EECON1_LWLO at EECON1 : 5
+var volatile bit EECON1_FREE at EECON1 : 4
+var volatile bit EECON1_WRERR at EECON1 : 3
+var volatile bit EECON1_WREN at EECON1 : 2
+var volatile bit EECON1_WR at EECON1 : 1
+var volatile bit EECON1_RD at EECON1 : 0
+-- ------------------------------------------------
+var volatile byte EECON2 at 0x196
+-- ------------------------------------------------
+var volatile byte RCREG at 0x199
+-- ------------------------------------------------
+var volatile byte TXREG at 0x19A
+-- ------------------------------------------------
+var volatile byte SPBRGL at 0x19B
+alias SPBRG is SPBRGL
+-- ------------------------------------------------
+var volatile byte SPBRGH at 0x19C
+-- ------------------------------------------------
+var volatile byte RCSTA at 0x19D
+var volatile bit RCSTA_SPEN at RCSTA : 7
+var volatile bit RCSTA_RX9 at RCSTA : 6
+var volatile bit RCSTA_SREN at RCSTA : 5
+var volatile bit RCSTA_CREN at RCSTA : 4
+var volatile bit RCSTA_ADDEN at RCSTA : 3
+var volatile bit RCSTA_FERR at RCSTA : 2
+var volatile bit RCSTA_OERR at RCSTA : 1
+var volatile bit RCSTA_RX9D at RCSTA : 0
+-- ------------------------------------------------
+var volatile byte TXSTA at 0x19E
+var volatile bit TXSTA_CSRC at TXSTA : 7
+var volatile bit TXSTA_TX9 at TXSTA : 6
+var volatile bit TXSTA_TXEN at TXSTA : 5
+var volatile bit TXSTA_SYNC at TXSTA : 4
+var volatile bit TXSTA_SENDB at TXSTA : 3
+var volatile bit TXSTA_BRGH at TXSTA : 2
+var volatile bit TXSTA_TRMT at TXSTA : 1
+var volatile bit TXSTA_TX9D at TXSTA : 0
+-- ------------------------------------------------
+var volatile byte BAUDCON at 0x19F
+var volatile bit BAUDCON_ABDOVF at BAUDCON : 7
+var volatile bit BAUDCON_RCIDL at BAUDCON : 6
+var volatile bit BAUDCON_SCKP at BAUDCON : 4
+var volatile bit BAUDCON_BRG16 at BAUDCON : 3
+var volatile bit BAUDCON_WUE at BAUDCON : 1
+var volatile bit BAUDCON_ABDEN at BAUDCON : 0
+-- ------------------------------------------------
+var volatile byte WPUA at 0x20C
+var volatile bit WPUA_WPUA5 at WPUA : 5
+-- ------------------------------------------------
+var volatile byte WPUB at 0x20D
+var volatile bit WPUB_WPUB7 at WPUB : 7
+var volatile bit WPUB_WPUB6 at WPUB : 6
+var volatile bit WPUB_WPUB5 at WPUB : 5
+var volatile bit WPUB_WPUB4 at WPUB : 4
+var volatile bit WPUB_WPUB3 at WPUB : 3
+var volatile bit WPUB_WPUB2 at WPUB : 2
+var volatile bit WPUB_WPUB1 at WPUB : 1
+var volatile bit WPUB_WPUB0 at WPUB : 0
+-- ------------------------------------------------
+var volatile byte SSP1BUF at 0x211
+var volatile bit*8 SSP1BUF_SSPBUF at SSP1BUF : 0
+-- ------------------------------------------------
+var volatile byte SSP1ADD at 0x212
+var volatile bit*8 SSP1ADD_SSPADD at SSP1ADD : 0
+-- ------------------------------------------------
+var volatile byte SSP1MSK at 0x213
+var volatile bit*8 SSP1MSK_SSPMSK at SSP1MSK : 0
+-- ------------------------------------------------
+var volatile byte SSP1STAT at 0x214
+var volatile bit SSP1STAT_SMP at SSP1STAT : 7
+var volatile bit SSP1STAT_CKE at SSP1STAT : 6
+var volatile bit SSP1STAT_D at SSP1STAT : 5
+var volatile bit SSP1STAT_NA at SSP1STAT : 5
+var volatile bit SSP1STAT_P at SSP1STAT : 4
+var volatile bit SSP1STAT_S at SSP1STAT : 3
+var volatile bit SSP1STAT_R at SSP1STAT : 2
+var volatile bit SSP1STAT_NW at SSP1STAT : 2
+var volatile bit SSP1STAT_UA at SSP1STAT : 1
+var volatile bit SSP1STAT_BF at SSP1STAT : 0
+-- ------------------------------------------------
+var volatile byte SSP1CON1 at 0x215
+var volatile bit SSP1CON1_WCOL at SSP1CON1 : 7
+var volatile bit SSP1CON1_SSPOV at SSP1CON1 : 6
+var volatile bit SSP1CON1_SSPEN at SSP1CON1 : 5
+var volatile bit SSP1CON1_CKP at SSP1CON1 : 4
+var volatile bit SSP1CON1_SSPM3 at SSP1CON1 : 3
+var volatile bit SSP1CON1_SSPM2 at SSP1CON1 : 2
+var volatile bit SSP1CON1_SSPM1 at SSP1CON1 : 1
+var volatile bit SSP1CON1_SSPM0 at SSP1CON1 : 0
+-- ------------------------------------------------
+var volatile byte SSP1CON2 at 0x216
+var volatile bit SSP1CON2_GCEN at SSP1CON2 : 7
+var volatile bit SSP1CON2_ACKSTAT at SSP1CON2 : 6
+var volatile bit SSP1CON2_ACKDT at SSP1CON2 : 5
+var volatile bit SSP1CON2_ACKEN at SSP1CON2 : 4
+var volatile bit SSP1CON2_RCEN at SSP1CON2 : 3
+var volatile bit SSP1CON2_PEN at SSP1CON2 : 2
+var volatile bit SSP1CON2_RSEN at SSP1CON2 : 1
+var volatile bit SSP1CON2_SEN at SSP1CON2 : 0
+-- ------------------------------------------------
+var volatile byte SSP1CON3 at 0x217
+var volatile bit SSP1CON3_ACKTIM at SSP1CON3 : 7
+var volatile bit SSP1CON3_PCIE at SSP1CON3 : 6
+var volatile bit SSP1CON3_SCIE at SSP1CON3 : 5
+var volatile bit SSP1CON3_BOEN at SSP1CON3 : 4
+var volatile bit SSP1CON3_SDAHT at SSP1CON3 : 3
+var volatile bit SSP1CON3_SBCDE at SSP1CON3 : 2
+var volatile bit SSP1CON3_AHEN at SSP1CON3 : 1
+var volatile bit SSP1CON3_DHEN at SSP1CON3 : 0
+-- ------------------------------------------------
+var volatile byte SSP2BUF at 0x219
+var volatile bit*8 SSP2BUF_SSPBUF at SSP2BUF : 0
+-- ------------------------------------------------
+var volatile byte SSP2ADD at 0x21A
+var volatile bit*8 SSP2ADD_SSPADD at SSP2ADD : 0
+-- ------------------------------------------------
+var volatile byte SSP2MSK at 0x21B
+var volatile bit*8 SSP2MSK_SSPMSK at SSP2MSK : 0
+-- ------------------------------------------------
+var volatile byte SSP2STAT at 0x21C
+var volatile bit SSP2STAT_SMP at SSP2STAT : 7
+var volatile bit SSP2STAT_CKE at SSP2STAT : 6
+var volatile bit SSP2STAT_D at SSP2STAT : 5
+var volatile bit SSP2STAT_NA at SSP2STAT : 5
+var volatile bit SSP2STAT_P at SSP2STAT : 4
+var volatile bit SSP2STAT_S at SSP2STAT : 3
+var volatile bit SSP2STAT_R at SSP2STAT : 2
+var volatile bit SSP2STAT_NW at SSP2STAT : 2
+var volatile bit SSP2STAT_UA at SSP2STAT : 1
+var volatile bit SSP2STAT_BF at SSP2STAT : 0
+-- ------------------------------------------------
+var volatile byte SSP2CON1 at 0x21D
+var volatile bit SSP2CON1_WCOL at SSP2CON1 : 7
+var volatile bit SSP2CON1_SSPOV at SSP2CON1 : 6
+var volatile bit SSP2CON1_SSPEN at SSP2CON1 : 5
+var volatile bit SSP2CON1_CKP at SSP2CON1 : 4
+var volatile bit SSP2CON1_SSPM3 at SSP2CON1 : 3
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16lf1933.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1675 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16LF1933
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16lf1933, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16lf1933.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16lf1933_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x2400
+const byte PICTYPE[] = "16LF1933"
+const byte DATASHEET[] = "41364"
+const byte PGMSPEC[] = "41360"
+--
+-- Vdd Range: 1.800-3.600 Nominal: 3.300
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16lf1933
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 4096 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PORTC at 0x00E
+var volatile bit PORTC_RC7 at PORTC : 7
+var volatile bit PORTC_RC6 at PORTC : 6
+var volatile bit PORTC_RC5 at PORTC : 5
+var volatile bit PORTC_RC4 at PORTC : 4
+var volatile bit PORTC_RC3 at PORTC : 3
+var volatile bit PORTC_RC2 at PORTC : 2
+var volatile bit PORTC_RC1 at PORTC : 1
+var volatile bit PORTC_RC0 at PORTC : 0
+-- ------------------------------------------------
+var volatile byte PORTE at 0x010
+var volatile bit PORTE_RE3 at PORTE : 3
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSPIF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCLIF at PIR2 : 3
+var volatile bit PIR2_LCDIF at PIR2 : 2
+var volatile bit PIR2_CCP2IF at PIR2 : 0
+-- ------------------------------------------------
+var volatile byte PIR3 at 0x013
+var volatile bit PIR3_CCP5IF at PIR3 : 6
+var volatile bit PIR3_CCP4IF at PIR3 : 5
+var volatile bit PIR3_CCP3IF at PIR3 : 4
+var volatile bit PIR3_TMR6IF at PIR3 : 3
+var volatile bit PIR3_TMR4IF at PIR3 : 1
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRM at CPSCON0 : 6
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_SEG2_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_SEG1_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_AN4_direction is pin_A5_direction
+alias pin_C2OUT_RA5_direction is pin_A5_direction
+alias pin_CPS7_direction is pin_A5_direction
+alias pin_SRNQ_RA5_direction is pin_A5_direction
+alias pin_SS_RA5_direction is pin_A5_direction
+alias pin_SEG5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_C1OUT_direction is pin_A4_direction
+alias pin_CPS6_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_SRQ_direction is pin_A4_direction
+alias pin_CCP5_direction is pin_A4_direction
+alias pin_SEG4_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_C1IN_POS_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_COM3_direction is pin_A3_direction
+alias pin_SEG15_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_C2IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+alias pin_COM2_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SEG7_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_C2OUT_RA0_direction is pin_A0_direction
+alias pin_SRNQ_RA0_direction is pin_A0_direction
+alias pin_SS_RA0_direction is pin_A0_direction
+alias pin_SEG12_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_ICSPDAT_direction is pin_B7_direction
+alias pin_ICDDAT_direction is pin_B7_direction
+alias pin_SEG13_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_ICSPCLK_direction is pin_B6_direction
+alias pin_ICDCLK_direction is pin_B6_direction
+alias pin_SEG14_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN13_direction is pin_B5_direction
+alias pin_CPS5_direction is pin_B5_direction
+alias pin_CCP3_RB5_direction is pin_B5_direction
+alias pin_P3A_RB5_direction is pin_B5_direction
+alias pin_T1G_RB5_direction is pin_B5_direction
+alias pin_COM1_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN11_direction is pin_B4_direction
+alias pin_CPS4_direction is pin_B4_direction
+alias pin_P1D_direction is pin_B4_direction
+alias pin_COM0_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_C12IN2_NEG_direction is pin_B3_direction
+alias pin_CPS3_direction is pin_B3_direction
+alias pin_CCP2_RB3_direction is pin_B3_direction
+alias pin_P2A_RB3_direction is pin_B3_direction
+alias pin_VLCD3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN8_direction is pin_B2_direction
+alias pin_CPS2_direction is pin_B2_direction
+alias pin_P1B_direction is pin_B2_direction
+alias pin_VLCD2_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN10_direction is pin_B1_direction
+alias pin_C12IN3_NEG_direction is pin_B1_direction
+alias pin_CPS1_direction is pin_B1_direction
+alias pin_P1C_direction is pin_B1_direction
+alias pin_VLCD1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_AN12_direction is pin_B0_direction
+alias pin_CPS0_direction is pin_B0_direction
+alias pin_CCP4_direction is pin_B0_direction
+alias pin_SRI_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_SEG0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISC at 0x08E
+var volatile byte PORTC_direction at TRISC
+--
+procedure PORTC_low_direction'put(byte in x) is
+ TRISC = (TRISC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low_direction'get() return byte is
+ return (TRISC & 0x0F)
+end function
+--
+procedure PORTC_high_direction'put(byte in x) is
+ TRISC = (TRISC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high_direction'get() return byte is
+ return (TRISC >> 4)
+end function
+--
+var volatile bit TRISC_TRISC7 at TRISC : 7
+var volatile bit pin_C7_direction at TRISC : 7
+alias pin_RX_direction is pin_C7_direction
+alias pin_DT_direction is pin_C7_direction
+alias pin_P3B_direction is pin_C7_direction
+alias pin_SEG8_direction is pin_C7_direction
+--
+var volatile bit TRISC_TRISC6 at TRISC : 6
+var volatile bit pin_C6_direction at TRISC : 6
+alias pin_TX_direction is pin_C6_direction
+alias pin_CK_direction is pin_C6_direction
+alias pin_CCP3_RC6_direction is pin_C6_direction
+alias pin_P3A_RC6_direction is pin_C6_direction
+alias pin_SEG9_direction is pin_C6_direction
+--
+var volatile bit TRISC_TRISC5 at TRISC : 5
+var volatile bit pin_C5_direction at TRISC : 5
+alias pin_SDO_direction is pin_C5_direction
+alias pin_SEG10_direction is pin_C5_direction
+--
+var volatile bit TRISC_TRISC4 at TRISC : 4
+var volatile bit pin_C4_direction at TRISC : 4
+alias pin_SDI_direction is pin_C4_direction
+alias pin_SDA_direction is pin_C4_direction
+alias pin_T1G_RC4_direction is pin_C4_direction
+alias pin_SEG11_direction is pin_C4_direction
+--
+var volatile bit TRISC_TRISC3 at TRISC : 3
+var volatile bit pin_C3_direction at TRISC : 3
+alias pin_SCK_direction is pin_C3_direction
+alias pin_SCL_direction is pin_C3_direction
+alias pin_SEG6_direction is pin_C3_direction
+--
+var volatile bit TRISC_TRISC2 at TRISC : 2
+var volatile bit pin_C2_direction at TRISC : 2
+alias pin_CCP1_direction is pin_C2_direction
+alias pin_P1A_direction is pin_C2_direction
+alias pin_SEG3_direction is pin_C2_direction
+--
+var volatile bit TRISC_TRISC1 at TRISC : 1
+var volatile bit pin_C1_direction at TRISC : 1
+alias pin_T1OSI_direction is pin_C1_direction
+alias pin_CCP2_RC1_direction is pin_C1_direction
+alias pin_P2A_RC1_direction is pin_C1_direction
+--
+var volatile bit TRISC_TRISC0 at TRISC : 0
+var volatile bit pin_C0_direction at TRISC : 0
+alias pin_T1OSO_direction is pin_C0_direction
+alias pin_T1CKI_direction is pin_C0_direction
+alias pin_P2B_direction is pin_C0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISE at 0x090
+var volatile byte PORTE_direction at TRISE
+--
+procedure PORTE_low_direction'put(byte in x) is
+ TRISE = (TRISE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low_direction'get() return byte is
+ return (TRISE & 0x0F)
+end function
+--
+procedure PORTE_high_direction'put(byte in x) is
+ TRISE = (TRISE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high_direction'get() return byte is
+ return (TRISE >> 4)
+end function
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSPIE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCLIE at PIE2 : 3
+var volatile bit PIE2_LCDIE at PIE2 : 2
+var volatile bit PIE2_CCP2IE at PIE2 : 0
+-- ------------------------------------------------
+var volatile byte PIE3 at 0x093
+var volatile bit PIE3_CCP5IE at PIE3 : 6
+var volatile bit PIE3_CCP4IE at PIE3 : 5
+var volatile bit PIE3_CCP3IE at PIE3 : 4
+var volatile bit PIE3_TMR6IE at PIE3 : 3
+var volatile bit PIE3_TMR4IE at PIE3 : 1
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_SEG2 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_SEG1 is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA5 at LATA : 5
+var volatile bit pin_A5 at PORTA : 5
+alias pin_AN4 is pin_A5
+alias pin_C2OUT_RA5 is pin_A5
+alias pin_CPS7 is pin_A5
+alias pin_SRNQ_RA5 is pin_A5
+alias pin_SS_RA5 is pin_A5
+alias pin_SEG5 is pin_A5
+--
+procedure pin_A5'put(bit in x at LATA : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_C1OUT is pin_A4
+alias pin_CPS6 is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_SRQ is pin_A4
+alias pin_CCP5 is pin_A4
+alias pin_SEG4 is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_C1IN_POS is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_COM3 is pin_A3
+alias pin_SEG15 is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_C2IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+alias pin_COM2 is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SEG7 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_C2OUT_RA0 is pin_A0
+alias pin_SRNQ_RA0 is pin_A0
+alias pin_SS_RA0 is pin_A0
+alias pin_SEG12 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_ICSPDAT is pin_B7
+alias pin_ICDDAT is pin_B7
+alias pin_SEG13 is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_ICSPCLK is pin_B6
+alias pin_ICDCLK is pin_B6
+alias pin_SEG14 is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN13 is pin_B5
+alias pin_CPS5 is pin_B5
+alias pin_CCP3_RB5 is pin_B5
+alias pin_P3A_RB5 is pin_B5
+alias pin_T1G_RB5 is pin_B5
+alias pin_COM1 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN11 is pin_B4
+alias pin_CPS4 is pin_B4
+alias pin_P1D is pin_B4
+alias pin_COM0 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_C12IN2_NEG is pin_B3
+alias pin_CPS3 is pin_B3
+alias pin_CCP2_RB3 is pin_B3
+alias pin_P2A_RB3 is pin_B3
+alias pin_VLCD3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN8 is pin_B2
+alias pin_CPS2 is pin_B2
+alias pin_P1B is pin_B2
+alias pin_VLCD2 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN10 is pin_B1
+alias pin_C12IN3_NEG is pin_B1
+alias pin_CPS1 is pin_B1
+alias pin_P1C is pin_B1
+alias pin_VLCD1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_AN12 is pin_B0
+alias pin_CPS0 is pin_B0
+alias pin_CCP4 is pin_B0
+alias pin_SRI is pin_B0
+alias pin_INT is pin_B0
+alias pin_SEG0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATC at 0x10E
+--
+procedure PORTC'put(byte in x) is
+ pragma inline
+ LATC = x
+end procedure
+--
+procedure PORTC_low'put(byte in x) is
+ LATC = (PORTC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low'get() return byte is
+ return (PORTC & 0x0F)
+end function
+--
+procedure PORTC_high'put(byte in x) is
+ LATC = (PORTC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high'get() return byte is
+ return (PORTC >> 4)
+end function
+--
+var volatile bit LATC_LATC7 at LATC : 7
+var volatile bit pin_C7 at PORTC : 7
+alias pin_RX is pin_C7
+alias pin_DT is pin_C7
+alias pin_P3B is pin_C7
+alias pin_SEG8 is pin_C7
+--
+procedure pin_C7'put(bit in x at LATC : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC6 at LATC : 6
+var volatile bit pin_C6 at PORTC : 6
+alias pin_TX is pin_C6
+alias pin_CK is pin_C6
+alias pin_CCP3_RC6 is pin_C6
+alias pin_P3A_RC6 is pin_C6
+alias pin_SEG9 is pin_C6
+--
+procedure pin_C6'put(bit in x at LATC : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC5 at LATC : 5
+var volatile bit pin_C5 at PORTC : 5
+alias pin_SDO is pin_C5
+alias pin_SEG10 is pin_C5
+--
+procedure pin_C5'put(bit in x at LATC : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC4 at LATC : 4
+var volatile bit pin_C4 at PORTC : 4
+alias pin_SDI is pin_C4
+alias pin_SDA is pin_C4
+alias pin_T1G_RC4 is pin_C4
+alias pin_SEG11 is pin_C4
+--
+procedure pin_C4'put(bit in x at LATC : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC3 at LATC : 3
+var volatile bit pin_C3 at PORTC : 3
+alias pin_SCK is pin_C3
+alias pin_SCL is pin_C3
+alias pin_SEG6 is pin_C3
+--
+procedure pin_C3'put(bit in x at LATC : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC2 at LATC : 2
+var volatile bit pin_C2 at PORTC : 2
+alias pin_CCP1 is pin_C2
+alias pin_P1A is pin_C2
+alias pin_SEG3 is pin_C2
+--
+procedure pin_C2'put(bit in x at LATC : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC1 at LATC : 1
+var volatile bit pin_C1 at PORTC : 1
+alias pin_T1OSI is pin_C1
+alias pin_CCP2_RC1 is pin_C1
+alias pin_P2A_RC1 is pin_C1
+--
+procedure pin_C1'put(bit in x at LATC : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC0 at LATC : 0
+var volatile bit pin_C0 at PORTC : 0
+alias pin_T1OSO is pin_C0
+alias pin_T1CKI is pin_C0
+alias pin_P2B is pin_C0
+--
+procedure pin_C0'put(bit in x at LATC : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATE at 0x110
+--
+procedure PORTE'put(byte in x) is
+ pragma inline
+ LATE = x
+end procedure
+--
+procedure PORTE_low'put(byte in x) is
+ LATE = (PORTE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low'get() return byte is
+ return (PORTE & 0x0F)
+end function
+--
+procedure PORTE_high'put(byte in x) is
+ LATE = (PORTE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high'get() return byte is
+ return (PORTE >> 4)
+end function
+--
+-- ------------------------------------------------
+var volatile byte CM1CON0 at 0x111
+var volatile bit CM1CON0_C1ON at CM1CON0 : 7
+var volatile bit CM1CON0_C1OUT at CM1CON0 : 6
+var volatile bit CM1CON0_C1OE at CM1CON0 : 5
+var volatile bit CM1CON0_C1POL at CM1CON0 : 4
+var volatile bit CM1CON0_C1SP at CM1CON0 : 2
+var volatile bit CM1CON0_C1HYS at CM1CON0 : 1
+var volatile bit CM1CON0_C1SYNC at CM1CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM1CON1 at 0x112
+var volatile bit CM1CON1_C1INTP at CM1CON1 : 7
+var volatile bit CM1CON1_C1INTN at CM1CON1 : 6
+var volatile bit CM1CON1_C1PCH1 at CM1CON1 : 5
+var volatile bit CM1CON1_C1PCH0 at CM1CON1 : 4
+var volatile bit CM1CON1_C1NCH1 at CM1CON1 : 1
+var volatile bit CM1CON1_C1NCH0 at CM1CON1 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON0 at 0x113
+var volatile bit CM2CON0_C2ON at CM2CON0 : 7
+var volatile bit CM2CON0_C2OUT at CM2CON0 : 6
+var volatile bit CM2CON0_C2OE at CM2CON0 : 5
+var volatile bit CM2CON0_C2POL at CM2CON0 : 4
+var volatile bit CM2CON0_C2SP at CM2CON0 : 2
+var volatile bit CM2CON0_C2HYS at CM2CON0 : 1
+var volatile bit CM2CON0_C2SYNC at CM2CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON1 at 0x114
+var volatile bit CM2CON1_C2INTP at CM2CON1 : 7
+var volatile bit CM2CON1_C2INTN at CM2CON1 : 6
+var volatile bit CM2CON1_C2PCH1 at CM2CON1 : 5
+var volatile bit CM2CON1_C2PCH0 at CM2CON1 : 4
+var volatile bit CM2CON1_C2NCH1 at CM2CON1 : 1
+var volatile bit CM2CON1_C2NCH0 at CM2CON1 : 0
+-- ------------------------------------------------
+var volatile byte CMOUT at 0x115
+var volatile bit CMOUT_MC2OUT at CMOUT : 1
+var volatile bit CMOUT_MC1OUT at CMOUT : 0
+-- ------------------------------------------------
+var volatile byte BORCON at 0x116
+var volatile bit BORCON_SBOREN at BORCON : 7
+var volatile bit BORCON_BORRDY at BORCON : 0
+-- ------------------------------------------------
+var volatile byte FVRCON at 0x117
+var volatile bit FVRCON_FVREN at FVRCON : 7
+var volatile bit FVRCON_FVRRDY at FVRCON : 6
+var volatile bit FVRCON_CDAFVR1 at FVRCON : 3
+var volatile bit FVRCON_CDAFVR0 at FVRCON : 2
+var volatile bit FVRCON_ADFVR1 at FVRCON : 1
+var volatile bit FVRCON_ADFVR0 at FVRCON : 0
+-- ------------------------------------------------
+var volatile byte DACCON0 at 0x118
+var volatile bit DACCON0_DACEN at DACCON0 : 7
+var volatile bit DACCON0_DACLPS at DACCON0 : 6
+var volatile bit DACCON0_DACOE at DACCON0 : 5
+var volatile bit DACCON0_DACPSS1 at DACCON0 : 3
+var volatile bit DACCON0_DACPSS0 at DACCON0 : 2
+var volatile bit DACCON0_DACNSS at DACCON0 : 0
+-- ------------------------------------------------
+var volatile byte DACCON1 at 0x119
+var volatile bit DACCON1_DACR4 at DACCON1 : 4
+var volatile bit DACCON1_DACR3 at DACCON1 : 3
+var volatile bit DACCON1_DACR2 at DACCON1 : 2
+var volatile bit DACCON1_DACR1 at DACCON1 : 1
+var volatile bit DACCON1_DACR0 at DACCON1 : 0
+-- ------------------------------------------------
+var volatile byte SRCON0 at 0x11A
+var volatile bit SRCON0_SRLEN at SRCON0 : 7
+var volatile bit SRCON0_SRCLK2 at SRCON0 : 6
+var volatile bit SRCON0_SRCLK1 at SRCON0 : 5
+var volatile bit SRCON0_SRCLK0 at SRCON0 : 4
+var volatile bit SRCON0_SRQEN at SRCON0 : 3
+var volatile bit SRCON0_SRNQEN at SRCON0 : 2
+var volatile bit SRCON0_SRPS at SRCON0 : 1
+var volatile bit SRCON0_SRPR at SRCON0 : 0
+-- ------------------------------------------------
+var volatile byte SRCON1 at 0x11B
+var volatile bit SRCON1_SRSPE at SRCON1 : 7
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16lf1934.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1941 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16LF1934
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16lf1934, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16lf1934.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16lf1934_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x2440
+const byte PICTYPE[] = "16LF1934"
+const byte DATASHEET[] = "41364"
+const byte PGMSPEC[] = "41360"
+--
+-- Vdd Range: 1.800-3.600 Nominal: 3.300
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16lf1934
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 4096 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PORTC at 0x00E
+var volatile bit PORTC_RC7 at PORTC : 7
+var volatile bit PORTC_RC6 at PORTC : 6
+var volatile bit PORTC_RC5 at PORTC : 5
+var volatile bit PORTC_RC4 at PORTC : 4
+var volatile bit PORTC_RC3 at PORTC : 3
+var volatile bit PORTC_RC2 at PORTC : 2
+var volatile bit PORTC_RC1 at PORTC : 1
+var volatile bit PORTC_RC0 at PORTC : 0
+-- ------------------------------------------------
+var volatile byte PORTD at 0x00F
+var volatile bit PORTD_RD7 at PORTD : 7
+var volatile bit PORTD_RD6 at PORTD : 6
+var volatile bit PORTD_RD5 at PORTD : 5
+var volatile bit PORTD_RD4 at PORTD : 4
+var volatile bit PORTD_RD3 at PORTD : 3
+var volatile bit PORTD_RD2 at PORTD : 2
+var volatile bit PORTD_RD1 at PORTD : 1
+var volatile bit PORTD_RD0 at PORTD : 0
+-- ------------------------------------------------
+var volatile byte PORTE at 0x010
+var volatile bit PORTE_RE3 at PORTE : 3
+var volatile bit PORTE_RE2 at PORTE : 2
+var volatile bit PORTE_RE1 at PORTE : 1
+var volatile bit PORTE_RE0 at PORTE : 0
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSPIF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCLIF at PIR2 : 3
+var volatile bit PIR2_LCDIF at PIR2 : 2
+var volatile bit PIR2_CCP2IF at PIR2 : 0
+-- ------------------------------------------------
+var volatile byte PIR3 at 0x013
+var volatile bit PIR3_CCP5IF at PIR3 : 6
+var volatile bit PIR3_CCP4IF at PIR3 : 5
+var volatile bit PIR3_CCP3IF at PIR3 : 4
+var volatile bit PIR3_TMR6IF at PIR3 : 3
+var volatile bit PIR3_TMR4IF at PIR3 : 1
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH3 at CPSCON1 : 3
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_SEG2_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_SEG1_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_AN4_direction is pin_A5_direction
+alias pin_C2OUT_RA5_direction is pin_A5_direction
+alias pin_CPS7_direction is pin_A5_direction
+alias pin_SRNQ_RA5_direction is pin_A5_direction
+alias pin_SS_RA5_direction is pin_A5_direction
+alias pin_SEG5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_C1OUT_direction is pin_A4_direction
+alias pin_CPS6_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_SRQ_direction is pin_A4_direction
+alias pin_SEG4_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_C1IN_POS_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_SEG15_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_C2IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+alias pin_COM2_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SEG7_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_C2OUT_RA0_direction is pin_A0_direction
+alias pin_SRNQ_RA0_direction is pin_A0_direction
+alias pin_SS_RA0_direction is pin_A0_direction
+alias pin_SEG12_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_ICSPDAT_direction is pin_B7_direction
+alias pin_ICDDAT_direction is pin_B7_direction
+alias pin_SEG13_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_ICSPCLK_direction is pin_B6_direction
+alias pin_ICDCLK_direction is pin_B6_direction
+alias pin_SEG14_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN13_direction is pin_B5_direction
+alias pin_CPS5_direction is pin_B5_direction
+alias pin_CCP3_RB5_direction is pin_B5_direction
+alias pin_P3A_RB5_direction is pin_B5_direction
+alias pin_T1G_RB5_direction is pin_B5_direction
+alias pin_COM1_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN11_direction is pin_B4_direction
+alias pin_CPS4_direction is pin_B4_direction
+alias pin_COM0_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_C12IN2_NEG_direction is pin_B3_direction
+alias pin_CPS3_direction is pin_B3_direction
+alias pin_CCP2_RB3_direction is pin_B3_direction
+alias pin_P2A_RB3_direction is pin_B3_direction
+alias pin_VLCD3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN8_direction is pin_B2_direction
+alias pin_CPS2_direction is pin_B2_direction
+alias pin_VLCD2_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN10_direction is pin_B1_direction
+alias pin_C12IN3_NEG_direction is pin_B1_direction
+alias pin_CPS1_direction is pin_B1_direction
+alias pin_VLCD1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_AN12_direction is pin_B0_direction
+alias pin_CPS0_direction is pin_B0_direction
+alias pin_SRI_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_SEG0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISC at 0x08E
+var volatile byte PORTC_direction at TRISC
+--
+procedure PORTC_low_direction'put(byte in x) is
+ TRISC = (TRISC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low_direction'get() return byte is
+ return (TRISC & 0x0F)
+end function
+--
+procedure PORTC_high_direction'put(byte in x) is
+ TRISC = (TRISC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high_direction'get() return byte is
+ return (TRISC >> 4)
+end function
+--
+var volatile bit TRISC_TRISC7 at TRISC : 7
+var volatile bit pin_C7_direction at TRISC : 7
+alias pin_RX_direction is pin_C7_direction
+alias pin_DT_direction is pin_C7_direction
+alias pin_SEG8_direction is pin_C7_direction
+--
+var volatile bit TRISC_TRISC6 at TRISC : 6
+var volatile bit pin_C6_direction at TRISC : 6
+alias pin_TX_direction is pin_C6_direction
+alias pin_CK_direction is pin_C6_direction
+alias pin_SEG9_direction is pin_C6_direction
+--
+var volatile bit TRISC_TRISC5 at TRISC : 5
+var volatile bit pin_C5_direction at TRISC : 5
+alias pin_SDO_direction is pin_C5_direction
+alias pin_SEG10_direction is pin_C5_direction
+--
+var volatile bit TRISC_TRISC4 at TRISC : 4
+var volatile bit pin_C4_direction at TRISC : 4
+alias pin_SDI_direction is pin_C4_direction
+alias pin_SDA_direction is pin_C4_direction
+alias pin_T1G_RC4_direction is pin_C4_direction
+alias pin_SEG11_direction is pin_C4_direction
+--
+var volatile bit TRISC_TRISC3 at TRISC : 3
+var volatile bit pin_C3_direction at TRISC : 3
+alias pin_SCL_direction is pin_C3_direction
+alias pin_SCK_direction is pin_C3_direction
+alias pin_SEG6_direction is pin_C3_direction
+--
+var volatile bit TRISC_TRISC2 at TRISC : 2
+var volatile bit pin_C2_direction at TRISC : 2
+alias pin_CCP1_direction is pin_C2_direction
+alias pin_P1A_direction is pin_C2_direction
+alias pin_SEG3_direction is pin_C2_direction
+--
+var volatile bit TRISC_TRISC1 at TRISC : 1
+var volatile bit pin_C1_direction at TRISC : 1
+alias pin_T1OSI_direction is pin_C1_direction
+alias pin_CCP2_RC1_direction is pin_C1_direction
+alias pin_P2A_RC1_direction is pin_C1_direction
+--
+var volatile bit TRISC_TRISC0 at TRISC : 0
+var volatile bit pin_C0_direction at TRISC : 0
+alias pin_T1OSO_direction is pin_C0_direction
+alias pin_T1CKI_direction is pin_C0_direction
+alias pin_P2B_RC0_direction is pin_C0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISD at 0x08F
+var volatile byte PORTD_direction at TRISD
+--
+procedure PORTD_low_direction'put(byte in x) is
+ TRISD = (TRISD & 0xF0) | (x & 0x0F)
+end procedure
+function PORTD_low_direction'get() return byte is
+ return (TRISD & 0x0F)
+end function
+--
+procedure PORTD_high_direction'put(byte in x) is
+ TRISD = (TRISD & 0x0F) | (x << 4)
+end procedure
+function PORTD_high_direction'get() return byte is
+ return (TRISD >> 4)
+end function
+--
+var volatile bit TRISD_TRISD7 at TRISD : 7
+var volatile bit pin_D7_direction at TRISD : 7
+alias pin_CPS15_direction is pin_D7_direction
+alias pin_P1D_direction is pin_D7_direction
+alias pin_SEG20_direction is pin_D7_direction
+--
+var volatile bit TRISD_TRISD6 at TRISD : 6
+var volatile bit pin_D6_direction at TRISD : 6
+alias pin_CPS14_direction is pin_D6_direction
+alias pin_P1C_direction is pin_D6_direction
+alias pin_SEG19_direction is pin_D6_direction
+--
+var volatile bit TRISD_TRISD5 at TRISD : 5
+var volatile bit pin_D5_direction at TRISD : 5
+alias pin_CPS13_direction is pin_D5_direction
+alias pin_P1B_direction is pin_D5_direction
+alias pin_SEG18_direction is pin_D5_direction
+--
+var volatile bit TRISD_TRISD4 at TRISD : 4
+var volatile bit pin_D4_direction at TRISD : 4
+alias pin_CPS12_direction is pin_D4_direction
+alias pin_P2D_direction is pin_D4_direction
+alias pin_SEG17_direction is pin_D4_direction
+--
+var volatile bit TRISD_TRISD3 at TRISD : 3
+var volatile bit pin_D3_direction at TRISD : 3
+alias pin_CPS11_direction is pin_D3_direction
+alias pin_P2C_direction is pin_D3_direction
+alias pin_SEG16_direction is pin_D3_direction
+--
+var volatile bit TRISD_TRISD2 at TRISD : 2
+var volatile bit pin_D2_direction at TRISD : 2
+alias pin_CPS10_direction is pin_D2_direction
+alias pin_P2B_RD2_direction is pin_D2_direction
+--
+var volatile bit TRISD_TRISD1 at TRISD : 1
+var volatile bit pin_D1_direction at TRISD : 1
+alias pin_CPS9_direction is pin_D1_direction
+alias pin_CCP4_direction is pin_D1_direction
+--
+var volatile bit TRISD_TRISD0 at TRISD : 0
+var volatile bit pin_D0_direction at TRISD : 0
+alias pin_CPS8_direction is pin_D0_direction
+alias pin_COM3_direction is pin_D0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISE at 0x090
+var volatile byte PORTE_direction at TRISE
+--
+procedure PORTE_low_direction'put(byte in x) is
+ TRISE = (TRISE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low_direction'get() return byte is
+ return (TRISE & 0x0F)
+end function
+--
+procedure PORTE_high_direction'put(byte in x) is
+ TRISE = (TRISE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high_direction'get() return byte is
+ return (TRISE >> 4)
+end function
+--
+var volatile bit TRISE_TRISE2 at TRISE : 2
+var volatile bit pin_E2_direction at TRISE : 2
+alias pin_AN7_direction is pin_E2_direction
+alias pin_CCP5_direction is pin_E2_direction
+alias pin_SEG23_direction is pin_E2_direction
+--
+var volatile bit TRISE_TRISE1 at TRISE : 1
+var volatile bit pin_E1_direction at TRISE : 1
+alias pin_AN6_direction is pin_E1_direction
+alias pin_P3B_direction is pin_E1_direction
+alias pin_SEG22_direction is pin_E1_direction
+--
+var volatile bit TRISE_TRISE0 at TRISE : 0
+var volatile bit pin_E0_direction at TRISE : 0
+alias pin_AN5_direction is pin_E0_direction
+alias pin_P3A_RE0_direction is pin_E0_direction
+alias pin_CCP3_RE0_direction is pin_E0_direction
+alias pin_SEG21_direction is pin_E0_direction
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSPIE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCLIE at PIE2 : 3
+var volatile bit PIE2_LCDIE at PIE2 : 2
+var volatile bit PIE2_CCP2IE at PIE2 : 0
+-- ------------------------------------------------
+var volatile byte PIE3 at 0x093
+var volatile bit PIE3_CCP5IE at PIE3 : 6
+var volatile bit PIE3_CCP4IE at PIE3 : 5
+var volatile bit PIE3_CCP3IE at PIE3 : 4
+var volatile bit PIE3_TMR6IE at PIE3 : 3
+var volatile bit PIE3_TMR4IE at PIE3 : 1
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_SEG2 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_SEG1 is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA5 at LATA : 5
+var volatile bit pin_A5 at PORTA : 5
+alias pin_AN4 is pin_A5
+alias pin_C2OUT_RA5 is pin_A5
+alias pin_CPS7 is pin_A5
+alias pin_SRNQ_RA5 is pin_A5
+alias pin_SS_RA5 is pin_A5
+alias pin_SEG5 is pin_A5
+--
+procedure pin_A5'put(bit in x at LATA : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_C1OUT is pin_A4
+alias pin_CPS6 is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_SRQ is pin_A4
+alias pin_SEG4 is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_C1IN_POS is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_SEG15 is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_C2IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+alias pin_COM2 is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SEG7 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_C2OUT_RA0 is pin_A0
+alias pin_SRNQ_RA0 is pin_A0
+alias pin_SS_RA0 is pin_A0
+alias pin_SEG12 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_ICSPDAT is pin_B7
+alias pin_ICDDAT is pin_B7
+alias pin_SEG13 is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_ICSPCLK is pin_B6
+alias pin_ICDCLK is pin_B6
+alias pin_SEG14 is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN13 is pin_B5
+alias pin_CPS5 is pin_B5
+alias pin_CCP3_RB5 is pin_B5
+alias pin_P3A_RB5 is pin_B5
+alias pin_T1G_RB5 is pin_B5
+alias pin_COM1 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN11 is pin_B4
+alias pin_CPS4 is pin_B4
+alias pin_COM0 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_C12IN2_NEG is pin_B3
+alias pin_CPS3 is pin_B3
+alias pin_CCP2_RB3 is pin_B3
+alias pin_P2A_RB3 is pin_B3
+alias pin_VLCD3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN8 is pin_B2
+alias pin_CPS2 is pin_B2
+alias pin_VLCD2 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN10 is pin_B1
+alias pin_C12IN3_NEG is pin_B1
+alias pin_CPS1 is pin_B1
+alias pin_VLCD1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_AN12 is pin_B0
+alias pin_CPS0 is pin_B0
+alias pin_SRI is pin_B0
+alias pin_INT is pin_B0
+alias pin_SEG0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATC at 0x10E
+--
+procedure PORTC'put(byte in x) is
+ pragma inline
+ LATC = x
+end procedure
+--
+procedure PORTC_low'put(byte in x) is
+ LATC = (PORTC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low'get() return byte is
+ return (PORTC & 0x0F)
+end function
+--
+procedure PORTC_high'put(byte in x) is
+ LATC = (PORTC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high'get() return byte is
+ return (PORTC >> 4)
+end function
+--
+var volatile bit LATC_LATC7 at LATC : 7
+var volatile bit pin_C7 at PORTC : 7
+alias pin_RX is pin_C7
+alias pin_DT is pin_C7
+alias pin_SEG8 is pin_C7
+--
+procedure pin_C7'put(bit in x at LATC : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC6 at LATC : 6
+var volatile bit pin_C6 at PORTC : 6
+alias pin_TX is pin_C6
+alias pin_CK is pin_C6
+alias pin_SEG9 is pin_C6
+--
+procedure pin_C6'put(bit in x at LATC : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC5 at LATC : 5
+var volatile bit pin_C5 at PORTC : 5
+alias pin_SDO is pin_C5
+alias pin_SEG10 is pin_C5
+--
+procedure pin_C5'put(bit in x at LATC : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC4 at LATC : 4
+var volatile bit pin_C4 at PORTC : 4
+alias pin_SDI is pin_C4
+alias pin_SDA is pin_C4
+alias pin_T1G_RC4 is pin_C4
+alias pin_SEG11 is pin_C4
+--
+procedure pin_C4'put(bit in x at LATC : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC3 at LATC : 3
+var volatile bit pin_C3 at PORTC : 3
+alias pin_SCL is pin_C3
+alias pin_SCK is pin_C3
+alias pin_SEG6 is pin_C3
+--
+procedure pin_C3'put(bit in x at LATC : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC2 at LATC : 2
+var volatile bit pin_C2 at PORTC : 2
+alias pin_CCP1 is pin_C2
+alias pin_P1A is pin_C2
+alias pin_SEG3 is pin_C2
+--
+procedure pin_C2'put(bit in x at LATC : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC1 at LATC : 1
+var volatile bit pin_C1 at PORTC : 1
+alias pin_T1OSI is pin_C1
+alias pin_CCP2_RC1 is pin_C1
+alias pin_P2A_RC1 is pin_C1
+--
+procedure pin_C1'put(bit in x at LATC : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC0 at LATC : 0
+var volatile bit pin_C0 at PORTC : 0
+alias pin_T1OSO is pin_C0
+alias pin_T1CKI is pin_C0
+alias pin_P2B_RC0 is pin_C0
+--
+procedure pin_C0'put(bit in x at LATC : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATD at 0x10F
+--
+procedure PORTD'put(byte in x) is
+ pragma inline
+ LATD = x
+end procedure
+--
+procedure PORTD_low'put(byte in x) is
+ LATD = (PORTD & 0xF0) | (x & 0x0F)
+end procedure
+function PORTD_low'get() return byte is
+ return (PORTD & 0x0F)
+end function
+--
+procedure PORTD_high'put(byte in x) is
+ LATD = (PORTD & 0x0F) | (x << 4)
+end procedure
+function PORTD_high'get() return byte is
+ return (PORTD >> 4)
+end function
+--
+var volatile bit LATD_LATD7 at LATD : 7
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16lf1936.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1675 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16LF1936
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16lf1936, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16lf1936.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16lf1936_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x2460
+const byte PICTYPE[] = "16LF1936"
+const byte DATASHEET[] = "41364"
+const byte PGMSPEC[] = "41360"
+--
+-- Vdd Range: 1.800-3.600 Nominal: 3.300
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16lf1936
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 8192 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F,0x1A0-0x1EF,0x220-0x26F
+pragma data 0x2A0-0x2EF,0x320-0x32F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PORTC at 0x00E
+var volatile bit PORTC_RC7 at PORTC : 7
+var volatile bit PORTC_RC6 at PORTC : 6
+var volatile bit PORTC_RC5 at PORTC : 5
+var volatile bit PORTC_RC4 at PORTC : 4
+var volatile bit PORTC_RC3 at PORTC : 3
+var volatile bit PORTC_RC2 at PORTC : 2
+var volatile bit PORTC_RC1 at PORTC : 1
+var volatile bit PORTC_RC0 at PORTC : 0
+-- ------------------------------------------------
+var volatile byte PORTE at 0x010
+var volatile bit PORTE_RE3 at PORTE : 3
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSPIF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCLIF at PIR2 : 3
+var volatile bit PIR2_LCDIF at PIR2 : 2
+var volatile bit PIR2_CCP2IF at PIR2 : 0
+-- ------------------------------------------------
+var volatile byte PIR3 at 0x013
+var volatile bit PIR3_CCP5IF at PIR3 : 6
+var volatile bit PIR3_CCP4IF at PIR3 : 5
+var volatile bit PIR3_CCP3IF at PIR3 : 4
+var volatile bit PIR3_TMR6IF at PIR3 : 3
+var volatile bit PIR3_TMR4IF at PIR3 : 1
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_SEG2_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_SEG1_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_AN4_direction is pin_A5_direction
+alias pin_C2OUT_RA5_direction is pin_A5_direction
+alias pin_CPS7_direction is pin_A5_direction
+alias pin_SRNQ_RA5_direction is pin_A5_direction
+alias pin_SS_RA5_direction is pin_A5_direction
+alias pin_SEG5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_C1OUT_direction is pin_A4_direction
+alias pin_CPS6_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_SRQ_direction is pin_A4_direction
+alias pin_CCP5_direction is pin_A4_direction
+alias pin_SEG4_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_C1IN_POS_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_COM3_direction is pin_A3_direction
+alias pin_SEG15_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_C2IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+alias pin_COM2_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SEG7_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_C2OUT_RA0_direction is pin_A0_direction
+alias pin_SRNQ_RA0_direction is pin_A0_direction
+alias pin_SS_RA0_direction is pin_A0_direction
+alias pin_SEG12_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_ICSPDAT_direction is pin_B7_direction
+alias pin_ICDDAT_direction is pin_B7_direction
+alias pin_SEG13_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_ICSPCLK_direction is pin_B6_direction
+alias pin_ICDCLK_direction is pin_B6_direction
+alias pin_SEG14_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN13_direction is pin_B5_direction
+alias pin_CPS5_direction is pin_B5_direction
+alias pin_CCP3_RB5_direction is pin_B5_direction
+alias pin_P3A_RB5_direction is pin_B5_direction
+alias pin_T1G_RB5_direction is pin_B5_direction
+alias pin_COM1_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN11_direction is pin_B4_direction
+alias pin_CPS4_direction is pin_B4_direction
+alias pin_P1D_direction is pin_B4_direction
+alias pin_COM0_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_C12IN2_NEG_direction is pin_B3_direction
+alias pin_CPS3_direction is pin_B3_direction
+alias pin_CCP2_RB3_direction is pin_B3_direction
+alias pin_P2A_RB3_direction is pin_B3_direction
+alias pin_VLCD3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN8_direction is pin_B2_direction
+alias pin_CPS2_direction is pin_B2_direction
+alias pin_P1B_direction is pin_B2_direction
+alias pin_VLCD2_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN10_direction is pin_B1_direction
+alias pin_C12IN3_NEG_direction is pin_B1_direction
+alias pin_CPS1_direction is pin_B1_direction
+alias pin_P1C_direction is pin_B1_direction
+alias pin_VLCD1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_AN12_direction is pin_B0_direction
+alias pin_CPS0_direction is pin_B0_direction
+alias pin_CCP4_direction is pin_B0_direction
+alias pin_SRI_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_SEG0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISC at 0x08E
+var volatile byte PORTC_direction at TRISC
+--
+procedure PORTC_low_direction'put(byte in x) is
+ TRISC = (TRISC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low_direction'get() return byte is
+ return (TRISC & 0x0F)
+end function
+--
+procedure PORTC_high_direction'put(byte in x) is
+ TRISC = (TRISC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high_direction'get() return byte is
+ return (TRISC >> 4)
+end function
+--
+var volatile bit TRISC_TRISC7 at TRISC : 7
+var volatile bit pin_C7_direction at TRISC : 7
+alias pin_RX_direction is pin_C7_direction
+alias pin_DT_direction is pin_C7_direction
+alias pin_P3B_direction is pin_C7_direction
+alias pin_SEG8_direction is pin_C7_direction
+--
+var volatile bit TRISC_TRISC6 at TRISC : 6
+var volatile bit pin_C6_direction at TRISC : 6
+alias pin_TX_direction is pin_C6_direction
+alias pin_CK_direction is pin_C6_direction
+alias pin_CCP3_RC6_direction is pin_C6_direction
+alias pin_P3A_RC6_direction is pin_C6_direction
+alias pin_SEG9_direction is pin_C6_direction
+--
+var volatile bit TRISC_TRISC5 at TRISC : 5
+var volatile bit pin_C5_direction at TRISC : 5
+alias pin_SDO_direction is pin_C5_direction
+alias pin_SEG10_direction is pin_C5_direction
+--
+var volatile bit TRISC_TRISC4 at TRISC : 4
+var volatile bit pin_C4_direction at TRISC : 4
+alias pin_SDI_direction is pin_C4_direction
+alias pin_SDA_direction is pin_C4_direction
+alias pin_T1G_RC4_direction is pin_C4_direction
+alias pin_SEG11_direction is pin_C4_direction
+--
+var volatile bit TRISC_TRISC3 at TRISC : 3
+var volatile bit pin_C3_direction at TRISC : 3
+alias pin_SCK_direction is pin_C3_direction
+alias pin_SCL_direction is pin_C3_direction
+alias pin_SEG6_direction is pin_C3_direction
+--
+var volatile bit TRISC_TRISC2 at TRISC : 2
+var volatile bit pin_C2_direction at TRISC : 2
+alias pin_CCP1_direction is pin_C2_direction
+alias pin_P1A_direction is pin_C2_direction
+alias pin_SEG3_direction is pin_C2_direction
+--
+var volatile bit TRISC_TRISC1 at TRISC : 1
+var volatile bit pin_C1_direction at TRISC : 1
+alias pin_T1OSI_direction is pin_C1_direction
+alias pin_CCP2_RC1_direction is pin_C1_direction
+alias pin_P2A_RC1_direction is pin_C1_direction
+--
+var volatile bit TRISC_TRISC0 at TRISC : 0
+var volatile bit pin_C0_direction at TRISC : 0
+alias pin_T1OSO_direction is pin_C0_direction
+alias pin_T1CKI_direction is pin_C0_direction
+alias pin_P2B_direction is pin_C0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISE at 0x090
+var volatile byte PORTE_direction at TRISE
+--
+procedure PORTE_low_direction'put(byte in x) is
+ TRISE = (TRISE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low_direction'get() return byte is
+ return (TRISE & 0x0F)
+end function
+--
+procedure PORTE_high_direction'put(byte in x) is
+ TRISE = (TRISE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high_direction'get() return byte is
+ return (TRISE >> 4)
+end function
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSPIE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCLIE at PIE2 : 3
+var volatile bit PIE2_LCDIE at PIE2 : 2
+var volatile bit PIE2_CCP2IE at PIE2 : 0
+-- ------------------------------------------------
+var volatile byte PIE3 at 0x093
+var volatile bit PIE3_CCP5IE at PIE3 : 6
+var volatile bit PIE3_CCP4IE at PIE3 : 5
+var volatile bit PIE3_CCP3IE at PIE3 : 4
+var volatile bit PIE3_TMR6IE at PIE3 : 3
+var volatile bit PIE3_TMR4IE at PIE3 : 1
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_SEG2 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_SEG1 is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA5 at LATA : 5
+var volatile bit pin_A5 at PORTA : 5
+alias pin_AN4 is pin_A5
+alias pin_C2OUT_RA5 is pin_A5
+alias pin_CPS7 is pin_A5
+alias pin_SRNQ_RA5 is pin_A5
+alias pin_SS_RA5 is pin_A5
+alias pin_SEG5 is pin_A5
+--
+procedure pin_A5'put(bit in x at LATA : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_C1OUT is pin_A4
+alias pin_CPS6 is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_SRQ is pin_A4
+alias pin_CCP5 is pin_A4
+alias pin_SEG4 is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_C1IN_POS is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_COM3 is pin_A3
+alias pin_SEG15 is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_C2IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+alias pin_COM2 is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SEG7 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_C2OUT_RA0 is pin_A0
+alias pin_SRNQ_RA0 is pin_A0
+alias pin_SS_RA0 is pin_A0
+alias pin_SEG12 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_ICSPDAT is pin_B7
+alias pin_ICDDAT is pin_B7
+alias pin_SEG13 is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_ICSPCLK is pin_B6
+alias pin_ICDCLK is pin_B6
+alias pin_SEG14 is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN13 is pin_B5
+alias pin_CPS5 is pin_B5
+alias pin_CCP3_RB5 is pin_B5
+alias pin_P3A_RB5 is pin_B5
+alias pin_T1G_RB5 is pin_B5
+alias pin_COM1 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN11 is pin_B4
+alias pin_CPS4 is pin_B4
+alias pin_P1D is pin_B4
+alias pin_COM0 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_C12IN2_NEG is pin_B3
+alias pin_CPS3 is pin_B3
+alias pin_CCP2_RB3 is pin_B3
+alias pin_P2A_RB3 is pin_B3
+alias pin_VLCD3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN8 is pin_B2
+alias pin_CPS2 is pin_B2
+alias pin_P1B is pin_B2
+alias pin_VLCD2 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN10 is pin_B1
+alias pin_C12IN3_NEG is pin_B1
+alias pin_CPS1 is pin_B1
+alias pin_P1C is pin_B1
+alias pin_VLCD1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_AN12 is pin_B0
+alias pin_CPS0 is pin_B0
+alias pin_CCP4 is pin_B0
+alias pin_SRI is pin_B0
+alias pin_INT is pin_B0
+alias pin_SEG0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATC at 0x10E
+--
+procedure PORTC'put(byte in x) is
+ pragma inline
+ LATC = x
+end procedure
+--
+procedure PORTC_low'put(byte in x) is
+ LATC = (PORTC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low'get() return byte is
+ return (PORTC & 0x0F)
+end function
+--
+procedure PORTC_high'put(byte in x) is
+ LATC = (PORTC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high'get() return byte is
+ return (PORTC >> 4)
+end function
+--
+var volatile bit LATC_LATC7 at LATC : 7
+var volatile bit pin_C7 at PORTC : 7
+alias pin_RX is pin_C7
+alias pin_DT is pin_C7
+alias pin_P3B is pin_C7
+alias pin_SEG8 is pin_C7
+--
+procedure pin_C7'put(bit in x at LATC : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC6 at LATC : 6
+var volatile bit pin_C6 at PORTC : 6
+alias pin_TX is pin_C6
+alias pin_CK is pin_C6
+alias pin_CCP3_RC6 is pin_C6
+alias pin_P3A_RC6 is pin_C6
+alias pin_SEG9 is pin_C6
+--
+procedure pin_C6'put(bit in x at LATC : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC5 at LATC : 5
+var volatile bit pin_C5 at PORTC : 5
+alias pin_SDO is pin_C5
+alias pin_SEG10 is pin_C5
+--
+procedure pin_C5'put(bit in x at LATC : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC4 at LATC : 4
+var volatile bit pin_C4 at PORTC : 4
+alias pin_SDI is pin_C4
+alias pin_SDA is pin_C4
+alias pin_T1G_RC4 is pin_C4
+alias pin_SEG11 is pin_C4
+--
+procedure pin_C4'put(bit in x at LATC : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC3 at LATC : 3
+var volatile bit pin_C3 at PORTC : 3
+alias pin_SCK is pin_C3
+alias pin_SCL is pin_C3
+alias pin_SEG6 is pin_C3
+--
+procedure pin_C3'put(bit in x at LATC : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC2 at LATC : 2
+var volatile bit pin_C2 at PORTC : 2
+alias pin_CCP1 is pin_C2
+alias pin_P1A is pin_C2
+alias pin_SEG3 is pin_C2
+--
+procedure pin_C2'put(bit in x at LATC : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC1 at LATC : 1
+var volatile bit pin_C1 at PORTC : 1
+alias pin_T1OSI is pin_C1
+alias pin_CCP2_RC1 is pin_C1
+alias pin_P2A_RC1 is pin_C1
+--
+procedure pin_C1'put(bit in x at LATC : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC0 at LATC : 0
+var volatile bit pin_C0 at PORTC : 0
+alias pin_T1OSO is pin_C0
+alias pin_T1CKI is pin_C0
+alias pin_P2B is pin_C0
+--
+procedure pin_C0'put(bit in x at LATC : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATE at 0x110
+--
+procedure PORTE'put(byte in x) is
+ pragma inline
+ LATE = x
+end procedure
+--
+procedure PORTE_low'put(byte in x) is
+ LATE = (PORTE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low'get() return byte is
+ return (PORTE & 0x0F)
+end function
+--
+procedure PORTE_high'put(byte in x) is
+ LATE = (PORTE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high'get() return byte is
+ return (PORTE >> 4)
+end function
+--
+-- ------------------------------------------------
+var volatile byte CM1CON0 at 0x111
+var volatile bit CM1CON0_C1ON at CM1CON0 : 7
+var volatile bit CM1CON0_C1OUT at CM1CON0 : 6
+var volatile bit CM1CON0_C1OE at CM1CON0 : 5
+var volatile bit CM1CON0_C1POL at CM1CON0 : 4
+var volatile bit CM1CON0_C1SP at CM1CON0 : 2
+var volatile bit CM1CON0_C1HYS at CM1CON0 : 1
+var volatile bit CM1CON0_C1SYNC at CM1CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM1CON1 at 0x112
+var volatile bit CM1CON1_C1INTP at CM1CON1 : 7
+var volatile bit CM1CON1_C1INTN at CM1CON1 : 6
+var volatile bit CM1CON1_C1PCH1 at CM1CON1 : 5
+var volatile bit CM1CON1_C1PCH0 at CM1CON1 : 4
+var volatile bit CM1CON1_C1NCH1 at CM1CON1 : 1
+var volatile bit CM1CON1_C1NCH0 at CM1CON1 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON0 at 0x113
+var volatile bit CM2CON0_C2ON at CM2CON0 : 7
+var volatile bit CM2CON0_C2OUT at CM2CON0 : 6
+var volatile bit CM2CON0_C2OE at CM2CON0 : 5
+var volatile bit CM2CON0_C2POL at CM2CON0 : 4
+var volatile bit CM2CON0_C2SP at CM2CON0 : 2
+var volatile bit CM2CON0_C2HYS at CM2CON0 : 1
+var volatile bit CM2CON0_C2SYNC at CM2CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON1 at 0x114
+var volatile bit CM2CON1_C2INTP at CM2CON1 : 7
+var volatile bit CM2CON1_C2INTN at CM2CON1 : 6
+var volatile bit CM2CON1_C2PCH1 at CM2CON1 : 5
+var volatile bit CM2CON1_C2PCH0 at CM2CON1 : 4
+var volatile bit CM2CON1_C2NCH1 at CM2CON1 : 1
+var volatile bit CM2CON1_C2NCH0 at CM2CON1 : 0
+-- ------------------------------------------------
+var volatile byte CMOUT at 0x115
+var volatile bit CMOUT_MC2OUT at CMOUT : 1
+var volatile bit CMOUT_MC1OUT at CMOUT : 0
+-- ------------------------------------------------
+var volatile byte BORCON at 0x116
+var volatile bit BORCON_SBOREN at BORCON : 7
+var volatile bit BORCON_BORRDY at BORCON : 0
+-- ------------------------------------------------
+var volatile byte FVRCON at 0x117
+var volatile bit FVRCON_FVREN at FVRCON : 7
+var volatile bit FVRCON_FVRRDY at FVRCON : 6
+var volatile bit FVRCON_CDAFVR1 at FVRCON : 3
+var volatile bit FVRCON_CDAFVR0 at FVRCON : 2
+var volatile bit FVRCON_ADFVR1 at FVRCON : 1
+var volatile bit FVRCON_ADFVR0 at FVRCON : 0
+-- ------------------------------------------------
+var volatile byte DACCON0 at 0x118
+var volatile bit DACCON0_DACEN at DACCON0 : 7
+var volatile bit DACCON0_DACLPS at DACCON0 : 6
+var volatile bit DACCON0_DACOE at DACCON0 : 5
+var volatile bit DACCON0_DACPSS1 at DACCON0 : 3
+var volatile bit DACCON0_DACPSS0 at DACCON0 : 2
+var volatile bit DACCON0_DACNSS at DACCON0 : 0
+-- ------------------------------------------------
+var volatile byte DACCON1 at 0x119
+var volatile bit DACCON1_DACR4 at DACCON1 : 4
+var volatile bit DACCON1_DACR3 at DACCON1 : 3
+var volatile bit DACCON1_DACR2 at DACCON1 : 2
+var volatile bit DACCON1_DACR1 at DACCON1 : 1
+var volatile bit DACCON1_DACR0 at DACCON1 : 0
+-- ------------------------------------------------
+var volatile byte SRCON0 at 0x11A
+var volatile bit SRCON0_SRLEN at SRCON0 : 7
+var volatile bit SRCON0_SRCLK2 at SRCON0 : 6
+var volatile bit SRCON0_SRCLK1 at SRCON0 : 5
+var volatile bit SRCON0_SRCLK0 at SRCON0 : 4
+var volatile bit SRCON0_SRQEN at SRCON0 : 3
+var volatile bit SRCON0_SRNQEN at SRCON0 : 2
+var volatile bit SRCON0_SRPS at SRCON0 : 1
+var volatile bit SRCON0_SRPR at SRCON0 : 0
+-- ------------------------------------------------
+var volatile byte SRCON1 at 0x11B
+var volatile bit SRCON1_SRSPE at SRCON1 : 7
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16lf1937.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1942 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16LF1937
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16lf1937, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16lf1937.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16lf1937_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x2480
+const byte PICTYPE[] = "16LF1937"
+const byte DATASHEET[] = "41364"
+const byte PGMSPEC[] = "41360"
+--
+-- Vdd Range: 1.800-3.600 Nominal: 3.300
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16lf1937
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 8192 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F,0x1A0-0x1EF,0x220-0x26F
+pragma data 0x2A0-0x2EF,0x320-0x32F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PORTC at 0x00E
+var volatile bit PORTC_RC7 at PORTC : 7
+var volatile bit PORTC_RC6 at PORTC : 6
+var volatile bit PORTC_RC5 at PORTC : 5
+var volatile bit PORTC_RC4 at PORTC : 4
+var volatile bit PORTC_RC3 at PORTC : 3
+var volatile bit PORTC_RC2 at PORTC : 2
+var volatile bit PORTC_RC1 at PORTC : 1
+var volatile bit PORTC_RC0 at PORTC : 0
+-- ------------------------------------------------
+var volatile byte PORTD at 0x00F
+var volatile bit PORTD_RD7 at PORTD : 7
+var volatile bit PORTD_RD6 at PORTD : 6
+var volatile bit PORTD_RD5 at PORTD : 5
+var volatile bit PORTD_RD4 at PORTD : 4
+var volatile bit PORTD_RD3 at PORTD : 3
+var volatile bit PORTD_RD2 at PORTD : 2
+var volatile bit PORTD_RD1 at PORTD : 1
+var volatile bit PORTD_RD0 at PORTD : 0
+-- ------------------------------------------------
+var volatile byte PORTE at 0x010
+var volatile bit PORTE_RE3 at PORTE : 3
+var volatile bit PORTE_RE2 at PORTE : 2
+var volatile bit PORTE_RE1 at PORTE : 1
+var volatile bit PORTE_RE0 at PORTE : 0
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSPIF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCLIF at PIR2 : 3
+var volatile bit PIR2_LCDIF at PIR2 : 2
+var volatile bit PIR2_CCP2IF at PIR2 : 0
+-- ------------------------------------------------
+var volatile byte PIR3 at 0x013
+var volatile bit PIR3_CCP5IF at PIR3 : 6
+var volatile bit PIR3_CCP4IF at PIR3 : 5
+var volatile bit PIR3_CCP3IF at PIR3 : 4
+var volatile bit PIR3_TMR6IF at PIR3 : 3
+var volatile bit PIR3_TMR4IF at PIR3 : 1
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH3 at CPSCON1 : 3
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_SEG2_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_SEG1_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_AN4_direction is pin_A5_direction
+alias pin_C2OUT_RA5_direction is pin_A5_direction
+alias pin_CPS7_direction is pin_A5_direction
+alias pin_SRNQ_RA5_direction is pin_A5_direction
+alias pin_SS_RA5_direction is pin_A5_direction
+alias pin_SEG5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_C1OUT_direction is pin_A4_direction
+alias pin_CPS6_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_SRQ_direction is pin_A4_direction
+alias pin_SEG4_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_C1IN_POS_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_SEG15_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_C2IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+alias pin_COM2_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SEG7_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_C2OUT_RA0_direction is pin_A0_direction
+alias pin_SRNQ_RA0_direction is pin_A0_direction
+alias pin_SS_RA0_direction is pin_A0_direction
+alias pin_SEG12_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_ICSPDAT_direction is pin_B7_direction
+alias pin_ICDDAT_direction is pin_B7_direction
+alias pin_SEG13_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_ICSPCLK_direction is pin_B6_direction
+alias pin_ICDCLK_direction is pin_B6_direction
+alias pin_SEG14_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN13_direction is pin_B5_direction
+alias pin_CPS5_direction is pin_B5_direction
+alias pin_CCP3_RB5_direction is pin_B5_direction
+alias pin_P3A_RB5_direction is pin_B5_direction
+alias pin_T1G_RB5_direction is pin_B5_direction
+alias pin_COM1_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN11_direction is pin_B4_direction
+alias pin_CPS4_direction is pin_B4_direction
+alias pin_COM0_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_C12IN2_NEG_direction is pin_B3_direction
+alias pin_CPS3_direction is pin_B3_direction
+alias pin_CCP2_RB3_direction is pin_B3_direction
+alias pin_P2A_RB3_direction is pin_B3_direction
+alias pin_VLCD3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN8_direction is pin_B2_direction
+alias pin_CPS2_direction is pin_B2_direction
+alias pin_VLCD2_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN10_direction is pin_B1_direction
+alias pin_C12IN3_NEG_direction is pin_B1_direction
+alias pin_CPS1_direction is pin_B1_direction
+alias pin_VLCD1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_AN12_direction is pin_B0_direction
+alias pin_CPS0_direction is pin_B0_direction
+alias pin_SRI_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_SEG0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISC at 0x08E
+var volatile byte PORTC_direction at TRISC
+--
+procedure PORTC_low_direction'put(byte in x) is
+ TRISC = (TRISC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low_direction'get() return byte is
+ return (TRISC & 0x0F)
+end function
+--
+procedure PORTC_high_direction'put(byte in x) is
+ TRISC = (TRISC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high_direction'get() return byte is
+ return (TRISC >> 4)
+end function
+--
+var volatile bit TRISC_TRISC7 at TRISC : 7
+var volatile bit pin_C7_direction at TRISC : 7
+alias pin_RX_direction is pin_C7_direction
+alias pin_DT_direction is pin_C7_direction
+alias pin_SEG8_direction is pin_C7_direction
+--
+var volatile bit TRISC_TRISC6 at TRISC : 6
+var volatile bit pin_C6_direction at TRISC : 6
+alias pin_TX_direction is pin_C6_direction
+alias pin_CK_direction is pin_C6_direction
+alias pin_SEG9_direction is pin_C6_direction
+--
+var volatile bit TRISC_TRISC5 at TRISC : 5
+var volatile bit pin_C5_direction at TRISC : 5
+alias pin_SDO_direction is pin_C5_direction
+alias pin_SEG10_direction is pin_C5_direction
+--
+var volatile bit TRISC_TRISC4 at TRISC : 4
+var volatile bit pin_C4_direction at TRISC : 4
+alias pin_SDI_direction is pin_C4_direction
+alias pin_SDA_direction is pin_C4_direction
+alias pin_T1G_RC4_direction is pin_C4_direction
+alias pin_SEG11_direction is pin_C4_direction
+--
+var volatile bit TRISC_TRISC3 at TRISC : 3
+var volatile bit pin_C3_direction at TRISC : 3
+alias pin_SCL_direction is pin_C3_direction
+alias pin_SCK_direction is pin_C3_direction
+alias pin_SEG6_direction is pin_C3_direction
+--
+var volatile bit TRISC_TRISC2 at TRISC : 2
+var volatile bit pin_C2_direction at TRISC : 2
+alias pin_CCP1_direction is pin_C2_direction
+alias pin_P1A_direction is pin_C2_direction
+alias pin_SEG3_direction is pin_C2_direction
+--
+var volatile bit TRISC_TRISC1 at TRISC : 1
+var volatile bit pin_C1_direction at TRISC : 1
+alias pin_T1OSI_direction is pin_C1_direction
+alias pin_CCP2_RC1_direction is pin_C1_direction
+alias pin_P2A_RC1_direction is pin_C1_direction
+--
+var volatile bit TRISC_TRISC0 at TRISC : 0
+var volatile bit pin_C0_direction at TRISC : 0
+alias pin_T1OSO_direction is pin_C0_direction
+alias pin_T1CKI_direction is pin_C0_direction
+alias pin_P2B_RC0_direction is pin_C0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISD at 0x08F
+var volatile byte PORTD_direction at TRISD
+--
+procedure PORTD_low_direction'put(byte in x) is
+ TRISD = (TRISD & 0xF0) | (x & 0x0F)
+end procedure
+function PORTD_low_direction'get() return byte is
+ return (TRISD & 0x0F)
+end function
+--
+procedure PORTD_high_direction'put(byte in x) is
+ TRISD = (TRISD & 0x0F) | (x << 4)
+end procedure
+function PORTD_high_direction'get() return byte is
+ return (TRISD >> 4)
+end function
+--
+var volatile bit TRISD_TRISD7 at TRISD : 7
+var volatile bit pin_D7_direction at TRISD : 7
+alias pin_CPS15_direction is pin_D7_direction
+alias pin_P1D_direction is pin_D7_direction
+alias pin_SEG20_direction is pin_D7_direction
+--
+var volatile bit TRISD_TRISD6 at TRISD : 6
+var volatile bit pin_D6_direction at TRISD : 6
+alias pin_CPS14_direction is pin_D6_direction
+alias pin_P1C_direction is pin_D6_direction
+alias pin_SEG19_direction is pin_D6_direction
+--
+var volatile bit TRISD_TRISD5 at TRISD : 5
+var volatile bit pin_D5_direction at TRISD : 5
+alias pin_CPS13_direction is pin_D5_direction
+alias pin_P1B_direction is pin_D5_direction
+alias pin_SEG18_direction is pin_D5_direction
+--
+var volatile bit TRISD_TRISD4 at TRISD : 4
+var volatile bit pin_D4_direction at TRISD : 4
+alias pin_CPS12_direction is pin_D4_direction
+alias pin_P2D_direction is pin_D4_direction
+alias pin_SEG17_direction is pin_D4_direction
+--
+var volatile bit TRISD_TRISD3 at TRISD : 3
+var volatile bit pin_D3_direction at TRISD : 3
+alias pin_CPS11_direction is pin_D3_direction
+alias pin_P2C_direction is pin_D3_direction
+alias pin_SEG16_direction is pin_D3_direction
+--
+var volatile bit TRISD_TRISD2 at TRISD : 2
+var volatile bit pin_D2_direction at TRISD : 2
+alias pin_CPS10_direction is pin_D2_direction
+alias pin_P2B_RD2_direction is pin_D2_direction
+--
+var volatile bit TRISD_TRISD1 at TRISD : 1
+var volatile bit pin_D1_direction at TRISD : 1
+alias pin_CPS9_direction is pin_D1_direction
+alias pin_CCP4_direction is pin_D1_direction
+--
+var volatile bit TRISD_TRISD0 at TRISD : 0
+var volatile bit pin_D0_direction at TRISD : 0
+alias pin_CPS8_direction is pin_D0_direction
+alias pin_COM3_direction is pin_D0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISE at 0x090
+var volatile byte PORTE_direction at TRISE
+--
+procedure PORTE_low_direction'put(byte in x) is
+ TRISE = (TRISE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low_direction'get() return byte is
+ return (TRISE & 0x0F)
+end function
+--
+procedure PORTE_high_direction'put(byte in x) is
+ TRISE = (TRISE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high_direction'get() return byte is
+ return (TRISE >> 4)
+end function
+--
+var volatile bit TRISE_TRISE2 at TRISE : 2
+var volatile bit pin_E2_direction at TRISE : 2
+alias pin_AN7_direction is pin_E2_direction
+alias pin_CCP5_direction is pin_E2_direction
+alias pin_SEG23_direction is pin_E2_direction
+--
+var volatile bit TRISE_TRISE1 at TRISE : 1
+var volatile bit pin_E1_direction at TRISE : 1
+alias pin_AN6_direction is pin_E1_direction
+alias pin_P3B_direction is pin_E1_direction
+alias pin_SEG22_direction is pin_E1_direction
+--
+var volatile bit TRISE_TRISE0 at TRISE : 0
+var volatile bit pin_E0_direction at TRISE : 0
+alias pin_AN5_direction is pin_E0_direction
+alias pin_P3A_RE0_direction is pin_E0_direction
+alias pin_CCP3_RE0_direction is pin_E0_direction
+alias pin_SEG21_direction is pin_E0_direction
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSPIE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCLIE at PIE2 : 3
+var volatile bit PIE2_LCDIE at PIE2 : 2
+var volatile bit PIE2_CCP2IE at PIE2 : 0
+-- ------------------------------------------------
+var volatile byte PIE3 at 0x093
+var volatile bit PIE3_CCP5IE at PIE3 : 6
+var volatile bit PIE3_CCP4IE at PIE3 : 5
+var volatile bit PIE3_CCP3IE at PIE3 : 4
+var volatile bit PIE3_TMR6IE at PIE3 : 3
+var volatile bit PIE3_TMR4IE at PIE3 : 1
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_SEG2 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_SEG1 is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA5 at LATA : 5
+var volatile bit pin_A5 at PORTA : 5
+alias pin_AN4 is pin_A5
+alias pin_C2OUT_RA5 is pin_A5
+alias pin_CPS7 is pin_A5
+alias pin_SRNQ_RA5 is pin_A5
+alias pin_SS_RA5 is pin_A5
+alias pin_SEG5 is pin_A5
+--
+procedure pin_A5'put(bit in x at LATA : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_C1OUT is pin_A4
+alias pin_CPS6 is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_SRQ is pin_A4
+alias pin_SEG4 is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_C1IN_POS is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_SEG15 is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_C2IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+alias pin_COM2 is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SEG7 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_C2OUT_RA0 is pin_A0
+alias pin_SRNQ_RA0 is pin_A0
+alias pin_SS_RA0 is pin_A0
+alias pin_SEG12 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_ICSPDAT is pin_B7
+alias pin_ICDDAT is pin_B7
+alias pin_SEG13 is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_ICSPCLK is pin_B6
+alias pin_ICDCLK is pin_B6
+alias pin_SEG14 is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN13 is pin_B5
+alias pin_CPS5 is pin_B5
+alias pin_CCP3_RB5 is pin_B5
+alias pin_P3A_RB5 is pin_B5
+alias pin_T1G_RB5 is pin_B5
+alias pin_COM1 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN11 is pin_B4
+alias pin_CPS4 is pin_B4
+alias pin_COM0 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_C12IN2_NEG is pin_B3
+alias pin_CPS3 is pin_B3
+alias pin_CCP2_RB3 is pin_B3
+alias pin_P2A_RB3 is pin_B3
+alias pin_VLCD3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN8 is pin_B2
+alias pin_CPS2 is pin_B2
+alias pin_VLCD2 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN10 is pin_B1
+alias pin_C12IN3_NEG is pin_B1
+alias pin_CPS1 is pin_B1
+alias pin_VLCD1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_AN12 is pin_B0
+alias pin_CPS0 is pin_B0
+alias pin_SRI is pin_B0
+alias pin_INT is pin_B0
+alias pin_SEG0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATC at 0x10E
+--
+procedure PORTC'put(byte in x) is
+ pragma inline
+ LATC = x
+end procedure
+--
+procedure PORTC_low'put(byte in x) is
+ LATC = (PORTC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low'get() return byte is
+ return (PORTC & 0x0F)
+end function
+--
+procedure PORTC_high'put(byte in x) is
+ LATC = (PORTC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high'get() return byte is
+ return (PORTC >> 4)
+end function
+--
+var volatile bit LATC_LATC7 at LATC : 7
+var volatile bit pin_C7 at PORTC : 7
+alias pin_RX is pin_C7
+alias pin_DT is pin_C7
+alias pin_SEG8 is pin_C7
+--
+procedure pin_C7'put(bit in x at LATC : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC6 at LATC : 6
+var volatile bit pin_C6 at PORTC : 6
+alias pin_TX is pin_C6
+alias pin_CK is pin_C6
+alias pin_SEG9 is pin_C6
+--
+procedure pin_C6'put(bit in x at LATC : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC5 at LATC : 5
+var volatile bit pin_C5 at PORTC : 5
+alias pin_SDO is pin_C5
+alias pin_SEG10 is pin_C5
+--
+procedure pin_C5'put(bit in x at LATC : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC4 at LATC : 4
+var volatile bit pin_C4 at PORTC : 4
+alias pin_SDI is pin_C4
+alias pin_SDA is pin_C4
+alias pin_T1G_RC4 is pin_C4
+alias pin_SEG11 is pin_C4
+--
+procedure pin_C4'put(bit in x at LATC : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC3 at LATC : 3
+var volatile bit pin_C3 at PORTC : 3
+alias pin_SCL is pin_C3
+alias pin_SCK is pin_C3
+alias pin_SEG6 is pin_C3
+--
+procedure pin_C3'put(bit in x at LATC : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC2 at LATC : 2
+var volatile bit pin_C2 at PORTC : 2
+alias pin_CCP1 is pin_C2
+alias pin_P1A is pin_C2
+alias pin_SEG3 is pin_C2
+--
+procedure pin_C2'put(bit in x at LATC : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC1 at LATC : 1
+var volatile bit pin_C1 at PORTC : 1
+alias pin_T1OSI is pin_C1
+alias pin_CCP2_RC1 is pin_C1
+alias pin_P2A_RC1 is pin_C1
+--
+procedure pin_C1'put(bit in x at LATC : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC0 at LATC : 0
+var volatile bit pin_C0 at PORTC : 0
+alias pin_T1OSO is pin_C0
+alias pin_T1CKI is pin_C0
+alias pin_P2B_RC0 is pin_C0
+--
+procedure pin_C0'put(bit in x at LATC : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATD at 0x10F
+--
+procedure PORTD'put(byte in x) is
+ pragma inline
+ LATD = x
+end procedure
+--
+procedure PORTD_low'put(byte in x) is
+ LATD = (PORTD & 0xF0) | (x & 0x0F)
+end procedure
+function PORTD_low'get() return byte is
+ return (PORTD & 0x0F)
+end function
+--
+procedure PORTD_high'put(byte in x) is
+ LATD = (PORTD & 0x0F) | (x << 4)
+end procedure
+function PORTD_high'get() return byte is
+ return (PORTD >> 4)
+end function
+--
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16lf1938.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1654 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16LF1938
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16lf1938, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16lf1938.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16lf1938_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x24A0
+const byte PICTYPE[] = "16LF1938"
+const byte DATASHEET[] = "41364"
+const byte PGMSPEC[] = "41360"
+--
+-- Vdd Range: 1.800-3.600 Nominal: 3.300
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16lf1938
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 16384 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F,0x1A0-0x1EF,0x220-0x26F
+pragma data 0x2A0-0x2EF,0x320-0x36F,0x3A0-0x3EF,0x420-0x46F,0x4A0-0x4EF
+pragma data 0x520-0x56F,0x5A0-0x5EF,0x620-0x64F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PORTC at 0x00E
+var volatile bit PORTC_RC7 at PORTC : 7
+var volatile bit PORTC_RC6 at PORTC : 6
+var volatile bit PORTC_RC5 at PORTC : 5
+var volatile bit PORTC_RC4 at PORTC : 4
+var volatile bit PORTC_RC3 at PORTC : 3
+var volatile bit PORTC_RC2 at PORTC : 2
+var volatile bit PORTC_RC1 at PORTC : 1
+var volatile bit PORTC_RC0 at PORTC : 0
+-- ------------------------------------------------
+var volatile byte PORTE at 0x010
+var volatile bit PORTE_RE3 at PORTE : 3
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSPIF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCLIF at PIR2 : 3
+var volatile bit PIR2_LCDIF at PIR2 : 2
+var volatile bit PIR2_CCP2IF at PIR2 : 0
+-- ------------------------------------------------
+var volatile byte PIR3 at 0x013
+var volatile bit PIR3_CCP5IF at PIR3 : 6
+var volatile bit PIR3_CCP4IF at PIR3 : 5
+var volatile bit PIR3_CCP3IF at PIR3 : 4
+var volatile bit PIR3_TMR6IF at PIR3 : 3
+var volatile bit PIR3_TMR4IF at PIR3 : 1
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_SEG2_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_SEG1_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_AN4_direction is pin_A5_direction
+alias pin_C2OUT_RA5_direction is pin_A5_direction
+alias pin_CPS7_direction is pin_A5_direction
+alias pin_SRNQ_RA5_direction is pin_A5_direction
+alias pin_SS_RA5_direction is pin_A5_direction
+alias pin_SEG5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_C1OUT_direction is pin_A4_direction
+alias pin_CPS6_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_SRQ_direction is pin_A4_direction
+alias pin_CCP5_direction is pin_A4_direction
+alias pin_SEG4_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_C1IN_POS_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_COM3_direction is pin_A3_direction
+alias pin_SEG15_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_C2IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+alias pin_COM2_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SEG7_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_C2OUT_RA0_direction is pin_A0_direction
+alias pin_SRNQ_RA0_direction is pin_A0_direction
+alias pin_SS_RA0_direction is pin_A0_direction
+alias pin_SEG12_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_ICSPDAT_direction is pin_B7_direction
+alias pin_ICDDAT_direction is pin_B7_direction
+alias pin_SEG13_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_ICSPCLK_direction is pin_B6_direction
+alias pin_ICDCLK_direction is pin_B6_direction
+alias pin_SEG14_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN13_direction is pin_B5_direction
+alias pin_CPS5_direction is pin_B5_direction
+alias pin_CCP3_RB5_direction is pin_B5_direction
+alias pin_P3A_RB5_direction is pin_B5_direction
+alias pin_T1G_RB5_direction is pin_B5_direction
+alias pin_COM1_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN11_direction is pin_B4_direction
+alias pin_CPS4_direction is pin_B4_direction
+alias pin_P1D_direction is pin_B4_direction
+alias pin_COM0_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_C12IN2_NEG_direction is pin_B3_direction
+alias pin_CPS3_direction is pin_B3_direction
+alias pin_CCP2_RB3_direction is pin_B3_direction
+alias pin_P2A_RB3_direction is pin_B3_direction
+alias pin_VLCD3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN8_direction is pin_B2_direction
+alias pin_CPS2_direction is pin_B2_direction
+alias pin_P1B_direction is pin_B2_direction
+alias pin_VLCD2_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN10_direction is pin_B1_direction
+alias pin_C12IN3_NEG_direction is pin_B1_direction
+alias pin_CPS1_direction is pin_B1_direction
+alias pin_P1C_direction is pin_B1_direction
+alias pin_VLCD1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_AN12_direction is pin_B0_direction
+alias pin_CPS0_direction is pin_B0_direction
+alias pin_CCP4_direction is pin_B0_direction
+alias pin_SRI_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_SEG0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISC at 0x08E
+var volatile byte PORTC_direction at TRISC
+--
+procedure PORTC_low_direction'put(byte in x) is
+ TRISC = (TRISC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low_direction'get() return byte is
+ return (TRISC & 0x0F)
+end function
+--
+procedure PORTC_high_direction'put(byte in x) is
+ TRISC = (TRISC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high_direction'get() return byte is
+ return (TRISC >> 4)
+end function
+--
+var volatile bit TRISC_TRISC7 at TRISC : 7
+var volatile bit pin_C7_direction at TRISC : 7
+alias pin_RX_direction is pin_C7_direction
+alias pin_DT_direction is pin_C7_direction
+alias pin_P3B_direction is pin_C7_direction
+alias pin_SEG8_direction is pin_C7_direction
+--
+var volatile bit TRISC_TRISC6 at TRISC : 6
+var volatile bit pin_C6_direction at TRISC : 6
+alias pin_TX_direction is pin_C6_direction
+alias pin_CK_direction is pin_C6_direction
+alias pin_CCP3_RC6_direction is pin_C6_direction
+alias pin_P3A_RC6_direction is pin_C6_direction
+alias pin_SEG9_direction is pin_C6_direction
+--
+var volatile bit TRISC_TRISC5 at TRISC : 5
+var volatile bit pin_C5_direction at TRISC : 5
+alias pin_SDO_direction is pin_C5_direction
+alias pin_SEG10_direction is pin_C5_direction
+--
+var volatile bit TRISC_TRISC4 at TRISC : 4
+var volatile bit pin_C4_direction at TRISC : 4
+alias pin_SDI_direction is pin_C4_direction
+alias pin_SDA_direction is pin_C4_direction
+alias pin_T1G_RC4_direction is pin_C4_direction
+alias pin_SEG11_direction is pin_C4_direction
+--
+var volatile bit TRISC_TRISC3 at TRISC : 3
+var volatile bit pin_C3_direction at TRISC : 3
+alias pin_SCK_direction is pin_C3_direction
+alias pin_SCL_direction is pin_C3_direction
+alias pin_SEG6_direction is pin_C3_direction
+--
+var volatile bit TRISC_TRISC2 at TRISC : 2
+var volatile bit pin_C2_direction at TRISC : 2
+alias pin_CCP1_direction is pin_C2_direction
+alias pin_P1A_direction is pin_C2_direction
+alias pin_SEG3_direction is pin_C2_direction
+--
+var volatile bit TRISC_TRISC1 at TRISC : 1
+var volatile bit pin_C1_direction at TRISC : 1
+alias pin_T1OSI_direction is pin_C1_direction
+alias pin_CCP2_RC1_direction is pin_C1_direction
+alias pin_P2A_RC1_direction is pin_C1_direction
+--
+var volatile bit TRISC_TRISC0 at TRISC : 0
+var volatile bit pin_C0_direction at TRISC : 0
+alias pin_T1OSO_direction is pin_C0_direction
+alias pin_T1CKI_direction is pin_C0_direction
+alias pin_P2B_direction is pin_C0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISE at 0x090
+var volatile byte PORTE_direction at TRISE
+--
+procedure PORTE_low_direction'put(byte in x) is
+ TRISE = (TRISE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low_direction'get() return byte is
+ return (TRISE & 0x0F)
+end function
+--
+procedure PORTE_high_direction'put(byte in x) is
+ TRISE = (TRISE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high_direction'get() return byte is
+ return (TRISE >> 4)
+end function
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSPIE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCLIE at PIE2 : 3
+var volatile bit PIE2_LCDIE at PIE2 : 2
+var volatile bit PIE2_CCP2IE at PIE2 : 0
+-- ------------------------------------------------
+var volatile byte PIE3 at 0x093
+var volatile bit PIE3_CCP5IE at PIE3 : 6
+var volatile bit PIE3_CCP4IE at PIE3 : 5
+var volatile bit PIE3_CCP3IE at PIE3 : 4
+var volatile bit PIE3_TMR6IE at PIE3 : 3
+var volatile bit PIE3_TMR4IE at PIE3 : 1
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_SEG2 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_SEG1 is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA5 at LATA : 5
+var volatile bit pin_A5 at PORTA : 5
+alias pin_AN4 is pin_A5
+alias pin_C2OUT_RA5 is pin_A5
+alias pin_CPS7 is pin_A5
+alias pin_SRNQ_RA5 is pin_A5
+alias pin_SS_RA5 is pin_A5
+alias pin_SEG5 is pin_A5
+--
+procedure pin_A5'put(bit in x at LATA : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_C1OUT is pin_A4
+alias pin_CPS6 is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_SRQ is pin_A4
+alias pin_CCP5 is pin_A4
+alias pin_SEG4 is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_C1IN_POS is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_COM3 is pin_A3
+alias pin_SEG15 is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_C2IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+alias pin_COM2 is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SEG7 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_C2OUT_RA0 is pin_A0
+alias pin_SRNQ_RA0 is pin_A0
+alias pin_SS_RA0 is pin_A0
+alias pin_SEG12 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_ICSPDAT is pin_B7
+alias pin_ICDDAT is pin_B7
+alias pin_SEG13 is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_ICSPCLK is pin_B6
+alias pin_ICDCLK is pin_B6
+alias pin_SEG14 is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN13 is pin_B5
+alias pin_CPS5 is pin_B5
+alias pin_CCP3_RB5 is pin_B5
+alias pin_P3A_RB5 is pin_B5
+alias pin_T1G_RB5 is pin_B5
+alias pin_COM1 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN11 is pin_B4
+alias pin_CPS4 is pin_B4
+alias pin_P1D is pin_B4
+alias pin_COM0 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_C12IN2_NEG is pin_B3
+alias pin_CPS3 is pin_B3
+alias pin_CCP2_RB3 is pin_B3
+alias pin_P2A_RB3 is pin_B3
+alias pin_VLCD3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN8 is pin_B2
+alias pin_CPS2 is pin_B2
+alias pin_P1B is pin_B2
+alias pin_VLCD2 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN10 is pin_B1
+alias pin_C12IN3_NEG is pin_B1
+alias pin_CPS1 is pin_B1
+alias pin_P1C is pin_B1
+alias pin_VLCD1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_AN12 is pin_B0
+alias pin_CPS0 is pin_B0
+alias pin_CCP4 is pin_B0
+alias pin_SRI is pin_B0
+alias pin_INT is pin_B0
+alias pin_SEG0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATC at 0x10E
+--
+procedure PORTC'put(byte in x) is
+ pragma inline
+ LATC = x
+end procedure
+--
+procedure PORTC_low'put(byte in x) is
+ LATC = (PORTC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low'get() return byte is
+ return (PORTC & 0x0F)
+end function
+--
+procedure PORTC_high'put(byte in x) is
+ LATC = (PORTC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high'get() return byte is
+ return (PORTC >> 4)
+end function
+--
+var volatile bit LATC_LATC7 at LATC : 7
+var volatile bit pin_C7 at PORTC : 7
+alias pin_RX is pin_C7
+alias pin_DT is pin_C7
+alias pin_P3B is pin_C7
+alias pin_SEG8 is pin_C7
+--
+procedure pin_C7'put(bit in x at LATC : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC6 at LATC : 6
+var volatile bit pin_C6 at PORTC : 6
+alias pin_TX is pin_C6
+alias pin_CK is pin_C6
+alias pin_CCP3_RC6 is pin_C6
+alias pin_P3A_RC6 is pin_C6
+alias pin_SEG9 is pin_C6
+--
+procedure pin_C6'put(bit in x at LATC : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC5 at LATC : 5
+var volatile bit pin_C5 at PORTC : 5
+alias pin_SDO is pin_C5
+alias pin_SEG10 is pin_C5
+--
+procedure pin_C5'put(bit in x at LATC : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC4 at LATC : 4
+var volatile bit pin_C4 at PORTC : 4
+alias pin_SDI is pin_C4
+alias pin_SDA is pin_C4
+alias pin_T1G_RC4 is pin_C4
+alias pin_SEG11 is pin_C4
+--
+procedure pin_C4'put(bit in x at LATC : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC3 at LATC : 3
+var volatile bit pin_C3 at PORTC : 3
+alias pin_SCK is pin_C3
+alias pin_SCL is pin_C3
+alias pin_SEG6 is pin_C3
+--
+procedure pin_C3'put(bit in x at LATC : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC2 at LATC : 2
+var volatile bit pin_C2 at PORTC : 2
+alias pin_CCP1 is pin_C2
+alias pin_P1A is pin_C2
+alias pin_SEG3 is pin_C2
+--
+procedure pin_C2'put(bit in x at LATC : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC1 at LATC : 1
+var volatile bit pin_C1 at PORTC : 1
+alias pin_T1OSI is pin_C1
+alias pin_CCP2_RC1 is pin_C1
+alias pin_P2A_RC1 is pin_C1
+--
+procedure pin_C1'put(bit in x at LATC : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC0 at LATC : 0
+var volatile bit pin_C0 at PORTC : 0
+alias pin_T1OSO is pin_C0
+alias pin_T1CKI is pin_C0
+alias pin_P2B is pin_C0
+--
+procedure pin_C0'put(bit in x at LATC : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte CM1CON0 at 0x111
+var volatile bit CM1CON0_C1ON at CM1CON0 : 7
+var volatile bit CM1CON0_C1OUT at CM1CON0 : 6
+var volatile bit CM1CON0_C1OE at CM1CON0 : 5
+var volatile bit CM1CON0_C1POL at CM1CON0 : 4
+var volatile bit CM1CON0_C1SP at CM1CON0 : 2
+var volatile bit CM1CON0_C1HYS at CM1CON0 : 1
+var volatile bit CM1CON0_C1SYNC at CM1CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM1CON1 at 0x112
+var volatile bit CM1CON1_C1INTP at CM1CON1 : 7
+var volatile bit CM1CON1_C1INTN at CM1CON1 : 6
+var volatile bit CM1CON1_C1PCH1 at CM1CON1 : 5
+var volatile bit CM1CON1_C1PCH0 at CM1CON1 : 4
+var volatile bit CM1CON1_C1NCH1 at CM1CON1 : 1
+var volatile bit CM1CON1_C1NCH0 at CM1CON1 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON0 at 0x113
+var volatile bit CM2CON0_C2ON at CM2CON0 : 7
+var volatile bit CM2CON0_C2OUT at CM2CON0 : 6
+var volatile bit CM2CON0_C2OE at CM2CON0 : 5
+var volatile bit CM2CON0_C2POL at CM2CON0 : 4
+var volatile bit CM2CON0_C2SP at CM2CON0 : 2
+var volatile bit CM2CON0_C2HYS at CM2CON0 : 1
+var volatile bit CM2CON0_C2SYNC at CM2CON0 : 0
+-- ------------------------------------------------
+var volatile byte CM2CON1 at 0x114
+var volatile bit CM2CON1_C2INTP at CM2CON1 : 7
+var volatile bit CM2CON1_C2INTN at CM2CON1 : 6
+var volatile bit CM2CON1_C2PCH1 at CM2CON1 : 5
+var volatile bit CM2CON1_C2PCH0 at CM2CON1 : 4
+var volatile bit CM2CON1_C2NCH1 at CM2CON1 : 1
+var volatile bit CM2CON1_C2NCH0 at CM2CON1 : 0
+-- ------------------------------------------------
+var volatile byte CMOUT at 0x115
+var volatile bit CMOUT_MC2OUT at CMOUT : 1
+var volatile bit CMOUT_MC1OUT at CMOUT : 0
+-- ------------------------------------------------
+var volatile byte BORCON at 0x116
+var volatile bit BORCON_SBOREN at BORCON : 7
+var volatile bit BORCON_BORRDY at BORCON : 0
+-- ------------------------------------------------
+var volatile byte FVRCON at 0x117
+var volatile bit FVRCON_FVREN at FVRCON : 7
+var volatile bit FVRCON_FVRRDY at FVRCON : 6
+var volatile bit FVRCON_CDAFVR1 at FVRCON : 3
+var volatile bit FVRCON_CDAFVR0 at FVRCON : 2
+var volatile bit FVRCON_ADFVR1 at FVRCON : 1
+var volatile bit FVRCON_ADFVR0 at FVRCON : 0
+-- ------------------------------------------------
+var volatile byte DACCON0 at 0x118
+var volatile bit DACCON0_DACEN at DACCON0 : 7
+var volatile bit DACCON0_DACLPS at DACCON0 : 6
+var volatile bit DACCON0_DACOE at DACCON0 : 5
+var volatile bit DACCON0_DACPSS1 at DACCON0 : 3
+var volatile bit DACCON0_DACPSS0 at DACCON0 : 2
+var volatile bit DACCON0_DACNSS at DACCON0 : 0
+-- ------------------------------------------------
+var volatile byte DACCON1 at 0x119
+var volatile bit DACCON1_DACR4 at DACCON1 : 4
+var volatile bit DACCON1_DACR3 at DACCON1 : 3
+var volatile bit DACCON1_DACR2 at DACCON1 : 2
+var volatile bit DACCON1_DACR1 at DACCON1 : 1
+var volatile bit DACCON1_DACR0 at DACCON1 : 0
+-- ------------------------------------------------
+var volatile byte SRCON0 at 0x11A
+var volatile bit SRCON0_SRLEN at SRCON0 : 7
+var volatile bit SRCON0_SRCLK2 at SRCON0 : 6
+var volatile bit SRCON0_SRCLK1 at SRCON0 : 5
+var volatile bit SRCON0_SRCLK0 at SRCON0 : 4
+var volatile bit SRCON0_SRQEN at SRCON0 : 3
+var volatile bit SRCON0_SRNQEN at SRCON0 : 2
+var volatile bit SRCON0_SRPS at SRCON0 : 1
+var volatile bit SRCON0_SRPR at SRCON0 : 0
+-- ------------------------------------------------
+var volatile byte SRCON1 at 0x11B
+var volatile bit SRCON1_SRSPE at SRCON1 : 7
+var volatile bit SRCON1_SRSCKE at SRCON1 : 6
+var volatile bit SRCON1_SRSC2E at SRCON1 : 5
+var volatile bit SRCON1_SRSC1E at SRCON1 : 4
+var volatile bit SRCON1_SRRPE at SRCON1 : 3
+var volatile bit SRCON1_SRRCKE at SRCON1 : 2
+var volatile bit SRCON1_SRRC2E at SRCON1 : 1
+var volatile bit SRCON1_SRRC1E at SRCON1 : 0
+-- ------------------------------------------------
+var volatile byte APFCON at 0x11D
+var volatile bit APFCON_CCP3SEL at APFCON : 6
+var volatile bit APFCON_T1GSEL at APFCON : 5
+var volatile bit APFCON_P2BSEL at APFCON : 4
+var volatile bit APFCON_SRNQSEL at APFCON : 3
+var volatile bit APFCON_C2OUTSEL at APFCON : 2
+var volatile bit APFCON_SSSEL at APFCON : 1
+var volatile bit APFCON_CCP2SEL at APFCON : 0
+-- ------------------------------------------------
+var volatile byte ANSELA at 0x18C
+var volatile bit JANSEL_ANS5 at ANSELA : 5
+var volatile bit JANSEL_ANS4 at ANSELA : 4
+var volatile bit JANSEL_ANS3 at ANSELA : 3
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/include/device/16lf1939.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,1943 @@
+-- ===================================================
+-- Title: JalV2 device include file for PIC 16LF1939
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the ZLIB license
(http://www.opensource.org/licenses/zlib-license.html)
+--
+-- Description:
+-- Device include file for pic16lf1939, containing:
+-- - Declaration of ports and pins of the chip.
+-- - Procedures for shadowing of ports and pins
+-- to circumvent the read-modify-write problem.
+-- - Symbolic definitions for configuration bits (fuses)
+-- - Some device dependent procedures for common
+-- operations, like:
+-- . enable_digital_io()
+--
+-- Sources:
+-- - "x:/mplab843/mplab ide/device/pic16lf1939.dev"
+-- - "x:/mplab843/mpasm suite/lkr/16lf1939_g.lkr"
+--
+-- Notes:
+-- - Created with Dev2Jal Rexx script version 0.0.90
+-- - File creation date/time: 7 Feb 2010 09:03
+--
+-- ===================================================
+--
+const word DEVICE_ID = 0x24C0
+const byte PICTYPE[] = "16LF1939"
+const byte DATASHEET[] = "41364"
+const byte PGMSPEC[] = "41360"
+--
+-- Vdd Range: 1.800-3.600 Nominal: 3.300
+-- Vpp Range: 8.000-9.000 Default: 9.000
+--
+-- ---------------------------------------------------
+--
+include chipdef_jallib -- common constants
+--
+pragma target cpu PIC_14H -- (banks = 32)
+pragma target chip 16lf1939
+pragma target bank 0x0080
+pragma target page 0x0800
+pragma stack 16
+pragma code 16384 -- (words)
+pragma eeprom 0xF000,256
+pragma ID 0x8000,4
+pragma data 0x20-0x6F,0xA0-0xEF,0x120-0x16F,0x1A0-0x1EF,0x220-0x26F
+pragma data 0x2A0-0x2EF,0x320-0x36F,0x3A0-0x3EF,0x420-0x46F,0x4A0-0x4EF
+pragma data 0x520-0x56F,0x5A0-0x5EF,0x620-0x64F
+pragma shared 0x70-0x7F
+--
+var volatile byte _pic_accum shared at 0x07F -- (compiler)
+--
+const word _FUSES_CT = 2
+const word _FUSE_BASE[_FUSES_CT] = { 0x8007,0x8008 }
+const word _FUSES[_FUSES_CT] = { 0b_0011_1111_1111_1111, --
CONFIG1
+ 0b_0011_1111_1111_1111 } --
CONFIG2
+--
+-- ------------------------------------------------
+var volatile byte INDF0 shared at 0x000
+var volatile byte _ind0 shared at 0x000 --
(compiler)
+-- ------------------------------------------------
+var volatile byte INDF1 shared at 0x001
+var volatile byte _ind1 shared at 0x001 --
(compiler)
+-- ------------------------------------------------
+var volatile byte PCL shared at 0x002
+var volatile byte _pcl shared at 0x002 --
(compiler)
+-- ------------------------------------------------
+var volatile byte STATUS shared at 0x003
+var volatile bit STATUS_NTO shared at STATUS : 4
+var volatile bit STATUS_NPD shared at STATUS : 3
+var volatile bit STATUS_Z shared at STATUS : 2
+var volatile bit STATUS_DC shared at STATUS : 1
+var volatile bit STATUS_C shared at STATUS : 0
+var volatile byte _status shared at 0x003 --
(compiler)
+const byte _not_to = 4 -- (compiler)
+const byte _not_pd = 3 -- (compiler)
+const byte _z = 2 -- (compiler)
+const byte _dc = 1 -- (compiler)
+const byte _c = 0 -- (compiler)
+-- ------------------------------------------------
+var volatile word FSR0 shared at 0x004
+-- ------------------------------------------------
+var volatile byte FSR0L shared at 0x004
+var volatile byte _fsr0l shared at 0x004 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR0H shared at 0x005
+var volatile byte _fsr0h shared at 0x005 --
(compiler)
+-- ------------------------------------------------
+var volatile word FSR1 shared at 0x006
+-- ------------------------------------------------
+var volatile byte FSR1L shared at 0x006
+var volatile byte _fsr1l shared at 0x006 --
(compiler)
+-- ------------------------------------------------
+var volatile byte FSR1H shared at 0x007
+var volatile byte _fsr1h shared at 0x007 --
(compiler)
+-- ------------------------------------------------
+var volatile byte BSR shared at 0x008
+var volatile bit BSR_BSR4 shared at BSR : 4
+var volatile bit BSR_BSR3 shared at BSR : 3
+var volatile bit BSR_BSR2 shared at BSR : 2
+var volatile bit BSR_BSR1 shared at BSR : 1
+var volatile bit BSR_BSR0 shared at BSR : 0
+var volatile byte _bsr shared at 0x008 --
(compiler)
+-- ------------------------------------------------
+var volatile byte WREG shared at 0x009
+var volatile bit*8 WREG_WREG0 shared at WREG : 0
+-- ------------------------------------------------
+var volatile byte PCLATH shared at 0x00A
+var volatile bit*7 PCLATH_PCLATH shared at PCLATH : 0
+var volatile byte _pclath shared at 0x00A --
(compiler)
+-- ------------------------------------------------
+var volatile byte INTCON shared at 0x00B
+var volatile bit INTCON_GIE shared at INTCON : 7
+var volatile bit INTCON_PEIE shared at INTCON : 6
+var volatile bit INTCON_TMR0IE shared at INTCON : 5
+var volatile bit INTCON_INTE shared at INTCON : 4
+var volatile bit INTCON_IOCIE shared at INTCON : 3
+var volatile bit INTCON_TMR0IF shared at INTCON : 2
+var volatile bit INTCON_INTF shared at INTCON : 1
+var volatile bit INTCON_IOCIF shared at INTCON : 0
+-- ------------------------------------------------
+var volatile byte PORTA at 0x00C
+var volatile bit PORTA_RA7 at PORTA : 7
+var volatile bit PORTA_RA6 at PORTA : 6
+var volatile bit PORTA_RA5 at PORTA : 5
+var volatile bit PORTA_RA4 at PORTA : 4
+var volatile bit PORTA_RA3 at PORTA : 3
+var volatile bit PORTA_RA2 at PORTA : 2
+var volatile bit PORTA_RA1 at PORTA : 1
+var volatile bit PORTA_RA0 at PORTA : 0
+-- ------------------------------------------------
+var volatile byte PORTB at 0x00D
+var volatile bit PORTB_RB7 at PORTB : 7
+var volatile bit PORTB_RB6 at PORTB : 6
+var volatile bit PORTB_RB5 at PORTB : 5
+var volatile bit PORTB_RB4 at PORTB : 4
+var volatile bit PORTB_RB3 at PORTB : 3
+var volatile bit PORTB_RB2 at PORTB : 2
+var volatile bit PORTB_RB1 at PORTB : 1
+var volatile bit PORTB_RB0 at PORTB : 0
+-- ------------------------------------------------
+var volatile byte PORTC at 0x00E
+var volatile bit PORTC_RC7 at PORTC : 7
+var volatile bit PORTC_RC6 at PORTC : 6
+var volatile bit PORTC_RC5 at PORTC : 5
+var volatile bit PORTC_RC4 at PORTC : 4
+var volatile bit PORTC_RC3 at PORTC : 3
+var volatile bit PORTC_RC2 at PORTC : 2
+var volatile bit PORTC_RC1 at PORTC : 1
+var volatile bit PORTC_RC0 at PORTC : 0
+-- ------------------------------------------------
+var volatile byte PORTD at 0x00F
+var volatile bit PORTD_RD7 at PORTD : 7
+var volatile bit PORTD_RD6 at PORTD : 6
+var volatile bit PORTD_RD5 at PORTD : 5
+var volatile bit PORTD_RD4 at PORTD : 4
+var volatile bit PORTD_RD3 at PORTD : 3
+var volatile bit PORTD_RD2 at PORTD : 2
+var volatile bit PORTD_RD1 at PORTD : 1
+var volatile bit PORTD_RD0 at PORTD : 0
+-- ------------------------------------------------
+var volatile byte PORTE at 0x010
+var volatile bit PORTE_RE3 at PORTE : 3
+var volatile bit PORTE_RE2 at PORTE : 2
+var volatile bit PORTE_RE1 at PORTE : 1
+var volatile bit PORTE_RE0 at PORTE : 0
+-- ------------------------------------------------
+var volatile byte PIR1 at 0x011
+var volatile bit PIR1_TMR1GIF at PIR1 : 7
+var volatile bit PIR1_ADIF at PIR1 : 6
+var volatile bit PIR1_RCIF at PIR1 : 5
+var volatile bit PIR1_TXIF at PIR1 : 4
+var volatile bit PIR1_SSPIF at PIR1 : 3
+var volatile bit PIR1_CCP1IF at PIR1 : 2
+var volatile bit PIR1_TMR2IF at PIR1 : 1
+var volatile bit PIR1_TMR1IF at PIR1 : 0
+-- ------------------------------------------------
+var volatile byte PIR2 at 0x012
+var volatile bit PIR2_OSFIF at PIR2 : 7
+var volatile bit PIR2_C2IF at PIR2 : 6
+var volatile bit PIR2_C1IF at PIR2 : 5
+var volatile bit PIR2_EEIF at PIR2 : 4
+var volatile bit PIR2_BCLIF at PIR2 : 3
+var volatile bit PIR2_LCDIF at PIR2 : 2
+var volatile bit PIR2_CCP2IF at PIR2 : 0
+-- ------------------------------------------------
+var volatile byte PIR3 at 0x013
+var volatile bit PIR3_CCP5IF at PIR3 : 6
+var volatile bit PIR3_CCP4IF at PIR3 : 5
+var volatile bit PIR3_CCP3IF at PIR3 : 4
+var volatile bit PIR3_TMR6IF at PIR3 : 3
+var volatile bit PIR3_TMR4IF at PIR3 : 1
+-- ------------------------------------------------
+var volatile byte TMR0 at 0x015
+-- ------------------------------------------------
+var volatile word TMR1 at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1L at 0x016
+-- ------------------------------------------------
+var volatile byte TMR1H at 0x017
+-- ------------------------------------------------
+var volatile byte T1CON at 0x018
+var volatile bit T1CON_TMR1CS1 at T1CON : 7
+var volatile bit T1CON_TMR1CS0 at T1CON : 6
+var volatile bit*2 T1CON_T1CKPS at T1CON : 4
+var volatile bit T1CON_T1OSCEN at T1CON : 3
+var volatile bit T1CON_NT1SYNC at T1CON : 2
+var volatile bit T1CON_TMR1ON at T1CON : 0
+-- ------------------------------------------------
+var volatile byte T1GCON at 0x019
+var volatile bit T1GCON_TMR1GE at T1GCON : 7
+var volatile bit T1GCON_T1GPOL at T1GCON : 6
+var volatile bit T1GCON_T1GTM at T1GCON : 5
+var volatile bit T1GCON_T1GSPM at T1GCON : 4
+var volatile bit T1GCON_T1GGO at T1GCON : 3
+var volatile bit T1GCON_T1GVAL at T1GCON : 2
+var volatile bit T1GCON_T1GSS1 at T1GCON : 1
+var volatile bit T1GCON_T1GSS0 at T1GCON : 0
+-- ------------------------------------------------
+var volatile byte TMR2 at 0x01A
+-- ------------------------------------------------
+var volatile byte PR2 at 0x01B
+-- ------------------------------------------------
+var volatile byte T2CON at 0x01C
+var volatile bit*4 T2CON_T2OUTPS at T2CON : 3
+var volatile bit T2CON_TMR2ON at T2CON : 2
+var volatile bit*2 T2CON_T2CKPS at T2CON : 0
+-- ------------------------------------------------
+var volatile byte CPSCON0 at 0x01E
+var volatile bit CPSCON0_CPSON at CPSCON0 : 7
+var volatile bit CPSCON0_CPSRNG1 at CPSCON0 : 3
+var volatile bit CPSCON0_CPSRNG0 at CPSCON0 : 2
+var volatile bit CPSCON0_CPSOUT at CPSCON0 : 1
+var volatile bit CPSCON0_T0XCS at CPSCON0 : 0
+-- ------------------------------------------------
+var volatile byte CPSCON1 at 0x01F
+var volatile bit CPSCON1_CPSCH3 at CPSCON1 : 3
+var volatile bit CPSCON1_CPSCH2 at CPSCON1 : 2
+var volatile bit CPSCON1_CPSCH1 at CPSCON1 : 1
+var volatile bit CPSCON1_CPSCH0 at CPSCON1 : 0
+-- ------------------------------------------------
+var volatile byte TRISA at 0x08C
+var volatile byte PORTA_direction at TRISA
+--
+procedure PORTA_low_direction'put(byte in x) is
+ TRISA = (TRISA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low_direction'get() return byte is
+ return (TRISA & 0x0F)
+end function
+--
+procedure PORTA_high_direction'put(byte in x) is
+ TRISA = (TRISA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high_direction'get() return byte is
+ return (TRISA >> 4)
+end function
+--
+var volatile bit TRISA_TRISA7 at TRISA : 7
+var volatile bit pin_A7_direction at TRISA : 7
+alias pin_OSC1_direction is pin_A7_direction
+alias pin_CLKIN_direction is pin_A7_direction
+alias pin_SEG2_direction is pin_A7_direction
+--
+var volatile bit TRISA_TRISA6 at TRISA : 6
+var volatile bit pin_A6_direction at TRISA : 6
+alias pin_OSC2_direction is pin_A6_direction
+alias pin_CLKOUT_direction is pin_A6_direction
+alias pin_SEG1_direction is pin_A6_direction
+--
+var volatile bit TRISA_TRISA5 at TRISA : 5
+var volatile bit pin_A5_direction at TRISA : 5
+alias pin_AN4_direction is pin_A5_direction
+alias pin_C2OUT_RA5_direction is pin_A5_direction
+alias pin_CPS7_direction is pin_A5_direction
+alias pin_SRNQ_RA5_direction is pin_A5_direction
+alias pin_SS_RA5_direction is pin_A5_direction
+alias pin_SEG5_direction is pin_A5_direction
+--
+var volatile bit TRISA_TRISA4 at TRISA : 4
+var volatile bit pin_A4_direction at TRISA : 4
+alias pin_C1OUT_direction is pin_A4_direction
+alias pin_CPS6_direction is pin_A4_direction
+alias pin_T0CKI_direction is pin_A4_direction
+alias pin_SRQ_direction is pin_A4_direction
+alias pin_SEG4_direction is pin_A4_direction
+--
+var volatile bit TRISA_TRISA3 at TRISA : 3
+var volatile bit pin_A3_direction at TRISA : 3
+alias pin_AN3_direction is pin_A3_direction
+alias pin_C1IN_POS_direction is pin_A3_direction
+alias pin_VREF_POS_direction is pin_A3_direction
+alias pin_SEG15_direction is pin_A3_direction
+--
+var volatile bit TRISA_TRISA2 at TRISA : 2
+var volatile bit pin_A2_direction at TRISA : 2
+alias pin_AN2_direction is pin_A2_direction
+alias pin_C2IN_POS_direction is pin_A2_direction
+alias pin_VREF_NEG_direction is pin_A2_direction
+alias pin_DACOUT_direction is pin_A2_direction
+alias pin_COM2_direction is pin_A2_direction
+--
+var volatile bit TRISA_TRISA1 at TRISA : 1
+var volatile bit pin_A1_direction at TRISA : 1
+alias pin_AN1_direction is pin_A1_direction
+alias pin_C12IN1_NEG_direction is pin_A1_direction
+alias pin_SEG7_direction is pin_A1_direction
+--
+var volatile bit TRISA_TRISA0 at TRISA : 0
+var volatile bit pin_A0_direction at TRISA : 0
+alias pin_AN0_direction is pin_A0_direction
+alias pin_C12IN0_NEG_direction is pin_A0_direction
+alias pin_C2OUT_RA0_direction is pin_A0_direction
+alias pin_SRNQ_RA0_direction is pin_A0_direction
+alias pin_SS_RA0_direction is pin_A0_direction
+alias pin_SEG12_direction is pin_A0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISB at 0x08D
+var volatile byte PORTB_direction at TRISB
+--
+procedure PORTB_low_direction'put(byte in x) is
+ TRISB = (TRISB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low_direction'get() return byte is
+ return (TRISB & 0x0F)
+end function
+--
+procedure PORTB_high_direction'put(byte in x) is
+ TRISB = (TRISB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high_direction'get() return byte is
+ return (TRISB >> 4)
+end function
+--
+var volatile bit TRISB_TRISB7 at TRISB : 7
+var volatile bit pin_B7_direction at TRISB : 7
+alias pin_ICSPDAT_direction is pin_B7_direction
+alias pin_ICDDAT_direction is pin_B7_direction
+alias pin_SEG13_direction is pin_B7_direction
+--
+var volatile bit TRISB_TRISB6 at TRISB : 6
+var volatile bit pin_B6_direction at TRISB : 6
+alias pin_ICSPCLK_direction is pin_B6_direction
+alias pin_ICDCLK_direction is pin_B6_direction
+alias pin_SEG14_direction is pin_B6_direction
+--
+var volatile bit TRISB_TRISB5 at TRISB : 5
+var volatile bit pin_B5_direction at TRISB : 5
+alias pin_AN13_direction is pin_B5_direction
+alias pin_CPS5_direction is pin_B5_direction
+alias pin_CCP3_RB5_direction is pin_B5_direction
+alias pin_P3A_RB5_direction is pin_B5_direction
+alias pin_T1G_RB5_direction is pin_B5_direction
+alias pin_COM1_direction is pin_B5_direction
+--
+var volatile bit TRISB_TRISB4 at TRISB : 4
+var volatile bit pin_B4_direction at TRISB : 4
+alias pin_AN11_direction is pin_B4_direction
+alias pin_CPS4_direction is pin_B4_direction
+alias pin_COM0_direction is pin_B4_direction
+--
+var volatile bit TRISB_TRISB3 at TRISB : 3
+var volatile bit pin_B3_direction at TRISB : 3
+alias pin_AN9_direction is pin_B3_direction
+alias pin_C12IN2_NEG_direction is pin_B3_direction
+alias pin_CPS3_direction is pin_B3_direction
+alias pin_CCP2_RB3_direction is pin_B3_direction
+alias pin_P2A_RB3_direction is pin_B3_direction
+alias pin_VLCD3_direction is pin_B3_direction
+--
+var volatile bit TRISB_TRISB2 at TRISB : 2
+var volatile bit pin_B2_direction at TRISB : 2
+alias pin_AN8_direction is pin_B2_direction
+alias pin_CPS2_direction is pin_B2_direction
+alias pin_VLCD2_direction is pin_B2_direction
+--
+var volatile bit TRISB_TRISB1 at TRISB : 1
+var volatile bit pin_B1_direction at TRISB : 1
+alias pin_AN10_direction is pin_B1_direction
+alias pin_C12IN3_NEG_direction is pin_B1_direction
+alias pin_CPS1_direction is pin_B1_direction
+alias pin_VLCD1_direction is pin_B1_direction
+--
+var volatile bit TRISB_TRISB0 at TRISB : 0
+var volatile bit pin_B0_direction at TRISB : 0
+alias pin_AN12_direction is pin_B0_direction
+alias pin_CPS0_direction is pin_B0_direction
+alias pin_SRI_direction is pin_B0_direction
+alias pin_INT_direction is pin_B0_direction
+alias pin_SEG0_direction is pin_B0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISC at 0x08E
+var volatile byte PORTC_direction at TRISC
+--
+procedure PORTC_low_direction'put(byte in x) is
+ TRISC = (TRISC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low_direction'get() return byte is
+ return (TRISC & 0x0F)
+end function
+--
+procedure PORTC_high_direction'put(byte in x) is
+ TRISC = (TRISC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high_direction'get() return byte is
+ return (TRISC >> 4)
+end function
+--
+var volatile bit TRISC_TRISC7 at TRISC : 7
+var volatile bit pin_C7_direction at TRISC : 7
+alias pin_RX_direction is pin_C7_direction
+alias pin_DT_direction is pin_C7_direction
+alias pin_SEG8_direction is pin_C7_direction
+--
+var volatile bit TRISC_TRISC6 at TRISC : 6
+var volatile bit pin_C6_direction at TRISC : 6
+alias pin_TX_direction is pin_C6_direction
+alias pin_CK_direction is pin_C6_direction
+alias pin_SEG9_direction is pin_C6_direction
+--
+var volatile bit TRISC_TRISC5 at TRISC : 5
+var volatile bit pin_C5_direction at TRISC : 5
+alias pin_SDO_direction is pin_C5_direction
+alias pin_SEG10_direction is pin_C5_direction
+--
+var volatile bit TRISC_TRISC4 at TRISC : 4
+var volatile bit pin_C4_direction at TRISC : 4
+alias pin_SDI_direction is pin_C4_direction
+alias pin_SDA_direction is pin_C4_direction
+alias pin_T1G_RC4_direction is pin_C4_direction
+alias pin_SEG11_direction is pin_C4_direction
+--
+var volatile bit TRISC_TRISC3 at TRISC : 3
+var volatile bit pin_C3_direction at TRISC : 3
+alias pin_SCL_direction is pin_C3_direction
+alias pin_SCK_direction is pin_C3_direction
+alias pin_SEG6_direction is pin_C3_direction
+--
+var volatile bit TRISC_TRISC2 at TRISC : 2
+var volatile bit pin_C2_direction at TRISC : 2
+alias pin_CCP1_direction is pin_C2_direction
+alias pin_P1A_direction is pin_C2_direction
+alias pin_SEG3_direction is pin_C2_direction
+--
+var volatile bit TRISC_TRISC1 at TRISC : 1
+var volatile bit pin_C1_direction at TRISC : 1
+alias pin_T1OSI_direction is pin_C1_direction
+alias pin_CCP2_RC1_direction is pin_C1_direction
+alias pin_P2A_RC1_direction is pin_C1_direction
+--
+var volatile bit TRISC_TRISC0 at TRISC : 0
+var volatile bit pin_C0_direction at TRISC : 0
+alias pin_T1OSO_direction is pin_C0_direction
+alias pin_T1CKI_direction is pin_C0_direction
+alias pin_P2B_RC0_direction is pin_C0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISD at 0x08F
+var volatile byte PORTD_direction at TRISD
+--
+procedure PORTD_low_direction'put(byte in x) is
+ TRISD = (TRISD & 0xF0) | (x & 0x0F)
+end procedure
+function PORTD_low_direction'get() return byte is
+ return (TRISD & 0x0F)
+end function
+--
+procedure PORTD_high_direction'put(byte in x) is
+ TRISD = (TRISD & 0x0F) | (x << 4)
+end procedure
+function PORTD_high_direction'get() return byte is
+ return (TRISD >> 4)
+end function
+--
+var volatile bit TRISD_TRISD7 at TRISD : 7
+var volatile bit pin_D7_direction at TRISD : 7
+alias pin_CPS15_direction is pin_D7_direction
+alias pin_P1D_direction is pin_D7_direction
+alias pin_SEG20_direction is pin_D7_direction
+--
+var volatile bit TRISD_TRISD6 at TRISD : 6
+var volatile bit pin_D6_direction at TRISD : 6
+alias pin_CPS14_direction is pin_D6_direction
+alias pin_P1C_direction is pin_D6_direction
+alias pin_SEG19_direction is pin_D6_direction
+--
+var volatile bit TRISD_TRISD5 at TRISD : 5
+var volatile bit pin_D5_direction at TRISD : 5
+alias pin_CPS13_direction is pin_D5_direction
+alias pin_P1B_direction is pin_D5_direction
+alias pin_SEG18_direction is pin_D5_direction
+--
+var volatile bit TRISD_TRISD4 at TRISD : 4
+var volatile bit pin_D4_direction at TRISD : 4
+alias pin_CPS12_direction is pin_D4_direction
+alias pin_P2D_direction is pin_D4_direction
+alias pin_SEG17_direction is pin_D4_direction
+--
+var volatile bit TRISD_TRISD3 at TRISD : 3
+var volatile bit pin_D3_direction at TRISD : 3
+alias pin_CPS11_direction is pin_D3_direction
+alias pin_P2C_direction is pin_D3_direction
+alias pin_SEG16_direction is pin_D3_direction
+--
+var volatile bit TRISD_TRISD2 at TRISD : 2
+var volatile bit pin_D2_direction at TRISD : 2
+alias pin_CPS10_direction is pin_D2_direction
+alias pin_P2B_RD2_direction is pin_D2_direction
+--
+var volatile bit TRISD_TRISD1 at TRISD : 1
+var volatile bit pin_D1_direction at TRISD : 1
+alias pin_CPS9_direction is pin_D1_direction
+alias pin_CCP4_direction is pin_D1_direction
+--
+var volatile bit TRISD_TRISD0 at TRISD : 0
+var volatile bit pin_D0_direction at TRISD : 0
+alias pin_CPS8_direction is pin_D0_direction
+alias pin_COM3_direction is pin_D0_direction
+--
+-- ------------------------------------------------
+var volatile byte TRISE at 0x090
+var volatile byte PORTE_direction at TRISE
+--
+procedure PORTE_low_direction'put(byte in x) is
+ TRISE = (TRISE & 0xF0) | (x & 0x0F)
+end procedure
+function PORTE_low_direction'get() return byte is
+ return (TRISE & 0x0F)
+end function
+--
+procedure PORTE_high_direction'put(byte in x) is
+ TRISE = (TRISE & 0x0F) | (x << 4)
+end procedure
+function PORTE_high_direction'get() return byte is
+ return (TRISE >> 4)
+end function
+--
+var volatile bit TRISE_TRISE2 at TRISE : 2
+var volatile bit pin_E2_direction at TRISE : 2
+alias pin_AN7_direction is pin_E2_direction
+alias pin_CCP5_direction is pin_E2_direction
+alias pin_SEG23_direction is pin_E2_direction
+--
+var volatile bit TRISE_TRISE1 at TRISE : 1
+var volatile bit pin_E1_direction at TRISE : 1
+alias pin_AN6_direction is pin_E1_direction
+alias pin_P3B_direction is pin_E1_direction
+alias pin_SEG22_direction is pin_E1_direction
+--
+var volatile bit TRISE_TRISE0 at TRISE : 0
+var volatile bit pin_E0_direction at TRISE : 0
+alias pin_AN5_direction is pin_E0_direction
+alias pin_P3A_RE0_direction is pin_E0_direction
+alias pin_CCP3_RE0_direction is pin_E0_direction
+alias pin_SEG21_direction is pin_E0_direction
+--
+-- ------------------------------------------------
+var volatile byte PIE1 at 0x091
+var volatile bit PIE1_TMR1GIE at PIE1 : 7
+var volatile bit PIE1_ADIE at PIE1 : 6
+var volatile bit PIE1_RCIE at PIE1 : 5
+var volatile bit PIE1_TXIE at PIE1 : 4
+var volatile bit PIE1_SSPIE at PIE1 : 3
+var volatile bit PIE1_CCP1IE at PIE1 : 2
+var volatile bit PIE1_TMR2IE at PIE1 : 1
+var volatile bit PIE1_TMR1IE at PIE1 : 0
+-- ------------------------------------------------
+var volatile byte PIE2 at 0x092
+var volatile bit PIE2_OSFIE at PIE2 : 7
+var volatile bit PIE2_C2IE at PIE2 : 6
+var volatile bit PIE2_C1IE at PIE2 : 5
+var volatile bit PIE2_EEIE at PIE2 : 4
+var volatile bit PIE2_BCLIE at PIE2 : 3
+var volatile bit PIE2_LCDIE at PIE2 : 2
+var volatile bit PIE2_CCP2IE at PIE2 : 0
+-- ------------------------------------------------
+var volatile byte PIE3 at 0x093
+var volatile bit PIE3_CCP5IE at PIE3 : 6
+var volatile bit PIE3_CCP4IE at PIE3 : 5
+var volatile bit PIE3_CCP3IE at PIE3 : 4
+var volatile bit PIE3_TMR6IE at PIE3 : 3
+var volatile bit PIE3_TMR4IE at PIE3 : 1
+-- ------------------------------------------------
+var volatile byte OPTION_REG at 0x095
+var volatile bit OPTION_REG_NWPUEN at OPTION_REG : 7
+var volatile bit OPTION_REG_INTEDG at OPTION_REG : 6
+var volatile bit OPTION_REG_TMR0CS at OPTION_REG : 5
+var volatile bit OPTION_REG_TMR0SE at OPTION_REG : 4
+var volatile bit OPTION_REG_PSA at OPTION_REG : 3
+var volatile bit*3 OPTION_REG_PS at OPTION_REG : 0
+-- ------------------------------------------------
+var volatile byte PCON at 0x096
+var volatile bit PCON_STKOVF at PCON : 7
+var volatile bit PCON_STKUNF at PCON : 6
+var volatile bit PCON_NRMCLR at PCON : 3
+var volatile bit PCON_NRI at PCON : 2
+var volatile bit PCON_NPOR at PCON : 1
+var volatile bit PCON_NBOR at PCON : 0
+-- ------------------------------------------------
+var volatile byte WDTCON at 0x097
+var volatile bit*5 WDTCON_WDTPS at WDTCON : 1
+var volatile bit WDTCON_SWDTEN at WDTCON : 0
+-- ------------------------------------------------
+var volatile byte OSCTUNE at 0x098
+var volatile bit*6 OSCTUNE_TUN at OSCTUNE : 0
+-- ------------------------------------------------
+var volatile byte OSCCON at 0x099
+var volatile bit OSCCON_SPLLEN at OSCCON : 7
+var volatile bit*4 OSCCON_IRCF at OSCCON : 3
+var volatile bit OSCCON_SCS1 at OSCCON : 1
+var volatile bit OSCCON_SCS0 at OSCCON : 0
+-- ------------------------------------------------
+var volatile byte OSCSTAT at 0x09A
+var volatile bit OSCSTAT_T1OSCR at OSCSTAT : 7
+var volatile bit OSCSTAT_PLLR at OSCSTAT : 6
+var volatile bit OSCSTAT_OSTS at OSCSTAT : 5
+var volatile bit OSCSTAT_HFIOFR at OSCSTAT : 4
+var volatile bit OSCSTAT_HFIOFL at OSCSTAT : 3
+var volatile bit OSCSTAT_MFIOFR at OSCSTAT : 2
+var volatile bit OSCSTAT_LFIOFR at OSCSTAT : 1
+var volatile bit OSCSTAT_HFIOFS at OSCSTAT : 0
+-- ------------------------------------------------
+var volatile word ADRES at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESL at 0x09B
+-- ------------------------------------------------
+var volatile byte ADRESH at 0x09C
+-- ------------------------------------------------
+var volatile byte ADCON0 at 0x09D
+var volatile bit*5 ADCON0_CHS at ADCON0 : 2
+var volatile bit ADCON0_GO at ADCON0 : 1
+var volatile bit ADCON0_NDONE at ADCON0 : 1
+var volatile bit ADCON0_ADON at ADCON0 : 0
+-- ------------------------------------------------
+var volatile byte ADCON1 at 0x09E
+var volatile bit ADCON1_ADFM at ADCON1 : 7
+var volatile bit ADCON1_ADCS2 at ADCON1 : 6
+var volatile bit ADCON1_ADCS1 at ADCON1 : 5
+var volatile bit ADCON1_ADCS0 at ADCON1 : 4
+var volatile bit ADCON1_ADNREF at ADCON1 : 2
+var volatile bit ADCON1_ADPREF1 at ADCON1 : 1
+var volatile bit ADCON1_ADPREF0 at ADCON1 : 0
+-- ------------------------------------------------
+var volatile byte LATA at 0x10C
+--
+procedure PORTA'put(byte in x) is
+ pragma inline
+ LATA = x
+end procedure
+--
+procedure PORTA_low'put(byte in x) is
+ LATA = (PORTA & 0xF0) | (x & 0x0F)
+end procedure
+function PORTA_low'get() return byte is
+ return (PORTA & 0x0F)
+end function
+--
+procedure PORTA_high'put(byte in x) is
+ LATA = (PORTA & 0x0F) | (x << 4)
+end procedure
+function PORTA_high'get() return byte is
+ return (PORTA >> 4)
+end function
+--
+var volatile bit LATA_LATA7 at LATA : 7
+var volatile bit pin_A7 at PORTA : 7
+alias pin_OSC1 is pin_A7
+alias pin_CLKIN is pin_A7
+alias pin_SEG2 is pin_A7
+--
+procedure pin_A7'put(bit in x at LATA : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA6 at LATA : 6
+var volatile bit pin_A6 at PORTA : 6
+alias pin_OSC2 is pin_A6
+alias pin_CLKOUT is pin_A6
+alias pin_SEG1 is pin_A6
+--
+procedure pin_A6'put(bit in x at LATA : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA5 at LATA : 5
+var volatile bit pin_A5 at PORTA : 5
+alias pin_AN4 is pin_A5
+alias pin_C2OUT_RA5 is pin_A5
+alias pin_CPS7 is pin_A5
+alias pin_SRNQ_RA5 is pin_A5
+alias pin_SS_RA5 is pin_A5
+alias pin_SEG5 is pin_A5
+--
+procedure pin_A5'put(bit in x at LATA : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA4 at LATA : 4
+var volatile bit pin_A4 at PORTA : 4
+alias pin_C1OUT is pin_A4
+alias pin_CPS6 is pin_A4
+alias pin_T0CKI is pin_A4
+alias pin_SRQ is pin_A4
+alias pin_SEG4 is pin_A4
+--
+procedure pin_A4'put(bit in x at LATA : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA3 at LATA : 3
+var volatile bit pin_A3 at PORTA : 3
+alias pin_AN3 is pin_A3
+alias pin_C1IN_POS is pin_A3
+alias pin_VREF_POS is pin_A3
+alias pin_SEG15 is pin_A3
+--
+procedure pin_A3'put(bit in x at LATA : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA2 at LATA : 2
+var volatile bit pin_A2 at PORTA : 2
+alias pin_AN2 is pin_A2
+alias pin_C2IN_POS is pin_A2
+alias pin_VREF_NEG is pin_A2
+alias pin_DACOUT is pin_A2
+alias pin_COM2 is pin_A2
+--
+procedure pin_A2'put(bit in x at LATA : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA1 at LATA : 1
+var volatile bit pin_A1 at PORTA : 1
+alias pin_AN1 is pin_A1
+alias pin_C12IN1_NEG is pin_A1
+alias pin_SEG7 is pin_A1
+--
+procedure pin_A1'put(bit in x at LATA : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATA_LATA0 at LATA : 0
+var volatile bit pin_A0 at PORTA : 0
+alias pin_AN0 is pin_A0
+alias pin_C12IN0_NEG is pin_A0
+alias pin_C2OUT_RA0 is pin_A0
+alias pin_SRNQ_RA0 is pin_A0
+alias pin_SS_RA0 is pin_A0
+alias pin_SEG12 is pin_A0
+--
+procedure pin_A0'put(bit in x at LATA : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATB at 0x10D
+--
+procedure PORTB'put(byte in x) is
+ pragma inline
+ LATB = x
+end procedure
+--
+procedure PORTB_low'put(byte in x) is
+ LATB = (PORTB & 0xF0) | (x & 0x0F)
+end procedure
+function PORTB_low'get() return byte is
+ return (PORTB & 0x0F)
+end function
+--
+procedure PORTB_high'put(byte in x) is
+ LATB = (PORTB & 0x0F) | (x << 4)
+end procedure
+function PORTB_high'get() return byte is
+ return (PORTB >> 4)
+end function
+--
+var volatile bit LATB_LATB7 at LATB : 7
+var volatile bit pin_B7 at PORTB : 7
+alias pin_ICSPDAT is pin_B7
+alias pin_ICDDAT is pin_B7
+alias pin_SEG13 is pin_B7
+--
+procedure pin_B7'put(bit in x at LATB : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB6 at LATB : 6
+var volatile bit pin_B6 at PORTB : 6
+alias pin_ICSPCLK is pin_B6
+alias pin_ICDCLK is pin_B6
+alias pin_SEG14 is pin_B6
+--
+procedure pin_B6'put(bit in x at LATB : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB5 at LATB : 5
+var volatile bit pin_B5 at PORTB : 5
+alias pin_AN13 is pin_B5
+alias pin_CPS5 is pin_B5
+alias pin_CCP3_RB5 is pin_B5
+alias pin_P3A_RB5 is pin_B5
+alias pin_T1G_RB5 is pin_B5
+alias pin_COM1 is pin_B5
+--
+procedure pin_B5'put(bit in x at LATB : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB4 at LATB : 4
+var volatile bit pin_B4 at PORTB : 4
+alias pin_AN11 is pin_B4
+alias pin_CPS4 is pin_B4
+alias pin_COM0 is pin_B4
+--
+procedure pin_B4'put(bit in x at LATB : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB3 at LATB : 3
+var volatile bit pin_B3 at PORTB : 3
+alias pin_AN9 is pin_B3
+alias pin_C12IN2_NEG is pin_B3
+alias pin_CPS3 is pin_B3
+alias pin_CCP2_RB3 is pin_B3
+alias pin_P2A_RB3 is pin_B3
+alias pin_VLCD3 is pin_B3
+--
+procedure pin_B3'put(bit in x at LATB : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB2 at LATB : 2
+var volatile bit pin_B2 at PORTB : 2
+alias pin_AN8 is pin_B2
+alias pin_CPS2 is pin_B2
+alias pin_VLCD2 is pin_B2
+--
+procedure pin_B2'put(bit in x at LATB : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB1 at LATB : 1
+var volatile bit pin_B1 at PORTB : 1
+alias pin_AN10 is pin_B1
+alias pin_C12IN3_NEG is pin_B1
+alias pin_CPS1 is pin_B1
+alias pin_VLCD1 is pin_B1
+--
+procedure pin_B1'put(bit in x at LATB : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATB_LATB0 at LATB : 0
+var volatile bit pin_B0 at PORTB : 0
+alias pin_AN12 is pin_B0
+alias pin_CPS0 is pin_B0
+alias pin_SRI is pin_B0
+alias pin_INT is pin_B0
+alias pin_SEG0 is pin_B0
+--
+procedure pin_B0'put(bit in x at LATB : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATC at 0x10E
+--
+procedure PORTC'put(byte in x) is
+ pragma inline
+ LATC = x
+end procedure
+--
+procedure PORTC_low'put(byte in x) is
+ LATC = (PORTC & 0xF0) | (x & 0x0F)
+end procedure
+function PORTC_low'get() return byte is
+ return (PORTC & 0x0F)
+end function
+--
+procedure PORTC_high'put(byte in x) is
+ LATC = (PORTC & 0x0F) | (x << 4)
+end procedure
+function PORTC_high'get() return byte is
+ return (PORTC >> 4)
+end function
+--
+var volatile bit LATC_LATC7 at LATC : 7
+var volatile bit pin_C7 at PORTC : 7
+alias pin_RX is pin_C7
+alias pin_DT is pin_C7
+alias pin_SEG8 is pin_C7
+--
+procedure pin_C7'put(bit in x at LATC : 7) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC6 at LATC : 6
+var volatile bit pin_C6 at PORTC : 6
+alias pin_TX is pin_C6
+alias pin_CK is pin_C6
+alias pin_SEG9 is pin_C6
+--
+procedure pin_C6'put(bit in x at LATC : 6) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC5 at LATC : 5
+var volatile bit pin_C5 at PORTC : 5
+alias pin_SDO is pin_C5
+alias pin_SEG10 is pin_C5
+--
+procedure pin_C5'put(bit in x at LATC : 5) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC4 at LATC : 4
+var volatile bit pin_C4 at PORTC : 4
+alias pin_SDI is pin_C4
+alias pin_SDA is pin_C4
+alias pin_T1G_RC4 is pin_C4
+alias pin_SEG11 is pin_C4
+--
+procedure pin_C4'put(bit in x at LATC : 4) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC3 at LATC : 3
+var volatile bit pin_C3 at PORTC : 3
+alias pin_SCL is pin_C3
+alias pin_SCK is pin_C3
+alias pin_SEG6 is pin_C3
+--
+procedure pin_C3'put(bit in x at LATC : 3) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC2 at LATC : 2
+var volatile bit pin_C2 at PORTC : 2
+alias pin_CCP1 is pin_C2
+alias pin_P1A is pin_C2
+alias pin_SEG3 is pin_C2
+--
+procedure pin_C2'put(bit in x at LATC : 2) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC1 at LATC : 1
+var volatile bit pin_C1 at PORTC : 1
+alias pin_T1OSI is pin_C1
+alias pin_CCP2_RC1 is pin_C1
+alias pin_P2A_RC1 is pin_C1
+--
+procedure pin_C1'put(bit in x at LATC : 1) is
+ pragma inline
+end procedure
+--
+var volatile bit LATC_LATC0 at LATC : 0
+var volatile bit pin_C0 at PORTC : 0
+alias pin_T1OSO is pin_C0
+alias pin_T1CKI is pin_C0
+alias pin_P2B_RC0 is pin_C0
+--
+procedure pin_C0'put(bit in x at LATC : 0) is
+ pragma inline
+end procedure
+--
+-- ------------------------------------------------
+var volatile byte LATD at 0x10F
+--
+procedure PORTD'put(byte in x) is
+ pragma inline
+ LATD = x
+end procedure
+--
+procedure PORTD_low'put(byte in x) is
+ LATD = (PORTD & 0xF0) | (x & 0x0F)
+end procedure
+function PORTD_low'get() return byte is
+ return (PORTD & 0x0F)
+end function
+--
+procedure PORTD_high'put(byte in x) is
+ LATD = (PORTD & 0x0F) | (x << 4)
+end procedure
+function PORTD_high'get() return byte is
+ return (PORTD >> 4)
+end function
***The diff for this file has been truncated for email.***
=======================================
--- /dev/null
+++ /trunk/sample/16f1826_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16f1826
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16f1826.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:13.
+--
+-- ------------------------------------------------------
+--
+include 16f1826 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16f1827_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16f1827
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16f1827.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:14.
+--
+-- ------------------------------------------------------
+--
+include 16f1827 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16f1933_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16f1933
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16f1933.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:14.
+--
+-- ------------------------------------------------------
+--
+include 16f1933 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16f1934_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16f1934
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16f1934.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:15.
+--
+-- ------------------------------------------------------
+--
+include 16f1934 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16f1936_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16f1936
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16f1936.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:16.
+--
+-- ------------------------------------------------------
+--
+include 16f1936 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16f1937_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16f1937
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16f1937.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:17.
+--
+-- ------------------------------------------------------
+--
+include 16f1937 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16f1938_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16f1938
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16f1938.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:18.
+--
+-- ------------------------------------------------------
+--
+include 16f1938 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16f1939_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16f1939
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16f1939.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:18.
+--
+-- ------------------------------------------------------
+--
+include 16f1939 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16lf1826_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16lf1826
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16lf1826.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:24.
+--
+-- ------------------------------------------------------
+--
+include 16lf1826 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16lf1827_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16lf1827
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16lf1827.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:24.
+--
+-- ------------------------------------------------------
+--
+include 16lf1827 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16lf1933_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16lf1933
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16lf1933.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:25.
+--
+-- ------------------------------------------------------
+--
+include 16lf1933 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16lf1934_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16lf1934
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16lf1934.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:26.
+--
+-- ------------------------------------------------------
+--
+include 16lf1934 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16lf1936_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16lf1936
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16lf1936.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:27.
+--
+-- ------------------------------------------------------
+--
+include 16lf1936 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16lf1937_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16lf1937
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16lf1937.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:27.
+--
+-- ------------------------------------------------------
+--
+include 16lf1937 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16lf1938_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16lf1938
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16lf1938.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:28.
+--
+-- ------------------------------------------------------
+--
+include 16lf1938 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /dev/null
+++ /trunk/sample/16lf1939_blink.jal Sun Feb 7 01:06:46 2010
@@ -0,0 +1,47 @@
+-- ------------------------------------------------------
+-- Title: Blink-a-led of the Microchip pic16lf1939
+--
+-- Author: Rob Hamerling, Copyright (c) 2008..2010, all rights reserved.
+--
+-- Adapted-by:
+--
+-- Compiler: 2.4n
+--
+-- This file is part of jallib (http://jallib.googlecode.com)
+-- Released under the BSD license
(http://www.opensource.org/licenses/bsd-license.php)
+--
+-- Description:
+-- Sample blink-a-led program for Microchip PIC16lf1939.
+--
+-- Sources:
+--
+-- Notes:
+-- - File creation date/time: 7 Feb 2010 09:59:29.
+--
+-- ------------------------------------------------------
+--
+include 16lf1939 -- target PICmicro
+--
+-- This program assumes that a 20 MHz resonator or crystal
+-- is connected to pins OSC1 and OSC2.
+pragma target clock 20_000_000 -- oscillator frequency
+-- configuration memory settings (fuses)
+pragma target OSC HS -- HS crystal or resonator
+pragma target PLLEN P1 -- PLL off
+pragma target WDT disabled -- no watchdog
+pragma target LVP disabled -- no Low Voltage Programming
+pragma target MCLR external -- reset externally
+--
+enable_digital_io() -- make all pins digital I/O
+--
+-- Specify the pin to which the LED (with serial resistor!) is connected:
+alias led is pin_A0
+pin_A0_direction = output
+--
+forever loop
+ led = on
+ _usec_delay(250000)
+ led = off
+ _usec_delay(250000)
+end loop
+--
=======================================
--- /trunk/CHANGELOG Mon Feb 1 12:42:37 2010
+++ /trunk/CHANGELOG Sun Feb 7 01:06:46 2010
@@ -7,6 +7,7 @@

device files:
- Added aliases for the first of two USARTs to be able to use the current
(hardware) serial libs
+ - Added device files for 16 extended midrange PICS (18/19[L]F18/19xx)

externals:
- 23k256 moved "const byte SRAM_23K256_ALWAYS_SET_SPI_MODE = TRUE" from
lib to sample files
@@ -19,6 +20,7 @@

samples:
- added sample for writing and verifying 1024 bytes of eeprom with 18f6722
+ - Added blink-a-led samples for 16 extended midrange PICS
(18/19[L]F18/19xx)

compiler:
-
=======================================
--- /trunk/TORELEASE Wed Feb 3 06:50:57 2010
+++ /trunk/TORELEASE Sun Feb 7 01:06:46 2010
@@ -18,6 +18,12 @@
include/device/12f683.jal
include/device/12hv609.jal
include/device/12hv615.jal
+include/device/16f1933.jal
+include/device/16f1934.jal
+include/device/16f1936.jal
+include/device/16f1937.jal
+include/device/16f1938.jal
+include/device/16f1939.jal
include/device/16f505.jal
include/device/16f506.jal
include/device/16f526.jal
@@ -84,6 +90,12 @@
include/device/16hv610.jal
include/device/16hv616.jal
include/device/16hv785.jal
+include/device/16lf1933.jal
+include/device/16lf1934.jal
+include/device/16lf1936.jal
+include/device/16lf1937.jal
+include/device/16lf1938.jal
+include/device/16lf1939.jal
include/device/16lf722.jal
include/device/16lf723.jal
include/device/16lf724.jal
@@ -336,6 +348,12 @@
sample/12f683_pwm_adc.jal
sample/12hv609_blink.jal
sample/12hv615_blink.jal
+sample/16f1933_blink.jal
+sample/16f1934_blink.jal
+sample/16f1936_blink.jal
+sample/16f1937_blink.jal
+sample/16f1938_blink.jal
+sample/16f1939_blink.jal
sample/16f505_blink.jal
sample/16f506_blink.jal
sample/16f526_blink.jal
@@ -523,6 +541,12 @@
sample/16hv610_blink.jal
sample/16hv616_blink.jal
sample/16hv785_blink.jal
+sample/16lf1933_blink.jal
+sample/16lf1934_blink.jal
+sample/16lf1936_blink.jal
+sample/16lf1937_blink.jal
+sample/16lf1938_blink.jal
+sample/16lf1939_blink.jal
sample/16lf722_blink.jal
sample/16lf723_blink.jal
sample/16lf724_blink.jal
=======================================
--- /trunk/tools/Dev2Jal.cmd Mon Feb 1 12:20:39 2010
+++ /trunk/tools/Dev2Jal.cmd Sun Feb 7 01:06:46 2010
@@ -39,7 +39,7 @@
* (not published, available on
request). *

* *
*
------------------------------------------------------------------------ */
- ScriptVersion = '0.0.89'
+ ScriptVersion = '0.0.90'
ScriptAuthor = 'Rob Hamerling'
CompilerVersion = '2.4n'
/*
------------------------------------------------------------------------ */
@@ -1250,8 +1250,8 @@
end
else do /* not twin name */
field = reg'_'n.j
- select
- when left(reg,5) = 'ANSEL' &, /* intercept
ANSELx */
+ select /* interceptions */
+ when left(reg,5) = 'ANSEL' &,
left(n.j,3) = 'ANS' then do
select
when reg = 'ANSELH' | reg = 'ANSEL1' then
@@ -1285,6 +1285,57 @@
end

select
+ when left(reg,5) = 'ADCON' &, /* ADCON0/1 */
+ pos('VCFG',field) > 0 then do /* VCFG field */
+ p = j - 1 /* previous bit */
+ if right(n.j,5) = 'VCFG0' & right(n.p,5) = 'VCFG1'
then
+ call lineout jalfile, 'var volatile bit*2 ',
+ left(left(field,length(field)-1),25) 'at'
reg ':' offset
+ end
+ when left(reg,5) = 'ADCON' &, /* ADCON0/1 */
+ n.j = 'CHS3' then do /* 'loose' 4th bit
*/
+ chkname = reg'_CHS012' /* compose name */
+ if Name.chkname = '-' then do /* partner field
not present */
+ if msglevel <= 2 then
+ say ' Warning: ADCONx_CHS3 bit without
previous',
+ ' ADCONx_CHS012 field declaration'
+ end
+ else do
+ call lineout jalfile, 'procedure'
reg'_CHS'"'put"'(byte in x) is'
+ call lineout jalfile, ' pragma inline'
+ call lineout jalfile, ' 'reg'_CHS012 = x
-- low order bits'
+ call lineout jalfile, ' 'reg'_CHS3 = 0'
+ call lineout jalfile, ' if ((x & 0x08) != 0)
then'
+ call lineout jalfile, ' 'reg'_CHS3 = 1
-- high order bit'
+ call lineout jalfile, ' end if'
+ call lineout jalfile, 'end procedure'
+ end
+ end
+ when pos('CCP',reg) > 0 & right(reg,3) = 'CON' &, /*
[E]CCPxCON */
+ ((left(n.j,3) = 'CCP' & right(n.j,1) = 'Y') |, /*
CCPxY */
+ (left(n.j,2) = 'DC' & right(n.j,2) = 'B0')) then
do /* DCxB0 */
+ if left(n.j,2) = 'DC' then
+ field = reg'_DC'substr(n.j,3,1)'B'
+ else
+ field = reg'_DC'substr(n.j,4,1)'B'
+ if duplicate_name(field,reg) = 0 then /* unique */
+ call lineout jalfile, 'var volatile bit*2 ',
+ left(field,25) 'at' reg ':' offset -
s.j + 1
+ end
+ when reg = 'GPIO' then do
+ shadow = '_PORTA_shadow'
+ pin = 'pin_A'right(n.j,1)
+ call lineout jalfile, 'var volatile bit ',
+ left(pin,25) 'at' reg ':' offset
+ call insert_pin_alias 'PORTA', 'RA'right(n.j,1), pin
+ call lineout jalfile, '--'
+ call lineout jalfile, 'procedure' pin"'put"'(bit in
x',
+ 'at' shadow ':'
offset') is'
+ call lineout jalfile, ' pragma inline'
+ call lineout jalfile, ' _PORTA_flush()'
+ call lineout jalfile, 'end procedure'
+ call lineout jalfile, '--'
+ end
when reg = 'INTCON' then do
if left(n.j,2) = 'T0' then
call lineout jalfile, 'var volatile bit ',
@@ -1307,20 +1358,6 @@
end
call lineout jalfile, '--'
end
- when reg = 'GPIO' then do
- shadow = '_PORTA_shadow'
- pin = 'pin_A'right(n.j,1)
- call lineout jalfile, 'var volatile bit ',
- left(pin,25) 'at' reg ':' offset
- call insert_pin_alias 'PORTA', 'RA'right(n.j,1), pin
- call lineout jalfile, '--'
- call lineout jalfile, 'procedure' pin"'put"'(bit in
x',
- 'at' shadow ':'
offset') is'
- call lineout jalfile, ' pragma inline'
- call lineout jalfile, ' _PORTA_flush()'
- call lineout jalfile, 'end procedure'
- call lineout jalfile, '--'
- end
when reg = 'TRISIO' then do
pin = 'pin_A'substr(n.j,7)'_direction'
call lineout jalfile, 'var volatile bit ',
@@ -1338,43 +1375,6 @@
end
call lineout jalfile, '--'
end
- when left(reg,5) = 'ADCON' &, /* ADCON0/1 */
- pos('VCFG',field) > 0 then do /* VCFG field */
- p = j - 1 /* previous bit */
- if right(n.j,5) = 'VCFG0' & right(n.p,5) = 'VCFG1'
then
- call lineout jalfile, 'var volatile bit*2 ',
- left(left(field,length(field)-1),25) 'at'
reg ':' offset
- end
- when left(reg,5) = 'ADCON' &, /* ADCON0/1 */
- n.j = 'CHS3' then do /* 'loose' 4th bit
*/
- chkname = reg'_CHS012' /* compose name */
- if Name.chkname = '-' then do /* partner field
not present */
- if msglevel <= 2 then
- say ' Warning: ADCONx_CHS3 bit without
previous',
- ' ADCONx_CHS012 field declaration'
- end
- else do
- call lineout jalfile, 'procedure'
reg'_CHS'"'put"'(byte in x) is'
- call lineout jalfile, ' pragma inline'
- call lineout jalfile, ' 'reg'_CHS012 = x
-- low order bits'
- call lineout jalfile, ' 'reg'_CHS3 = 0'
- call lineout jalfile, ' if ((x & 0x08) != 0)
then'
- call lineout jalfile, ' 'reg'_CHS3 = 1
-- high order bit'
- call lineout jalfile, ' end if'
- call lineout jalfile, 'end procedure'
- end
- end
- when pos('CCP',reg) > 0 & right(reg,3) = 'CON' &, /*
[E]CCPxCON */
- ((left(n.j,3) = 'CCP' & right(n.j,1) = 'Y') |, /*
CCPxY */
- (left(n.j,2) = 'DC' & right(n.j,2) = 'B0')) then
do /* DCxB0 */
- if left(n.j,2) = 'DC' then
- field = reg'_DC'substr(n.j,3,1)'B'
- else
- field = reg'_DC'substr(n.j,4,1)'B'
- if duplicate_name(field,reg) = 0 then /* unique */
- call lineout jalfile, 'var volatile bit*2 ',
- left(field,25) 'at' reg ':' offset -
s.j + 1
- end
otherwise /* other regs */
nop /* can be ignored
*/
end
@@ -1491,6 +1491,9 @@

left('PORT'substr(reg,5)'_direction',25) 'at' reg
call list_tris_nibbles reg /* nibble direction */
end
+ when reg = 'SPBRGL' then do /* for backward
compatibility */
+ call lineout jalfile, 'alias '
left('SPBRG',25) 'is' reg
+ end
otherwise /* others */
nop /* can be ignored */
end
@@ -1500,9 +1503,15 @@
if reg = 'BSR' |,
reg = 'FSR0L' |,
reg = 'FSR0H' |,
+ reg = 'FSR1L' |,
+ reg = 'FSR1H' |,
reg = 'INDF0' |,
+ reg = 'INDF1' |,
+ reg = 'PCL' |,
reg = 'PCLATH' |,
reg = 'STATUS' then do
+ if left(reg,4) = 'INDF' then
+ reg = delstr(reg,4,1) /* compiler wants '_ind' */
reg = tolower(reg) /* to lower case */
call lineout jalfile, 'var volatile byte ' left('_'reg,25)
memtype'at 0x'D2X(addr,3),
' -- (compiler)'
@@ -1511,6 +1520,7 @@
end
end
end
+
return 0

@@ -1539,9 +1549,11 @@
parse var sizes s.1 s.2 s.3 s.4 s.5 s.6 s.7 s.8 .
offset = 7 /* MSbit first */
do j = 1 to 8 while offset >= 0 /* max 8 bits */
+
if n.j = '-' then do /* bit not used */
nop
end
+
else if s.j = 1 then do /* single bit */
if pos('/', n.j) \= 0 then do /* twin name */
parse var n.j val1'/'val2 .
@@ -1562,9 +1574,17 @@
end
else do /* not twin name */
field = reg'_'n.j
- select
- when left(reg,5) = 'ANSEL' &, /* intercept
ANSELx */
- left(n.j,3) = 'ANS' then do
+ select /* intercept
before expansion */
+ when (left(reg,5) = 'ADCON' & left(n.j,3)
= 'CHS') |,
+ (reg = 'OPTION_REG' & (n.j = 'PS0' | n.j = 'PS1' |
n.j = 'PS2')) |,
+ (reg = 'OSCCON' & left(n.j,4)
= 'IRCF') |,
+ (reg = 'OSCTUNE' & left(n.j,3)
= 'TUN') |,
+ (reg = 'T1CON' & left(n.j,6)
= 'T1CKPS') |,
+ (reg = 'T2CON' & (left(n.j,7) = 'T2OUTPS' |
left(n.j,6) = 'T2CKPS')) |,
+ (reg = 'WDTCON' & left(n.j,5)
= 'WDTPS') then do
+ nop /* suppress
enumeration */
+ end
+ when left(reg,5) = 'ANSEL' & left(n.j,3) = 'ANS' then
do
select
when reg = 'ANSELG' then
call lineout jalfile, 'var volatile bit ',
@@ -1591,14 +1611,6 @@
say ' Warning: Unsupported ANSEL register:' reg
end
end
- when left(reg,5) = 'ADCON' &, /* intercept
ADCON0/1 */
- n.j = 'CHS4' then do /* 'loose' 4th bit
*/
- field = reg'_CHS' /* compose name */
- call lineout jalfile, 'var volatile bit*5 ',
- left(field,25) memtype'at' reg ':'
offset - 4
- offset = offset - 4 /* compensate */
- j = j + 4 /* " */
- end
when n.j \= '-' then do /* bit present */
if duplicate_name(field,reg) = 0 then do /* unique */
call lineout jalfile, 'var volatile bit ',
@@ -1616,6 +1628,21 @@
end

select
+ when left(reg,5) = 'ADCON' & n.j = 'CHS0' then do
+ call lineout jalfile, 'var volatile bit*5 ',
+ left(reg'_CHS',25) memtype'at' reg ':' offset
+ end
+ when pos('CCP',reg) > 0 & right(reg,3) = 'CON'
&, /* [E]CCPxCON */
+ ((left(n.j,3) = 'CCP' & right(n.j,1) = 'Y')
|, /* CCPxY */
+ (left(n.j,2) = 'DC' & right(n.j,2) = 'B0')) then
do /* DCxB0 */
+ if left(n.j,2) = 'DC' then
+ field = reg'_DC'substr(n.j,3,1)'B'
+ else
+ field = reg'_DC'substr(n.j,4,1)'B'
+ if duplicate_name(field,reg) = 0 then /* unique */
+ call lineout jalfile, 'var volatile bit*2 ',
+ left(field,25) memtype'at' reg ':'
offset - s.j + 1
+ end
when reg = 'INTCON' then do
if left(n.j,2) = 'T0' then
call lineout jalfile, 'var volatile bit ',
@@ -1631,8 +1658,8 @@
call
insert_pin_alias 'PORT'portletter, 'R'PortLat.PortLetter.offset, pin
call lineout jalfile, '--'
end
- if substr(n.j,4,1) = portletter &, /* port
letter */
- datatype(pinnumber) = 'NUM' then do /* pin
number */
+ if substr(n.j,4,1) = PortLetter &, /* port
letter */
+ datatype(PinNumber) = 'NUM' then do /* pin
number */
call lineout jalfile, 'procedure' pin"'put"'(bit
in x',
'at' reg ':' offset')
is'
call lineout jalfile, ' pragma inline'
@@ -1640,6 +1667,30 @@
call lineout jalfile, '--'
end
end
+ when reg = 'OPTION_REG' & n.j = 'PS0' then do
+ call lineout jalfile, 'var volatile bit*3 ',
+ left(reg'_PS',25) memtype'at' reg ':' offset
+ end
+ when reg = 'OSCCON' & n.j = 'IRCF0' then do
+ call lineout jalfile, 'var volatile bit*4 ',
+ left(reg'_IRCF',25) memtype'at' reg ':' offset
+ end
+ when reg = 'OSCTUNE' & n.j = 'TUN0' then do
+ call lineout jalfile, 'var volatile bit*6 ',
+ left(reg'_TUN',25) memtype'at' reg ':' offset
+ end
+ when reg = 'T1CON' & n.j = 'T1CKPS0' then do
+ call lineout jalfile, 'var volatile bit*2 ',
+ left(reg'_T1CKPS',25) memtype'at' reg ':' offset
+ end
+ when reg = 'T2CON' then do
+ if n.j = 'T2OUTPS0' then
+ call lineout jalfile, 'var volatile bit*4 ',
+ left(reg'_T2OUTPS',25) memtype'at' reg ':' offset
+ else if n.j = 'T2CKPS0' then
+ call lineout jalfile, 'var volatile bit*2 ',
+ left(reg'_T2CKPS',25) memtype'at' reg ':' offset
+ end
when left(reg,4) = 'TRIS' &,
left(n.j,4) = 'TRIS' then do
pin = 'pin_'substr(n.j,5)'_direction'
@@ -1650,22 +1701,16 @@
end
call lineout jalfile, '--'
end
- when pos('CCP',reg) > 0 & right(reg,3) = 'CON' &, /*
[E]CCPxCON */
- ((left(n.j,3) = 'CCP' & right(n.j,1) = 'Y') |, /*
CCPxY */
- (left(n.j,2) = 'DC' & right(n.j,2) = 'B0')) then
do /* DCxB0 */
- if left(n.j,2) = 'DC' then
- field = reg'_DC'substr(n.j,3,1)'B'
- else
- field = reg'_DC'substr(n.j,4,1)'B'
- if duplicate_name(field,reg) = 0 then /* unique */
- call lineout jalfile, 'var volatile bit*2 ',
- left(field,25) memtype'at' reg ':'
offset - s.j + 1
+ when reg = 'WDTCON' & n.j = 'WDTPS0' then do
+ call lineout jalfile, 'var volatile bit*5 ',
+ left(reg'_WDTPS',25) memtype'at' reg ':' offset
end
otherwise /* other regs */
nop /* can be ignored
*/
end
end
end
+
else if s.j <= 8 then do /* multi-bit
subfield */
field = reg'_'n.j
select
@@ -1687,6 +1732,7 @@
end
end
end
+
offset = offset - s.j
end
end
@@ -1787,6 +1833,7 @@
when reg = 'FSR0' |,
reg = 'FSR0L' |,
reg = 'FSR0H' |,
+ reg = 'INDF0' |,
reg = 'PCL' |,
reg = 'PCLATH' |,
reg = 'PCLATU' |,
@@ -1797,11 +1844,6 @@
'shared at 0x'addr ' -- (compiler)'
end

- when reg = 'INDF0' then do
- call lineout jalfile, 'var volatile' field left('_ind0',25),
- 'shared at 0x'addr ' -- (compiler)'
- end
-
when reg = 'STATUS' then do /* status register
*/
call list_status16 i, addr /* extra for
compiler */
end
@@ -1893,8 +1935,26 @@
end
else do /* not twin name */
field = reg'_'n.j
- select
- when left(reg,5) = 'ANSEL' &, /* intercept
ANSELx */
+ select /* interceptions */
+ when left(reg,5) = 'ADCON' &, /* ADCON0/1 */
+ pos('VCFG',field) > 0 then do /* VCFG field */
+ p = j - 1 /* previous bit */
+ if right(n.j,5) = 'VCFG0' & right(n.p,5) = 'VCFG1'
then
+ call lineout jalfile, 'var volatile bit*2 ',
+ left(left(field,length(field)-1),25)
memtype 'at' reg ':' offset
+ end
+ when pos('CCP',reg) > 0 & right(reg,3) = 'CON' &, /*
[E]CCPxCON */
+ ((left(n.j,3) = 'CCP' & right(n.j,1) = 'Y') |, /*
CCPxY */
+ (left(n.j,2) = 'DC' & right(n.j,2) = 'B0')) then
do /* DCxB0 */
+ if left(n.j,2) = 'DC' then
+ field = reg'_DC'substr(n.j,3,1)'B'
+ else
+ field = reg'_DC'substr(n.j,4,1)'B'
+ if duplicate_name(reg'_DC'n'B',reg) = 0 then /*
unique */
+ call lineout jalfile, 'var volatile bit*2 ',
+ left(field,25) memtype 'at' reg ':'
offset - s.j + 1
+ end
+ when left(reg,5) = 'ANSEL' &,
left(n.j,3) = 'ANS' then do
if reg = 'ANSELH' then
call lineout jalfile, 'var volatile bit ',
@@ -1929,7 +1989,7 @@
'-- ensure default (legacy) SFR
mapping'
end

- /* additional
declarations */
+ /* special
declarations */
select
when reg = 'INTCON' then do
if left(n.j,2) = 'T0' then do
@@ -1937,6 +1997,25 @@
left(reg'_TMR0'substr(n.j,3),25)
memtype 'at' reg ':' offset
end
end
+ when left(reg,3) = 'LAT' then do /* LATx register */
+ PortLetter = right(reg,1)
+ PinNumber = right(n.j,1)
+ pin = 'pin_'PortLat.PortLetter.offset
+ if PortLat.PortLetter.offset \= 0 then do /* pin
present in PORTx */
+ call lineout jalfile, 'var volatile bit ',
+ left(pin,25)
memtype 'at' 'PORT'portletter ':' offset
+ call
insert_pin_alias 'PORT'portletter, 'R'PortLat.PortLetter.offset, pin
+ call lineout jalfile, '--'
+ end
+ if substr(n.j,4,1) = portletter &, /* port
letter */
+ datatype(pinnumber) = 'NUM' then do /* pin
number */
+ call lineout jalfile, 'procedure' pin"'put"'(bit
in x',
+ 'at' reg ':' offset')
is'
+ call lineout jalfile, ' pragma inline'
+ call lineout jalfile, 'end procedure'
+ call lineout jalfile, '--'
+ end
+ end
when reg = 'PIE1' then do
if n.j = 'TX1IE' | n.j = 'RC1IE' then do /* add
alias without '1' */
call lineout jalfile, 'alias ',
@@ -1961,25 +2040,6 @@
end
end
end
- when left(reg,3) = 'LAT' then do /* LATx register */
- PortLetter = right(reg,1)
- PinNumber = right(n.j,1)
- pin = 'pin_'PortLat.PortLetter.offset
- if PortLat.PortLetter.offset \= 0 then do /* pin
present in PORTx */
- call lineout jalfile, 'var volatile bit ',
- left(pin,25)
memtype 'at' 'PORT'portletter ':' offset
- call
insert_pin_alias 'PORT'portletter, 'R'PortLat.PortLetter.offset, pin
- call lineout jalfile, '--'
- end
- if substr(n.j,4,1) = portletter &, /* port
letter */
- datatype(pinnumber) = 'NUM' then do /* pin
number */
- call lineout jalfile, 'procedure' pin"'put"'(bit
in x',
- 'at' reg ':' offset')
is'
- call lineout jalfile, ' pragma inline'
- call lineout jalfile, 'end procedure'
- call lineout jalfile, '--'
- end
- end
when left(reg,4) = 'TRIS' then do /* TRISx register
*/
portletter = right(reg,1)
pinnumber = right(n.j,1)
@@ -1994,24 +2054,6 @@
end
end
end
- when left(reg,5) = 'ADCON' &, /* ADCON0/1 */
- pos('VCFG',field) > 0 then do /* VCFG field */
- p = j - 1 /* previous bit */
- if right(n.j,5) = 'VCFG0' & right(n.p,5) = 'VCFG1'
then
- call lineout jalfile, 'var volatile bit*2 ',
- left(left(field,length(field)-1),25)
memtype 'at' reg ':' offset
- end
- when pos('CCP',reg) > 0 & right(reg,3) = 'CON' &, /*
[E]CCPxCON */
- ((left(n.j,3) = 'CCP' & right(n.j,1) = 'Y') |, /*
CCPxY */
- (left(n.j,2) = 'DC' & right(n.j,2) = 'B0')) then
do /* DCxB0 */
- if left(n.j,2) = 'DC' then
- field = reg'_DC'substr(n.j,3,1)'B'
- else
- field = reg'_DC'substr(n.j,4,1)'B'
- if duplicate_name(reg'_DC'n'B',reg) = 0 then /*
unique */
- call lineout jalfile, 'var volatile bit*2 ',
- left(field,25) memtype 'at' reg ':'
offset - s.j + 1
- end
otherwise /* others */
nop /* no extras */
end