export void translate (uniform REAL vector[], uniform REAL x[], uniform REAL y[], uniform REAL z[], uniform size_t size)
{
foreach (i = 0 ... size)
{
x[i] += vector[0];
y[i] += vector[1];
z[i] += vector[2];
}
}
is issuing warnings like that:
ispc/util.ispc:8:5: Performance Warning: Gather required to load value.
x[i] += vector[0];
without these pragmas?
Is this really a case, where the compiler is not able to deduce that the memory access can be done using vector instructions? I would suppose that the structure of this subroutine is making everything plain. How can we make this routine not generate such warnings (without pragmas)?
Thank you:)
Tomek
--
You received this message because you are subscribed to the Google Groups "Intel SPMD Program Compiler Users" group.
To unsubscribe from this group and stop receiving emails from it, send an email to ispc-users+...@googlegroups.com.
To view this discussion on the web visit https://groups.google.com/d/msgid/ispc-users/3c2edff1-3b12-421c-bb6d-7e3f6e44376b%40googlegroups.com.
For more options, visit https://groups.google.com/d/optout.
Hi Tomek,We do have some problems with gathers optimization. But in this particular case I don't see any warnings.Please send more complete example (in your code snippet it's not clean what REAL is), the link to godbolt.org would be ideal. And the version of ISPC that you are using.Dmitry.
On Fri, Jul 19, 2019 at 1:03 AM Tomek <t.ko...@gmail.com> wrote:
Hi,--It's great that we can now use per line "#pragma ignore warning". Thank you for that:)!And, I still don't understand why such simple routine:export void translate (uniform REAL vector[], uniform REAL x[], uniform REAL y[], uniform REAL z[], uniform size_t size)
{
foreach (i = 0 ... size)
{
x[i] += vector[0];
y[i] += vector[1];
z[i] += vector[2];
}
}
is issuing warnings like that:
ispc/util.ispc:8:5: Performance Warning: Gather required to load value.
x[i] += vector[0];
without these pragmas?
Is this really a case, where the compiler is not able to deduce that the memory access can be done using vector instructions? I would suppose that the structure of this subroutine is making everything plain. How can we make this routine not generate such warnings (without pragmas)?
Thank you:)
Tomek
You received this message because you are subscribed to the Google Groups "Intel SPMD Program Compiler Users" group.
To unsubscribe from this group and stop receiving emails from it, send an email to ispc-...@googlegroups.com.
To unsubscribe from this group and stop receiving emails from it, send an email to ispc-users+...@googlegroups.com.
To view this discussion on the web visit https://groups.google.com/d/msgid/ispc-users/2f7da176-20e9-478e-8990-7b64c91c87eb%40googlegroups.com.
To view this discussion on the web visit https://groups.google.com/d/msgid/ispc-users/2f7da176-20e9-478e-8990-7b64c91c87eb%40googlegroups.com.