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Anyone have a source or binaries of "AB22 BIOS and Boot Programs for CP/M-80 running on iSBC-80/24" ?

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scott baker

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Nov 30, 2024, 10:23:37 PM11/30/24
to intel-devsys
I have the PDF, which is available online, but my attempts to OCR it have not gone well. I'm wondering if anyone has a binary copy of the BIOS and/or a digital copy of the source that I could assemble?

Thanks,
Scott

Vale, Martyn

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Dec 1, 2024, 7:57:11 AM12/1/24
to intel-...@googlegroups.com

For what it’s worth a quick attempt at OCR.

 

Martyn.

 

From: intel-...@googlegroups.com <intel-...@googlegroups.com> On Behalf Of scott baker
Sent: 01 December 2024 03:24
To: intel-devsys <intel-...@googlegroups.com>
Subject: intel-devsys Anyone have a source or binaries of "AB22 BIOS and Boot Programs for CP/M-80 running on iSBC-80/24" ?

 

Caution: External sender

 

I have the PDF, which is available online, but my attempts to OCR it have not gone well. I'm wondering if anyone has a binary copy of the BIOS and/or a digital copy of the source that I could assemble?

 

Thanks,

Scott

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CPM_for_iSBC_80_24A+iSBX_218_Sep82.txt
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Herbert Johnson

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Dec 1, 2024, 1:01:15 PM12/1/24
to intel-...@googlegroups.com, scott baker
On 11/30/2024 10:23 PM, scott baker wrote:
> I have the PDF [of the V1.2 monitor], which is available online, but my attempts to OCR it
I spent my Sunday morning, resolving Scott Baker's apparent request. I
Did so from curiousity and because Scott cited my site elsewhere. The
bottom line are the results below, now on my Web page Scott apparently
found (Scott did not ask me directly, or cite the Web page he accessed,
more follows to explain).

https://www.retrotechnology.com/restore/mon80_proms.html

Under "Intel V1.2 monitor, OCRed source". He'll find there now, most of
what he asked for and really had in hand. Other items he asked for, I
found in the same general locations. Um, Scott says at the beginning of
the thread, he's new to Multibus. So that mitigates some of these errors
of oversight and omission. It still took my Sunday morning to resolve those.

---

There is/was no need to OCR the Intel V1.2 monitor, because that monitor
was resolved years ago by Bill Beech et al - as my Web page cites. Scott
Baker apparently found this page, found errors - but did not tell me. He
simply asked elsewhere (here) for someone to OCR this when he could not.

I know these things, thanks to a WEb search on Scott's posted subject,
which found:

https://forum.vcfed.org/index.php?threads/starting-a-new-multibus-and-potential-isis-ii-project.1250581/page-2

this thread at VCFed's forum. There he does what he should have done
here - state his purposes and reference his prior results. In there, he
cites "Herb's" (that's me) but doesn't provide a Web link to whatever
page he found. I fortunately searched my own site to find my uncited Web
page, so I could see what was at issue.

Read the fine thread for all the details, which I unravel below. These
various omissions, caused fussing by me and others who were in-the-dark
in varying degrees about his actions to date.

Scott got the sources he asked for; found some errors, which he
courteously listed. He also pointed to Mark Ogden's Intel archive for
the V1.2 PDF. I've now updated my Web page with these new resources I've
visually confirmed Scott's errors were misreads of the PDFed listing.
But I've not changed the ASM or LST V1.2 file.

A ROM dump of an V1.2 Intel MON-80 ROM would not be a bad idea, a
sanity-check. There may be one around on the Web these days. I've done
enough work today, I may look for it later. If someone comes across it,
please inform *me* so I can update my Web page on the matter.

It would be good to update in various threads where Scott asks about
this monitor. "Proof of the pudding is in the eating" if Scott made the
corrected V1.2 monitor work on an 80/24(A?) card. I will probably post a
shorter version of this response in the VCFed thread shortly.

Finally, someone might resolve a point of confusion for me which does
not matter much. The ROM monitor PDF source listing and my sites ASM
listing, calls out this V1.2 monitor for the "Intel 80/20-4
Microcomputer" of 1977. Scott Baker is working on an 80/24 or 80/24A board.

https://mark-ogden.uk/files/intel/publications/148437-001%20iSBC%2080-24A%20Single%20Board%20Computer%20Hardware%20Reference%20Manual-Nov85.pdf

Here's Mark's 80/24A manual (Scott asked for this, it's in the same
publications directory as Mark's 80/20 documents).

https://mark-ogden.uk/files/intel/publications/9800317D%20SBC%2080-20%20and%20SBC%2080-20-4%20Single%20Board%20Computeres%20Hardware%20Reference%20Manual-Feb79.pdf

Here's Mark's copy of the 80/20 and 80/20-4 manual. There's a few other
80/20 documents in Mark's publications directory.

It may be that the 80/24 and 80/24A and 80/20 will all run the V1.2
monitor. If there's hardware differences relevant to the monitor, these
manuals may resolve it.

Regards, Herb Johnson



--
Herb Johnson, New Jersey USA
http://www.retrotechnology.com or .net
preserve and restore 1970's personal computing
email: hjohnson @ retrotechnology dot com
or try later at herbjohnson @ comcast dot net

scott baker

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Dec 1, 2024, 3:15:28 PM12/1/24
to intel-devsys
(Apologies if this is a duplicate -- I'm bad at operating mailing lists this morning...)

Hello Herb and others,

Apologies for not reaching out -- I didn't realize this list or this community is as active as it is! It's great to have these resources available, and Herb I did find your site extremely helpful  Anyhow, I'll mention my high-level goals here as well:

1. Get an 80/24 board to run by itself with a monitor, basic, and forth. Done!

2. Buy or build a RAM board and an SBX-218 to augment the 80/24. Done, but with some reservations that I haven't been able to make the RAM board work yet, and haven't even tried to test the 218. I might build my own RAM board anyway.

3. Expand the 80/24 board with the RAM and the SBX-218 and use it to run CP/M, using the AB22 BIOS. Boot either from physical floppies or a gotek. Play Zork. (Subject of this thread)

4. Expand as necessary to boot ISIS-II. This is going to be more of a challenge. Martyn's thread on floppy controllers really got my interest, as I had pretty much given up on finding the original controllers, and I was planning on building my own controller as the protocol is well documented. I might still do so.

5. Add some interesting mult-imodules. I already have a few.

I have manuals for the 80/20-4 and 80/24A but not the 80/24 (without the A). The issue with the 80/24A manual is that all of the jumpers are renumbered between the board revisions. There is a cross reference of 80/20-4 and 80/24 and 80/24A jumpers in the 80/24A manual but it is incomplete. I was able to muddle though it with a little bit of probing of the board. There's no particular reason why I chose an 80/24 (non-A) over an 80/24A. It's just what was cheapest on eBay at that moment.

As Herb mentioned, I do have a monitor running on the 80/24, and I do have basic and fig-forth running also.

Next thing on my plate is to get the RAM board to work, plug in the SBX-218, and try out CP/M. Hence this thread and the need for the CP/M BIOS.

I'm strictly evenings / weekends / holidays on this, so I probably disappear for most of the work week.

Anyhow, it's great to meet everyone.

Scott

William Beech

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Dec 3, 2024, 8:12:47 AM12/3/24
to Scott Baker, intel-...@googlegroups.com
Scott,

No, you sent to the group.  I tried to answer your previous message and I had a Sunday morning!  I sent this directly to you.   

I am still looking.

Bill


On 12/1/2024 1:12 PM, Scott Baker wrote:
Well gosh I think I just sent that to you directly rather than the list. Sunday morning... I'm bad at operating mailing lists...

Anyhow, if you do have that source, it would be great :)

Scott

On Sun, Dec 1, 2024 at 11:48 AM Scott Baker <smb...@gmail.com> wrote:
Hello Herb and others,

Apologies for not reaching out -- I didn't realize this list or this community is as active as it is! It's great to have these resources available, and Herb I did find your site extremely helpful  Anyhow, I'll mention my high-level goals here as well:

1. Get an 80/24 board to run by itself with a monitor, basic, and forth. Done!

2. Buy or build a RAM board and an SBX-218 to augment the 80/24. Done, but with some reservations that I haven't been able to make the RAM board work yet, and haven't even tried to test the 218. I might build my own RAM board anyway.

3. Expand the 80/24 board with the RAM and the SBX-218 and use it to run CP/M, using the AB22 BIOS. Boot either from physical floppies or a gotek. Play Zork. (Subject of this thread)

4. Expand as necessary to boot ISIS-II. This is going to be more of a challenge. Martyn's thread on floppy controllers really got my interest, as I had pretty much given up on finding the original controllers, and I was planning on building my own controller as the protocol is well documented. I might still do so.

5. Add some interesting mult-imodules. I already have a few.

I have manuals for the 80/20-4 and 80/24A but not the 80/24 (without the A). The issue with the 80/24A manual is that all of the jumpers are renumbered between the board revisions. There is a cross reference of 80/20-4 and 80/24 and 80/24A jumpers in the 80/24A manual but it is incomplete. I was able to muddle though it with a little bit of probing of the board. There's no particular reason why I chose an 80/24 (non-A) over an 80/24A. It's just what was cheapest on eBay at that moment.

As Herb mentioned, I do have a monitor running on the 80/24, and I do have basic and fig-forth running also.

Next thing on my plate is to get the RAM board to work, plug in the SBX-218, and try out CP/M. Hence this thread and the need for the CP/M BIOS.

I'm strictly evenings / weekends / holidays on this, so I probably disappear for most of the work week.

Anyhow, it's great to meet everyone.

Scott


On Sun, Dec 1, 2024 at 11:12 AM William Beech <nj...@nj7p.info> wrote:
Scott,

I believe I have that source code somewhere.  Allow me to hunt it down.

Bill

scott baker

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Dec 3, 2024, 8:12:47 AM12/3/24
to intel-devsys
Thanks Martyn, that's much better than my attempts!

I think a short python program to post-process it could do wonders. If there's a line of output with a discernable line number, then generally it looks like the OCR did a decent job. Add the appropriate whitespace back in and it probably looks pretty good.

Now I have something to work on between Christmas and New Years...

Scott

Scott Baker

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Dec 3, 2024, 8:12:47 AM12/3/24
to intel-...@googlegroups.com
Or... I could ask an AI to do it for me (I'm lousy at prompt engineering; there are folks who could do much better):

"The following is an OCRed assembly language source with some formatting errors that I would like you to reformat:
... paste chunk of OCRed text ...
"

and Claude's response:

"I've made the following corrections:
  1. Fixed typos (e.g., "RI" to "RZ", "ti" to "HL")
  2. Aligned all instruction mnemonics and operands
  3. Properly formatted address and machine code columns
  4. Standardized comment alignment
  5. Fixed the decorative comment lines
  6. Corrected obvious OCR errors (e.g., "038" to "D3E8")
  7. Aligned and properly spaced all DB statements and their data
  8. Fixed misaligned parentheses and operators"
I had my doubts, but I think he was even right about the 038 to D3E8, which means something in his training was smart enough to realize that and OUT instruction assembles for D3. A snippet is attached:

Scott

claude-test.txt

Herbert Johnson

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Dec 4, 2024, 4:06:08 PM12/4/24
to intel-...@googlegroups.com, William Beech, Scott Baker
Scott Baker wrote:
> I have manuals for the 80/20-4 and 80/24A but not the 80/24 (without the
> A). The issue with the 80/24A manual is that all of the jumpers are
> renumbered between the board revisions. There is a cross reference of
> 80/20-4 and 80/24 and 80/24A jumpers in the 80/24A manual but it is
> incomplete. I was able to muddle though it with a little bit of probing
> of the board. There's no particular reason why I chose an 80/24 (non-A)
> over an 80/24A. It's just what was cheapest on eBay at that moment.

Scott, since there's no 80/24 manual available, please note the
differences in jumpers not provided by the 24A manual and send me a copy
or post them here. I'll add those notes to my Web site. Already it
includes your statement above.

Regards Herb

scott baker

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Dec 4, 2024, 4:31:52 PM12/4/24
to intel-devsys
Sure, I'll see if I can jot down a few things this weekend.

One example is the interrupt matrix, which is a large collection of jumper pins. In the cross-reference it lists the ranges (24-50 for the 24, 83-123 for the 24A) but there isn't the same number of jumpers and even if there were, it's not clear they are in the same order. A similar example is the EPROM Jumper Matrix -- I just found a picture of an 80/24 on eBay with 2764 EPROMs installed, and used that. Anyhow, I'll try to document what I run into.

Another interesting thing that came up. I did get my hands on an 80/24A (funny story about ordering the next-least-expensive card on eBay while the first was "lost in the mail")  so now I have both 80/24 and 80/24A. The 80/24A works with my 028 RAM board, but the 80/24 does not. Maybe a jumper thing -- I haven't diagnosed.

Scott

mark.p...@btinternet.com

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Dec 6, 2024, 2:41:24 AM12/6/24
to intel-...@googlegroups.com

All

I have re-created the ldcpm.asm and bio115.asm from the AB22.pdf.

They both assemble and generate the same length code.

I have posted the asm code and the listing files at

https://mark-ogden.uk/files/ab22/bio115.asm

https://mark-ogden.uk/files/ab22/bio115.lst

https://mark-ogden.uk/files/ab22/ldcpm.asm

https://mark-ogden.uk/files/ab22/ldcpm.lst

 

Although I took reasonable care in checking the assembly, some errors might have crept in mainly

  1. Comments may have spurious errors
  2. O and zero and I and one errors may have crept in label names, hopefully they have been done consistently so the code generated is the same

I have extracted the two other asm files, format and cpydsk, however I haven’t checked the OCR extraction yet. They also appear to be assembled using the CP/M assembler and not the Intel one.

 

Regards

Mark

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Scott Baker

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Dec 6, 2024, 2:41:24 AM12/6/24
to William Beech, intel-...@googlegroups.com
Thanks for looking, Bill. I suppose I'll get to it some time before Christmas :)

The OCR that Martyn did is a good starting point, and I actually had reasonable luck getting an AI to reformat it. So maybe 80% proofreading the reasonable parts and 20% typing in the parts that OCR so thoroughly messed up that it's not useful.

Scott

On Tue, Dec 3, 2024 at 2:55 PM William Beech <nj...@nj7p.info> wrote:
Scott,

Well, I found I had only started to create the iSBC 8-/24 BIOS.  My experience with OCR is that I get columns rather than lines of code.  I have not overcome this problem and spend a great deal of time typing in the source code or working with a disassembly of the source and making it the original source code.  If I have needed it, I have done it.  But I notice my Web pages don't reflect this.  I am working to correct that over the next few days.

Sorry, but I would like to collect whatever you do to add to the collection.

Thanks!

Bill
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William Beech

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Dec 6, 2024, 2:41:24 AM12/6/24
to intel-...@googlegroups.com, scott baker
Scott,

Well, I found I had only started to create the iSBC 8-/24 BIOS.  My experience with OCR is that I get columns rather than lines of code.  I have not overcome this problem and spend a great deal of time typing in the source code or working with a disassembly of the source and making it the original source code.  If I have needed it, I have done it.  But I notice my Web pages don't reflect this.  I am working to correct that over the next few days.

Sorry, but I would like to collect whatever you do to add to the collection.

Thanks!

Bill


On 12/1/2024 1:15 PM, scott baker wrote:

mark.p...@btinternet.com

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Dec 6, 2024, 7:31:21 AM12/6/24
to intel-...@googlegroups.com

All

I have now reconstructed the four source code files that are part of INSITE AB22.

A 7z file containing the 4 source files, 4 generated listings and a readme.txt file can be downloaded from

https://mark-ogden.uk/files/ab22/AB22-cpmbios.7z

regards

Mark

 

 

 

 


Sent: 01 December 2024 17:31
To: intel-devsys <intel-...@googlegroups.com>

scott baker

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Dec 6, 2024, 9:34:56 PM12/6/24
to intel-devsys
Thanks Mark, much appreciated! I'd also like to thank you for your website -- it's been a great source of material for this project and for the iPDS and SBX-251 used in my prior projects :)

Scott

scott baker

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Dec 14, 2024, 7:26:18 PM12/14/24
to intel-devsys
Have done anything more on CP/M, but I did make some progress building my new RAM board.

The RAM board allows selection of RAM or ROM in 4KB page increments (16 dip switches for each), which turned out to be a bit of overkill -- my original Idea was I would put my ROM on this board, but it might be more convenient to just leave ROM on the 80/24A itself and let this board map the entire 64KB space to RAM, allowing me to eliminate a plethora of dip switches and logic. It can accommodate up to 512KB of RAM using the additional address lines on the multibus; maybe that will come in handy with an x86 project. It also features two multimodule slots, and has my prototype IOC emulator in progress on the right side of the pcboard.

multibus-ram-with-display-1024.JPG
Installed in one of the multimodule slots is my TIL311 display module, with 2 digits populated (those TIL311 are pretty efficient at turning electricity into a little bit of light and a great deal of heat).

I tried and tried but I did not find any source of multimodule connectors, so I fell back to the usual 0.100 headers.

Scott

scott baker

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Jan 8, 2025, 10:19:02 PMJan 8
to intel-devsys
Mark,

A small set of corrections to the cpm bios source files are inline at the bottom of this message. The two sets of changes marked "XXX SMBAKER" I believe to be bugs in the BIOS:
  1. It only sets SP on warm boot, but not on cold boot. I'm not sure what an 8085 defaults SP to; maybe it is undefined. Wherever it was, I didn't have RAM there first time I tried this.
  2. It outputs 0 three times to the SBX-351 8251 when it should do so to the console 8251.

The rest of the corrections I think are small OCR errors. Some of them (like "LUD COUNTR") didn't show up when you assembled because they're inside of an IF that is normally FALSE.

Unfortunately, I even with that I got stuck here on the console:

SBC-80/24 AND SBX-218 CP/M Z 2 V3.0 (REVISED 01/15/82)

DISK ERROR WHILE READING ON SINGLE DENSITY DISK A, TRACK 00, SECTOR 02.
ERROR STATUS BYTES: ST0 = 01000000, ST1 = 00000001, ST2 = 00000000.
HIT CTL-C TO REBOOT, ANY OTHER KEY TO RETURN ERROR TO BOOS.

According to data sheet, this means it can't detect the ID address mark, which probably means it's not reading the disk properly at all. I'm using a Gotek that I believe is properly setup. Maybe something is wrong with my SBX-218. There's lots of analog components (resistors of specifically chosen values to set timing) that could have drifted over the past three decades since this thing was last used. I tired with both an IMG file manually set with the proper parameters and an HFE made from an IMD file (which should simply come with the right parameters embedded in it). Neither time could I read anything from my disk. I'm not sure I'm going to bother to diagnose the SBX-218 further. Maybe next December's project... ;)

Scott


--- diff is below ---

$ diff bio115-zasm.asm  bio115.asm  
101c101
< ST8251  EQU     0EDH            ; STATUS WORD IFFUT PORT
---
> ST8251  EQU     0EEH            ; STATUS WORD IFFUT PORT
243d242
<         LXI     SP,STKTOP       ; USE SPACE IN BUFFER FOR STACK  XXX SMBAKER
264,266c263,265
<         OUT     CM8251          ; XXX SMBAKER
<         OUT     CM8251
<         OUT     CM8251
---
>         OUT     CMX351
>         OUT     CMX351
>         OUT     CMX351
390c389
<         LHLD    COUNTR
---
>         LUD     COUNTR
1918c1917
<         MVI     M,'1'           ; IF CARRY = 1 TIEN STORE A '1'
---
>         MVI     M,'l'           ; IF CARRY = 1 TIEN STORE A '1'
1938c1937
<         DB      'HIT CTL-C TO REBOOT, ANY OTHER KEY TO RETURN ERROR TO BDOS.',0
---
>         DB      'HIT CTL-C TO REBOOT, ANY OTHER KEY TO RETURN ERROR TO BOOS.',0
1970,1971c1969,1970
< NRMSG:  DB      0DH, 0AH,'DRIVE '       ; NOTE THE TRAILING SPACE HERE...
< NRDISK: DB      'A NOT READY; HIT ANY KEY TO CONTINUE',0Dh,0AH,0
---
> NRMSG:  DB      0DH, 0AH,'DRIVE'
> NRDISK: DB      'A NOT READY; HIT ANY KEY TO CONTINYUE',0Dh,0AH,0
2178c2176
<         JMP     GOTOIT          ; OTHERWISE GO FOR IT!
---
>         JP     GOTOIT           ; OTHERWISE GO FOR IT!

William Beech

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Jan 8, 2025, 11:53:31 PMJan 8
to intel-...@googlegroups.com
Scott,

I have made these corrections to the source in my archives.

Thanks!

Bill
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