Change interrupt vector table address

[Ananda R]

Hi all, 

 I am using arm cortex-M0 32 bit  processor with gcc compiler and as per i know  IVT is produced by the compiler. 

Need help on below questions. 

1. Is it possible to change the address of interrupt address table. If yes how to do this.

2. In case if my interrupt service routine exceeds the size defined, how to handle this?

Regards, 

Anand 

9663046128 

[Mogasati Gopikrishna]

Hi . .afaik , interrupt vector table is a predefined location the processor jumps to.

If ur handler needs more memory, use a jump instruction .

@Gopikrishna

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[Litan Parida]

Dear Anand,

                  Please check Vector Table Offset Register(VTOR). From datasheet make sure it has this facility or not.

 For Cortex M0 has a memory remap feature on its memory system and it is not a part of the processor to allow Vector Table Access to be Optionally redirected to the SRAM.

In the case of Cortex M3/4, there is a Vector Table Offset Register to Relocate the Vector Table to CODE or SRAM memory.

For most ARM cores (ex: ARM9, ARM10)  including 8051, the vector table can be located at either address 0x0000 or 0xFFFF0000.Which is used is controlled by a Reset Signal and then by CP15 Control Register after RESET.

POINT TO BE NOTED: This is Virtual address 0x0000 or 0xFFFF0000  

http://infocenter.arm.com/help/topic/com.arm.doc.den0001c/DEN0001C_principles_of_arm_memory_maps.pdf

Cores that Support Trust Zone(ex: Cortex A-Series)  can override the vector table location, and use any ADDRESS and controlled by CP15 Control Register, So for Reset itself, we are still limited to the 2 locations.

Try Vector Table Remapping from the below link,

http://www.keil.com/forum/19866/how-to-relocate-the-cortex-m3-vector-table/

http://doar-e.github.io/blog/2014/04/30/corrupting-arm-evt/

https://embeddedfreak.wordpress.com/2009/08/07/cortex-m3-interrupt-vector-table/

Thanks & Regards,

Litan Parida,

Cell: 91-9035368088.