Re: Regarding the connection of SCL 180nm I/O Pads

[Iliyas malik]

Dear all,

  I can not help you regarding these methodology type issue. But i am available to help you people at circuit level particularly analog circuits. 

reagards:

iliyas

On Thu, Feb 8, 2018 at 3:48 PM, deep shekhar <d.she...@gmail.com> wrote:

Hi all,

This is Deep Shekhar from NIT Jalandhar.

Has anyone completed the design for tapeout using SCL 180nm Analog IO pads. I am not able to understand exactly which pads are to be chosen for 1.8V VDD.

If anyone has completed, it is requested that kindly give the proper steps so that we could proceed further. we are stuck at this point.

Thanks and Regards

Deep Shekhar

Project Faculty (SMDP-C2SD)

Department of Electronics & Communication Engineering
Dr B R Ambedkar National Institute of Technology (NITJ)
Jalandhar - 144 011 (Pb)
+91-9463523312

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With regards
Mohd Iliyas
Mo. No. 09465829393

[Vishal Sharma]

pc3d01 analog input

pc3o01 analog output

Pvdi       core vdd

Pv0i     core VSS

Pvda    pad VDD

Pv0a    pad VSS

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