Jobs@Synopsys :Critical Requirements. Employee Referrals/ Internal Applications Invited

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Udaya Sankar V

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Oct 24, 2013, 1:31:30 AM10/24/13
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Dear All,

Those who are eligible please kindly contact my friend Vasanth.. and put in subject my name as reference and cc ur profile to me. so i will try to help. I am considering only for IISc students and IISc allumni for this reference.

my friend mail id is : Vasantha Kumar Mahadevan <Vasanthakum...@synopsys.com>

regards,
Uday

Synopsys Employee Referral Program

Make a difference!
Dear Colleagues,

Employee Referrals are now our No 1 source of hire at Synopsys in India. We would like to take this opportunity to thank you all for participating in the success of this program. We are actively recruiting throughout India so look out for our ongoing communication containing a selection of our India jobs.

We welcome references of talent with good values and technical capabilities; someone whom you have either worked previously with or know personally or received good feedback. The organization believes in building an inclusive culture and employee referrals are considered to be most important channel of recruitment.

Please share following current openings in your Professional / Social network such as LinkedIn, Facebook, Twitter, Former colleagues. Help us get the word out there that Synopsys is a great place to work!
 
Synopsys is, also, committed to providing internal employees with an environment in which they can thrive. One of the paths to success here is to invest in developing your skills and seek out career opportunities internally which will stretch and develop your background and experience. We encourage you to actively seek out new opportunities. Stay @ Synopsys and Thrive!   
By submitting your resume to an open requisition, your resume may be viewed by members of the hiring team. Synopsys values employee confidentiality and is committed to keeping your interest in the position confidential. Please read the internal transfer policy for more details.
As referrals play such an important part of our hiring strategy we will be running some additional promotions from time to time. Referral bonuses are paid in every country and some jobs pay double bonus "Hot Job" so look out for these opportunities.
For any referral queries please contact the India staffing team:
Sarni Tataverty - Hyderabad
Ratnesh Kumar - NCR
Vishal Kamboj Bangalore
Anjali Mandanna
- Mumbai

Act now to submit an Employee Referral:
Description: Hot Job!Description: Description: referral4
               Hot Jobs (Double ERP Bonus of $1500 USD)
What is a referral?
An eligible referral is a friend, relative or professional acquaintance known to an employee, whose qualifications potentially match the requirements for a Synopsys job opening in any location. Referrals are always subject to the rules of the scheme.
What's in it for you?
For every eligible referral hired, the eligible referring employee will receive a bonus. Jobs which are designated "Hot Job" will pay a double bonus.
How to submit a referral?
In order to be bonus eligible Synopsys employees must submit a resume using the Employee Referral Gateway.
 
Featured Jobs -  Synopsys NCR Bangalore Hyderabad
 
Description: Hot Job!Job ID & Title: 3252BR, Memory Circuit Design Engineer, Sr. II.
Location: - Noida
Keywords: SRAM, ROM, Memory compiler, memory circuit design, CMOS, DRC, LVS, Parasitic extraction, Bit Cell Analysis, Architecture Design, Characterization, FINFET
Location: - Noida
Keywords: Experience in scripting (Perl/Python/Tcl), Linux shell scripting, Experience in Test Automation, debugging, regression testing C/C++, computer architecture, Understanding of Processors from ARM / Tensilica / IBM, or Peripheral model internals or Interconnects like AXI / AHB, Embedded software
Job ID & Title: 5750BR, R&D Engineer, Sr. I
Location: - Bangalore
Keywords: C/C++, Data Structure, Algorithms, High Level Synthesis.
 
Job ID & Title: 5350BR, R&D Engineer, Staff
Location: - Bangalore
Keywords: C/C++, Data Structure, Algorithms, FPGA  Synthesis, Timing constrains, Static Timing Analysis, TCL.
Description: Hot Job!Job ID & Title: 5113BR, ASIC/Layout Design Engr, Sr II
Location :- Hyderabad
Keywords : Memory full custom layout design , Physical Design methodologies / Phases , CMOS , Fabrication Methodology
 
 
 

Job ID & Title: 5682BR, 5114BR & 5719BR Memory Circuit Design Engineer, Sr. I, Sr. II, Manager R&D.
Location: - Noida
Keywords: SRAM, ROM, Memory compiler, memory circuit design, CMOS, DRC/LVS, Parasitic extraction, Bit Cell Analysis, Architecture Design, Characterization, FINFET
Location: - Noida
Keywords:
C/C++, Knowledge of Hardware and Software Interfacing, Knowledge of SystemC & TLM, Embedded Software, Understanding of Processors from ARM/Tensilica / IBM/Peripheral model internals/ Interconnects like AXI/ AHB
Job ID & Title: 4043BR, CAE Sr. I
Location: - Bangalore
Keywords: wide range of IP, from AMBA AHB/AXI components to peripheral components, i.e. I2C, SPI, UART, timers
5years. Understanding of system design and logic design using an HDL language, synthesis, simulation and verification EDA tools is important. Occasional travel will be required.
 
Description: Hot Job!Job ID & Title: 4973BR, Mgr I R&D
Location :- Hyderabad
Keywords:-Analog and mixed signal Layout, CMOS circuits, high speed logic paths, layout techniques (ESD, Latchups). Managing and growing team exp

Job ID & Title: 5699BR & 5700BR, Memory Circuit Design Engineer, II
Location: - Noida
Keywords: SRAM, ROM, Memory compiler, memory circuit design, CMOS, DRC, LVS, Parasitic extraction, Bit Cell Analysis, Architecture Design, Characterization, FINFET
Location: - Noida
Keywords: Exp in automotive domain, Exp in tools like Simulink/CANoe, Automotive applications-Powertrain, Chassis, Infotainment, ADAS etc. SoC peripheral modeling usingC/C++ /SystemC/ HDL, C/C++/SystemC, Bus protocols AMBA-AXI, OCP, NoC, Instruction & cycle-accurate ISS models
Job ID & Title: 5324BR, CAE, Staff
Location: - Bangalore
Keywords: FPGA based prototyping/emulation of complex SoCs. Good understanding of the issues involved in ASIC to FPGA RTL. FPGA architectures such as Xilinx Virtex 7/Altera Stratix V. Knowledge of ARM buses, display controller/interface, protocols MIPI, HDMI, USB, PCIe, SATA.
Description: Hot Job!Job ID & Title:  4960BR , Mgr I R&D
Location  :- Hyderabad
Keywords :- Prior experience in managing/leading and growing a team , RTL Coding , Verification , System Verilog , OVM Methodology , Protocol knowledge like : PCIe/USB/SATA
 

Description: Hot Job!Job ID & Title: 2385BR, Full Custom Memory Layout Design Engineer, Sr. II.
Location: - Noida
Keywords: experience in Full/semi-custom memory layout design, Physical Design methodologies, Floor Planning, Place & Route, Physical Verification, Signal Integrity, DRC, LVS, CMOS, Fabrication Methodology
Job ID & Title: 4753BR, Processor Architecture Design Engineer, Sr. II
Location: - Noida
Keywords: ISA (Processor Instruction Set Architecture), ADL (Architecture Description Language), C/C++,  SystemC, Pipelining, Caching, Instruction Level Parallelism, ISS modeling, VLIW, SIMD, Unix
Job ID & Title: 5849BR, R&D Engineer
Location: - Bangalore
Keywords: Physical Design, ICC, ICV/Hercules. setting up and perform chip level tasks for place & route, static timing analysis using Prime Time, physical verification, layout editing, power analysis and RC extraction.
Description: Hot Job!Job ID & Title: 4910BR , Mgr I , R&D
Location :- Hyderabad
Keywords :- Prior experience in managing/leading and growing a team , RTL Coding , Verification , System Verilog / OVM, Protocol knowledge like: PCIe/ USB/ SATA

Job ID & Title: 5630BR, 5744BR, 4834BR & 4835BR, Full Custom Memory Layout Design Engineer II, Sr. II
Location: - Noida
Keywords: experience in Full/semi-custom memory layout design, Physical Design methodologies, Floor Planning, Place & Route, Physical Verification, Signal Integrity, , DRC, LVS, CMOS, Fabrication Methodology
Job ID & Title: 4404BR, 4856BR & 5610BR, Verification IP Development Engineer, Sr. II
Location: - Delhi/Noida
Keywords: Verilog, System Verilog, OVM/UVM/VMM, Protocol knowledge (AMBA/AHB/AXI/USB/PCIe/Ethernet /SATA/MIPI/HDMI), Emulation, Zebu/Palladium platforms, Synthesizable VIPs, Transactor (Xactors), DDR SDRAM
Job ID & Title: 4660BR, Field Apps Engineer (DDR SDRAM)
Location: - Bangalore
Keywords: DDR3, DDR4, LPDDR2 or LPDDR3 SystemVerilog TestBench, or high level verification methodologies e.g. UVM, VMM or OVM, Synthesis & Timing
Job ID & Title: 5088 BR , R&D Engineer, Sr I
Location :- Hyderabad
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Description: Hot Job!Job ID & Title: 2013BR,  R&D Engineer, Sr. II,
Location: - Noida
Keywords: VHDL RTL model, Verilog Behavioral model, Liberty Timing model, Verilog Techbench, DFT views like Tetramax & Fastscan, Ekos Emulation model, TCL/Shell/Perl, understanding of EDA views and flows.
Job ID & Title: 5626BR, EDA Tool Development Engineer, Staff
Location: - Noida
Keywords: C/C++, Data Structure, Algorithm, Unix/Linux,
computation geometry algorithms. (Exp in implementation /design of applications in one or more domains: - Floor planning, Constraints driven flow, Custom placement, Custom routing / Layout migration)
Job ID & Title: 5269BR, Physical Design Specialist (Apps Consultant)
Location: - Bangalore
Keywords: Physical Design. ICC Experience, Place & Route.
Job ID & Title: 5697 / 5698 BR / 5701/5702/5703/5704 BR , R&D Engineer, Sr II / R&D Engineer II
Location :- Hyderabad
Keywords: SRAM, ROM, Memory compiler, memory circuit design, CMOS, DRC, LVS, Parasitic extraction, Bit Cell Analysis, Architecture, Characterization, FINFET

Job ID & Title: 5510BR,  CAD Engineer
Location: - Noida
Keywords: Good knowledge of UNIX, Familiar with EDA tools and flows, knowledge of PDK development/verification/circuit simulation, knowledge of scripting languages like Perl/Tcl/Shell.
Job ID & Title: Multiple reqs (R&D Engineer, Sr.I, Sr. II, Staff, Sr. Staff) for Emulation
Location: - Noida / Bangalore
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Job ID & Title: 4706BR, Verification Specialist (Apps Consultant)
Location: - Bangalore
Keywords: System Verilog, OVM/UVM, Protocols: PCIe/AMBA AXI etc.
Job ID & Title: 5461 BR , Application Engineer Sr I
Location :- Hyderabad
Keywords :- Design Compiler , Prime time , Formality

Job ID & Title: 5153BR, Sr. Program Manager
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Keywords: Understanding of semiconductor design flow
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Job ID & Title: 5745BR, Field Apps Engineer (Logic Library)
Location: - Bangalore
Keywords: Physical Design, Place and Route, Timing signoff,  Synthesis, Extraction, and LVS/DRC.
Job ID & Title: 5018BR, Design Consultant (Physical Design)
Location: - Bangalore
ASIC designs at chip level and block level Debugging skills. Proficient in HVL (System Verilog) and Methodology (UVM preferred). OOPs concepts, Verilog, Scripting skills. Experience in at least 2 protocols - AMBA, PCIe, USB, MIPI, Ethernet – will be a plus..
Job ID & Title: 4786 BR , CAE Sr I
Location :- Hyderabad
Keywords PDK and overall design flow , knowledge of scripting languages like Python, Tcl or other EDA extension languages
 
Senior Physical Design Specialists
7-9 years. 3 positions.
Location: South Korea
Place n Route, CTS, Good ICC Experience.
Design experience of 22nm/28nm
 
Job ID & Title: 5496BR, R&D Engineer I
Location: - Mumbai
Keywords: Test Planning, Test Specification dev, documentation & execution of tests in compliance with IEEE standards, Automated testing tools
Scripting expertise in VB or Perl, Testing of database & backend components, QA Partner, Rational Test Studio, Implementation of SQA techniques
 
 
 













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You will become God, When you see happiness in another person eyes - Uday.

Udaya Sankar. V,Chairperson, IEEE-IISc Student Branch
Research Scholar, Performance Analysis Lab (PAL Lab), ECE dept, Indian Institute of Science, Bangalore - 560012.


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