Unlikely "sighting" of an 1130

43 views
Skip to first unread message

Bob Flanders

unread,
Jun 25, 2019, 8:46:40 PM6/25/19
to IBM1130
Ok ... so this was a surprise. I was watching a video about the new Ryzen CPUs when the presenter brought up a chart.... 


Time: 13:07

Screen Shot 2019-06-25 at 8.46.11 PM.png


Paul Anagnostopoulos

unread,
Jun 26, 2019, 4:58:12 PM6/26/19
to IBM1130
I presume people know about this table? I don't know how accurate it is.



~~ Paul

Bob Flanders

unread,
Jun 26, 2019, 5:05:37 PM6/26/19
to ibm...@googlegroups.com
Paul,


Thank you. Very cool.

Bob
> --
> You received this message because you are subscribed to the Google Groups "IBM1130" group.
> To unsubscribe from this group and stop receiving emails from it, send an email to ibm1130+u...@googlegroups.com.
> To view this discussion on the web visit https://groups.google.com/d/msgid/ibm1130/4a2205e1-e82c-4409-a102-7b0f00fa652c%40googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

Eddy Quicksall

unread,
Jun 26, 2019, 5:11:58 PM6/26/19
to ibm...@googlegroups.com
Wow, look at the 1130 and we thought that was fast. I once used some Univac computer and I think it was the 1108 but I don't see it there. I wrote an emulator for their synchronous communications RJE terminal which ran on the IBM 1130 ... maybe that terminal was the 1108.

Eddy
To view this discussion on the web visit https://groups.google.com/d/msgid/ibm1130/CA%2BcnuoYav1unLLU6WDL%3DHdpW_PFsk30BMukSxauADoAiNN7%2BRg%40mail.gmail.com.
For more options, visit https://groups.google.com/d/optout.


---
This email has been checked for viruses by Avast antivirus software.
https://www.avast.com/antivirus

Paul Anagnostopoulos

unread,
Jun 27, 2019, 10:21:12 AM6/27/19
to IBM1130
Now that I look at that table more carefully, the MIPS value for the 1130 is clearly wrong. A MIPS rating of .0000302 would be about 30 instructions per second. I wonder how he normalized the ratings? The IBM S/360 model 65 looks about right, as does the canonical VAX-11/780.

So, can we calculate a reasonable MIPS rating for a 2.2 us 1130? What was the average number of cycles per instruction? Around 2?

~~ Paul

richard...@comcast.net

unread,
Jun 27, 2019, 3:44:52 PM6/27/19
to ibm...@googlegroups.com

Instruction timing is given in the Functional Characteristics Manual.  There are two tables, one for 3.6 us core and one for 2.2 us.  The fastest instructions took 2 cycles.  A LOAD instruction would vary between 4.6 and 6.8 us depending on the tag bits, the difference being one more memory cycle for indirect or indexed.  An ADD instruction is ugly and in the short form would vary between 4.9 and 7.9 us while the long form would vary between 7.1 and 10.1 us.  Why the variation?  Well, the 1130 CPU adder didn’t deal with carry-in to each bit position.  Instead it registered the carries and repeatedly added until the carries were gone.  So, a variable number of clocks per ADD.

 

The worst case is DIVIDE where the short form varies between 46.4 and 92.1 us while the long form varies between 48.6 and 94.4 us.

 

Assigning a MIPS to this processor is going to be difficult.  It’s going to depend on the instruction mix and the number of carries during ADD/SUB.

 

So, call it 6 us per instruction or 0.167 MIPS but if somebody said it was half that, I wouldn’t argue.  And that’s for the 2.2 us core.  It’s about 0.111 MIPS for the 3.6 us core.  Or half that…

 

From: ibm...@googlegroups.com <ibm...@googlegroups.com> On Behalf Of Paul Anagnostopoulos
Sent: Thursday, June 27, 2019 7:21 AM
To: IBM1130 <ibm...@googlegroups.com>
Subject: Re: [IBM1130] Re: Unlikely "sighting" of an 1130

 

Now that I look at that table more carefully, the MIPS value for the 1130 is clearly wrong. A MIPS rating of .0000302 would be about 30 instructions per second. I wonder how he normalized the ratings? The IBM S/360 model 65 looks about right, as does the canonical VAX-11/780.

 

So, can we calculate a reasonable MIPS rating for a 2.2 us 1130? What was the average number of cycles per instruction? Around 2?

 

~~ Paul

 

--

You received this message because you are subscribed to the Google Groups "IBM1130" group.
To unsubscribe from this group and stop receiving emails from it, send an email to ibm1130+u...@googlegroups.com.

Paul Anagnostopoulos

unread,
Jun 28, 2019, 7:23:35 AM6/28/19
to IBM1130


On Thursday, June 27, 2019 at 3:44:52 PM UTC-4, Richard Stofer wrote:

Instruction timing is given in the Functional Characteristics Manual.  There are two tables, one for 3.6 us core and one for 2.2 us.  The fastest instructions took 2 cycles.  A LOAD instruction would vary between 4.6 and 6.8 us depending on the tag bits, the difference being one more memory cycle for indirect or indexed.  An ADD instruction is ugly and in the short form would vary between 4.9 and 7.9 us while the long form would vary between 7.1 and 10.1 us.  Why the variation?  Well, the 1130 CPU adder didn’t deal with carry-in to each bit position.  Instead it registered the carries and repeatedly added until the carries were gone.  So, a variable number of clocks per ADD.

 

The worst case is DIVIDE where the short form varies between 46.4 and 92.1 us while the long form varies between 48.6 and 94.4 us.

 

Assigning a MIPS to this processor is going to be difficult.  It’s going to depend on the instruction mix and the number of carries during ADD/SUB.

 

So, call it 6 us per instruction or 0.167 MIPS but if somebody said it was half that, I wouldn’t argue.  And that’s for the 2.2 us core.  It’s about 0.111 MIPS for the 3.6 us core.  Or half that…


Did I say around 2 cycles on average? I must have been thinking about program composed mostly of LDS and BSC instructions!

~~ Paul

 

Eddy Quicksall

unread,
Jun 28, 2019, 8:55:56 AM6/28/19
to ibm...@googlegroups.com

This makes me think of the Meta-4 which emulated the 1130. As was explained to me on the Meta-4 they didn’t use a clock, they used timing loops and timed them so all the signals arrived at the gate at the same time. The Meta-4 was a good bit faster than the 1130.

 

Eddy

 

From: ibm...@googlegroups.com [mailto:ibm...@googlegroups.com] On Behalf Of Paul Anagnostopoulos
Sent: Friday, June 28, 2019 7:24 AM
To: IBM1130
Subject: Re: [IBM1130] Re: Unlikely "sighting" of an 1130

 

--

You received this message because you are subscribed to the Google Groups "IBM1130" group.
To unsubscribe from this group and stop receiving emails from it, send an email to ibm1130+u...@googlegroups.com.


For more options, visit https://groups.google.com/d/optout.


Virus-free. www.avast.com

Paul Anagnostopoulos

unread,
Jun 29, 2019, 7:10:53 AM6/29/19
to IBM1130

On Friday, June 28, 2019 at 8:55:56 AM UTC-4, Eddy Quicksall wrote:

This makes me think of the Meta-4 which emulated the 1130. As was explained to me on the Meta-4 they didn’t use a clock, they used timing loops and timed them so all the signals arrived at the gate at the same time. The Meta-4 was a good bit faster than the 1130.




When I was at Brown we had two Meta 4s. We built a graphics system with them and a home-built vector processor, the Simale. We spent countless hours microprogramming the machines, debugging the microcode on the 1130-based emulator, and peeling the capacitance-read ROM boards. I've attached a photo of a ROM module.

The Meta 4 had an 85 ns cycle time. I don't recall the timing loop design. Here is the reference manual:


~~ Paul

Meta-4A-rom-board.jpg

richard...@comcast.net

unread,
Jun 29, 2019, 11:13:46 AM6/29/19
to ibm...@googlegroups.com

There’s a certain symmetry in using an 1130 to debug the microcode of the Meta 4 emulating an 1130.

 

Path delay is a lot shorter with modern CPUs but it’s still a speed limiter.  I remember where the CDC 6400 had clock signal delays timed by wire length to guarantee setup times as signals moved from bay to bay.  It was a really big deal!  But it definitely used clocks.

 

An asynchronous design must be really difficult.

 

In my FPGA projects, the timing report shows that path delay often exceeds logic delay.

 

 

From: ibm...@googlegroups.com <ibm...@googlegroups.com> On Behalf Of Paul Anagnostopoulos
Sent: Saturday, June 29, 2019 4:11 AM
To: IBM1130 <ibm...@googlegroups.com>
Subject: Re: [IBM1130] Re: Unlikely "sighting" of an 1130

 

--

You received this message because you are subscribed to the Google Groups "IBM1130" group.
To unsubscribe from this group and stop receiving emails from it, send an email to ibm1130+u...@googlegroups.com.

Eddy Quicksall

unread,
Jun 29, 2019, 3:08:47 PM6/29/19
to ibm...@googlegroups.com

A friend of mine wrote an upgrade of DSC’s 1130 emulation. To debug it he wrote an emulation of the Meta-4 machine on the 1130 to run his emulator which itself ran as an IBM 1130 running DM2. It ran so slow that it took a few seconds for the typewrite to echo they character as you typed. I have a customer that still runs his data processing business using my GA1830 emulation (a cross between the 1800 and 1130). I have not tested lately but when I wrote it around 1990 it ran a hundred or so faster than the 1130. I wonder how fast it is now.

 

Eddy


For more options, visit https://groups.google.com/d/optout.


Virus-free. www.avast.com

Eddy Quicksall

unread,
Jun 29, 2019, 3:45:28 PM6/29/19
to ibm...@googlegroups.com

That’s cool. I still have one up in the attic along with a memory board. Did Brown ever get DNA’s TSO system (a timesharing system for the IBM 1130/Meta-4/GA1830/CHI2130))? That is what my customer is running.

 

Eddy

 

From: ibm...@googlegroups.com [mailto:ibm...@googlegroups.com] On Behalf Of Paul Anagnostopoulos
Sent: Saturday, June 29, 2019 7:11 AM
To: IBM1130
Subject: Re: [IBM1130] Re: Unlikely "sighting" of an 1130

 

--

You received this message because you are subscribed to the Google Groups "IBM1130" group.
To unsubscribe from this group and stop receiving emails from it, send an email to ibm1130+u...@googlegroups.com.


For more options, visit https://groups.google.com/d/optout.


Virus-free. www.avast.com
Reply all
Reply to author
Forward
0 new messages