[RFC PATCH v2 1/5] rust/hw/core: Add the BusState of rust version

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chenmiao

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Oct 28, 2025, 4:03:55 AMOct 28
to chao...@openatom.club, luo...@openatom.club, dz...@openatom.club, plu...@openatom.club, hust-os-ker...@googlegroups.com
A Rust version implementation has been designed for BusState,
which will be used for the subsequent I2CBus implementation.

Signed-off-by: chenmiao <chen...@openatom.club>

---
Changes in V2:
- Rename the BusMethods and add some Safety comment.

---
rust/hw/core/meson.build | 1 +
rust/hw/core/src/bus.rs | 55 ++++++++++++++++++++++++++++++++++++++++
rust/hw/core/src/lib.rs | 3 +++
3 files changed, 59 insertions(+)
create mode 100644 rust/hw/core/src/bus.rs

diff --git a/rust/hw/core/meson.build b/rust/hw/core/meson.build
index 1560dd20c6..efcda50fef 100644
--- a/rust/hw/core/meson.build
+++ b/rust/hw/core/meson.build
@@ -50,6 +50,7 @@ _hwcore_rs = static_library(
[
'src/lib.rs',
'src/bindings.rs',
+ 'src/bus.rs',
'src/irq.rs',
'src/qdev.rs',
'src/sysbus.rs',
diff --git a/rust/hw/core/src/bus.rs b/rust/hw/core/src/bus.rs
new file mode 100644
index 0000000000..d7a0f55725
--- /dev/null
+++ b/rust/hw/core/src/bus.rs
@@ -0,0 +1,55 @@
+// Copyright 2025 HUST OpenAtom Open Source Club.
+// Author(s): Chen Miao <chen...@openatom.club>
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+use std::{ffi::CStr, ptr::addr_of_mut};
+
+pub use bindings::BusClass;
+use common::Opaque;
+use qom::{qom_isa, IsA, Object, ObjectCast, ObjectDeref, ObjectType};
+
+use crate::{bindings, DeviceImpl};
+
+#[repr(transparent)]
+#[derive(Debug, common::Wrapper)]
+pub struct BusState(Opaque<bindings::BusState>);
+
+unsafe impl Send for BusState {}
+unsafe impl Sync for BusState {}
+
+unsafe impl ObjectType for BusState {
+ type Class = BusClass;
+ const TYPE_NAME: &'static std::ffi::CStr =
+ unsafe { CStr::from_bytes_with_nul_unchecked(bindings::TYPE_BUS) };
+}
+
+qom_isa!(BusState: Object);
+
+pub trait BusStateImpl: DeviceImpl + IsA<BusState> {}
+
+impl BusClass {
+ pub fn class_init<T: BusStateImpl>(self: &mut BusClass) {
+ self.parent_class.class_init::<T>();
+ }
+}
+
+pub trait BusMethods: ObjectDeref
+where
+ Self::Target: IsA<BusState>,
+{
+ /// # Safety
+ ///
+ /// This function call the `bindings:qbus_realize`, we can expect the FFI
+ /// user of this function valid.
+ fn realize(&self) {
+ assert!(bql::is_locked());
+ unsafe {
+ bindings::qbus_realize(
+ self.upcast().as_mut_ptr(),
+ addr_of_mut!(util::bindings::error_fatal),
+ );
+ }
+ }
+}
+
+impl<R: ObjectDeref> BusMethods for R where R::Target: IsA<BusState> {}
diff --git a/rust/hw/core/src/lib.rs b/rust/hw/core/src/lib.rs
index b40801eb84..10cc516664 100644
--- a/rust/hw/core/src/lib.rs
+++ b/rust/hw/core/src/lib.rs
@@ -13,3 +13,6 @@

mod sysbus;
pub use sysbus::*;
+
+mod bus;
+pub use bus::*;
--
2.43.0

Chao Liu

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Oct 28, 2025, 4:08:25 AMOct 28
to chenmiao, luo...@openatom.club, dz...@openatom.club, plu...@openatom.club, hust-os-ker...@googlegroups.com
On 10/28/2025 4:03 PM, chenmiao wrote:
> A Rust version implementation has been designed for BusState,
> which will be used for the subsequent I2CBus implementation.
>
Signed-off-by: Chao Liu <chao...@openatom.club>> Signed-off-by: chenmiao

chenmiao

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Oct 28, 2025, 4:18:02 AMOct 28
to chao...@openatom.club, luo...@openatom.club, dz...@openatom.club, plu...@openatom.club, hust-os-ker...@googlegroups.com, Chao Liu
A Rust version implementation has been designed for BusState,
which will be used for the subsequent I2CBus implementation.

Signed-off-by: chenmiao <chen...@openatom.club>
Signed-off-by: Chao Liu <chao...@openatom.club>
--
2.43.0

Chao Liu

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Oct 28, 2025, 5:03:33 AMOct 28
to chenmiao, luo...@openatom.club, dz...@openatom.club, plu...@openatom.club, hust-os-ker...@googlegroups.com
I'm not quite sure if we need to expose this interface to Rust, as it is called
in the C part.

hw/core/qdev.c
static void device_set_realized(Object *obj, bool value, Error **errp)
{
[...]

QLIST_FOREACH(bus, &dev->child_bus, sibling) {
if (!qbus_realize(bus, errp)) { // there
goto child_realize_fail;
}
}
[...]
}
static void device_class_init(ObjectClass *class, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(class);
[...]
object_class_property_add_bool(class, "realized",
device_get_realized, device_set_realized);
[...]
}

static const TypeInfo device_type_info = {
.name = TYPE_DEVICE,
.parent = TYPE_OBJECT,
[...]
.class_init = device_class_init,
.abstract = true,
.class_size = sizeof(DeviceClass),
[...]
};

> +
> +impl<R: ObjectDeref> BusMethods for R where R::Target: IsA<BusState> {}
> diff --git a/rust/hw/core/src/lib.rs b/rust/hw/core/src/lib.rs
> index b40801eb84..10cc516664 100644
> --- a/rust/hw/core/src/lib.rs
> +++ b/rust/hw/core/src/lib.rs
> @@ -13,3 +13,6 @@
>
> mod sysbus;
> pub use sysbus::*;
> +
> +mod bus;
> +pub use bus::*;

Thanks,
Chao

Chen Miao

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Oct 28, 2025, 5:16:23 AMOct 28
to Chao Liu, luo...@openatom.club, dz...@openatom.club, plu...@openatom.club, hust-os-ker...@googlegroups.com
So, I think if we want to implement all functions of bus, we need refer to the
bus.c and qdev.rs/DeviceClass.

And, you're right, the realize function is useless here, I'm not sure. We need
discuss.

static const TypeInfo bus_info = {
    .name = TYPE_BUS,
    .parent = TYPE_OBJECT,
    .instance_size = sizeof(BusState),
    .abstract = true,
    .class_size = sizeof(BusClass),
    .instance_init = qbus_initfn,
    .instance_finalize = qbus_finalize,
    .class_init = bus_class_init,
    .interfaces = (const InterfaceInfo[]) {
        { TYPE_RESETTABLE_INTERFACE },
        { }
    },

chenmiao

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Oct 28, 2025, 6:18:44 AMOct 28
to zhao...@intel.com, pbon...@redhat.com, manos.pit...@linaro.org, richard....@linaro.org, phi...@linaro.org, chao...@openatom.club, qemu...@nongnu.org, qemu-...@nongnu.org, hust-os-ker...@googlegroups.com
A Rust version implementation has been designed for BusState,
which will be used for the subsequent I2CBus implementation.

Signed-off-by: chenmiao <chen...@openatom.club>
Signed-off-by: Chao Liu <chao...@openatom.club>

---
Changes in V2:
- Rename the BusMethods and add some Safety comment.
- Remove the unnecessary realize function.

---
rust/hw/core/meson.build | 1 +
rust/hw/core/src/bus.rs | 44 ++++++++++++++++++++++++++++++++++++++++
rust/hw/core/src/lib.rs | 3 +++
3 files changed, 48 insertions(+)
create mode 100644 rust/hw/core/src/bus.rs

diff --git a/rust/hw/core/meson.build b/rust/hw/core/meson.build
index 1560dd20c6..efcda50fef 100644
--- a/rust/hw/core/meson.build
+++ b/rust/hw/core/meson.build
@@ -50,6 +50,7 @@ _hwcore_rs = static_library(
[
'src/lib.rs',
'src/bindings.rs',
+ 'src/bus.rs',
'src/irq.rs',
'src/qdev.rs',
'src/sysbus.rs',
diff --git a/rust/hw/core/src/bus.rs b/rust/hw/core/src/bus.rs
new file mode 100644
index 0000000000..d3fbf519d4
--- /dev/null
+++ b/rust/hw/core/src/bus.rs
@@ -0,0 +1,44 @@
+// Copyright 2025 HUST OpenAtom Open Source Club.
+// Author(s): Chen Miao <chen...@openatom.club>
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+use std::ffi::CStr;
+
+pub use bindings::BusClass;
+use common::Opaque;
+use qom::{qom_isa, IsA, Object, ObjectDeref, ObjectType};
+ // TODO: Since the bus does not currently provide services to other
+ // components, we have not implemented any functions yet.
+}
+
+impl<R: ObjectDeref> BusMethods for R where R::Target: IsA<BusState> {}
diff --git a/rust/hw/core/src/lib.rs b/rust/hw/core/src/lib.rs
index b40801eb84..10cc516664 100644
--- a/rust/hw/core/src/lib.rs
+++ b/rust/hw/core/src/lib.rs
@@ -13,3 +13,6 @@

mod sysbus;
pub use sysbus::*;
+
+mod bus;
+pub use bus::*;
--
2.43.0
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