Dear Steve, dear all
I have tested several gateware images, namely
818b1f9b8d49dfc8dee96ce9ba85f65f ./bitfiles/stable/20210730_73p2/hl2b5up_main/hl2b5up_main.rbf
fee738911b93869c26e69b5914f1c218 ./bitfiles/testing/20220109_73p3/hl2b5up_main/hl2b5up_main.rbf
339f7b9b9b3ea677c9fb27720c236ee2 ./bitfiles/testing/20231208_74p1_a0bcd34/hl2b5up_main/hl2b5up_main.rbf
each line starts with a MD5 checksum, and then the name of the file
as it can be found in the repository
https://github.com/softerhardware/Hermes-Lite2
(so now it should be crystal clear which firmware I took).
The problem is absolutely the same with all three firmwares,
and since there were questions, I repeat the setup. I have
tested it with piHPSDR but got reports that Thetis
behaves the same way.
Setup: mode = USB, 20m band
when *no microphone source* is selected the HL2 shows the following
behaviour: periodically connecting/disconecting the tip and the
sleeve of the Key/PTT jack emits a periodic CW signal. This is
more or less OK.
when a microphone source is selected, then the HL2 starts to emit
a CW signal upon first connect of tip/sleeve and then stays in
transmit if you disconnect. This is clearly not what it should do.
I digged into this, and the "never ending" CW signal transmission
comes from the noise floor of the microphone, which induces a
noise floor in the the transmitted IQ signal, so very often
bit0 of the I samples will be set.
So my impression is that, as soon as the HL2 "goes CW" when
connecting tip/sleeve, it starts to interpret bit0 of I as
a CWX signal although the CWX bit is not set.
This conjecture is supported by the following crucial experiment:
with a modified version of piHPSDR where bit0 of the I samples is
always zeroed the "stay in CW" problem does not occur.
I think the gateway gurus should look at the FPGA code.
Yours,
Christoph
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