EER support?

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Brian Machesney

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Oct 25, 2018, 5:49:10 PM10/25/18
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I respect and admire all the work done by the long line of SDR aficionados associated with Hermes-Lite. I would like to use Hermes-Lite to produce the phase- and amplitude-drive signals for a switchmode transmitter. I have a proof-of-concept prototype using an off-the-shelf QDUC that demonstrates 500W output from 160 - 10m at about 1/2 the bill-of-materials cost of a current-generation 500W linear PA.

Can someone suggest how I could get started, or should I reach out to a different group?

Thanks -- Brian K1LI

Steve Haynal

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Oct 25, 2018, 10:23:39 PM10/25/18
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Hi Brian,

We'll need more details about what you are doing before we can tell you if the Hermes-Lite is a good fit. For example, how do you envision connecting to a SDR, exactly what to the phase and amplitude signals look like, is frequency constant, etc.

73,

Steve
kf7o

Brian Machesney

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Oct 26, 2018, 10:31:08 AM10/26/18
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Steve,

Since my initial post, I have learned that Hermes and PowerSDR support EER. As that looks like the path of least resistance, I will pursue it for the time being.

FYI, I am seeking guidance on how to implement my next prototype; i.e., how should I construct my hardware interface to work with an existing SDR platform like Hermes-Lite. For example, since Hermes-Lite can produce an SSB signal, a software change should allow it to produce the constant-amplitude phase drive for an EER power stage, but an additional PWM or PDM signal would still be required to create properly-timed amplitude modulation.

There are numerous other means to produce both the phase- and amplitude signals, which is the subject I want to discuss on the way to my next prototype. I will re-open this discussion if the Hermes route does not pan out.

Brian

Steve Haynal

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Oct 26, 2018, 11:55:33 AM10/26/18
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Hi Brian,

I found this post with the details I needed. I don't know much about EER. http://lists.openhpsdr.org/pipermail/hpsdr-openhpsdr.org/2014-June/045625.html

Hermes-Lite 2 works with PowerSDR, but the EER logic has been removed from the firmware. It would have to be added back. There is room in the FPGA for this. The generic IO pins could be used for the PWM and PDM.

Good luck with your project! It is very interesting stuff.

73,

Steve
kf7o

in3otd

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Oct 26, 2018, 3:24:43 PM10/26/18
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Hello,
I saw that also Manfred, XQ6FOD, is experimenting with EER on a Red Pitaya; there are a lot of details on his page about his experiments. His first EER amplifier, using a pair of RD16HHF1, delivered 12 W PEP without needing an heatsink. He is apparently planning to develop a much bigger EER PA using a MRF1K50N.

73 de Claudio, IN3OTD / DK1CG


On Friday, October 26, 2018 at 5:55:33 PM UTC+2, Steve Haynal wrote:
Hi Brian,

Brian Machesney

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Oct 26, 2018, 3:42:32 PM10/26/18
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Thanks, Steve. That is the path I'm following.

I assume that the "Lite" in Hermes-Lite equates to lower cost, which is *the* top priority of my work. I want people around the world, from all walks of life, to be able to enjoy the myriad benefits of our wonderful hobby. I hope that I will be able to bring what I learn to Hermes-Lite at some point.

-- Brian

Brian Machesney

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Oct 26, 2018, 3:43:16 PM10/26/18
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Many thanks for the pointer, Claudio. I will definitely check this out.

73 -- Brian K1LI

Steve Haynal

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Oct 27, 2018, 2:15:33 AM10/27/18
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Hi Group,

I found these lecture notes from a respected professor at my alma mater: https://www.ece.ucsb.edu/Faculty/rodwell/Classes/ece218c/notes/Lecture14_Envelope%20Tracking.pdf

Since we already have a switching power supply for the PA, the Hermes-Lite 2.0 should be a good candidate for ET, at least for the 5W (maybe more with ET) PA. Right now we set Vpa to a constant 8.0V. One could replace this voltage divider with a small control circuit which the FPGA uses to adjust Vpa to track the envelope. If my understanding is correct, this should be even easier for the constant envelope modes I like such as FT8 and WSPR. One could adjust Vpa to the bare minimum required for the constant signal, and then apply puresignal-like linearization.

I would love to see Quisk or other Linux software adopt the wdsp library to provide puresignal under Linux.  I think it is available on LInux via John Melton's software?

73,

Steve
kf7o

in3otd

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Oct 27, 2018, 3:05:24 AM10/27/18
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Hello,


Since we already have a switching power supply for the PA, the Hermes-Lite 2.0 should be a good candidate for ET
, at least for the 5W (maybe more with ET) PA. Right now we set Vpa to a constant 8.0V. One could replace this voltage divider with a small control circuit which the FPGA uses to adjust Vpa to track the envelope. If my understanding is correct, this should be even easier for the constant envelope modes I like such as FT8 and WSPR. One could adjust Vpa to the bare minimum required for the constant signal, and then apply puresignal-like linearization.

yep, I was thinking about something similar some time ago for the H-Lv3, hi. If you can bring out a PWM which follows the modulation envelope I can try to do some tests - the idea is to low-pass filter that, scale as needed and inject it into the regulator feedback node. As you said, it should be easy for constant envelope modes, it will just scale the DC supply level according to the required output power. For other modulations we need to check how the regulator behaves; the envelope signal bandwidth can be quite larger than the original signal bandwidth and the regulator output must be able to follow quickly enough.

f6itu

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Oct 27, 2018, 3:46:19 AM10/27/18
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Hi folks

 

A gremlin in google-group nuke my last post on EER/ET

In a few words: EER/ET is one of my wildest dream (wish I had a D class amplifier to play with it). Even if it seems to be relatively tricky to use it with high power SSPA.

Excepted XQ6FOD Manfred’s experiments, that everybody has apparently read, I would add two other useful info sources.

-          The first is a former paper published in QEX some time ago, a kind of “EER primers for dummies”. The title is definitely not obvious

http://www.arrl.org/files/file/QEX_Next_Issue/Mar-Apr2017/MBF.pdf

-          The second is the video taken during the last “SDR Academy 2018” in Friedrichshafen by DJ1MR

https://www.youtube.com/watch?v=A6ohr98ikeA

 

I think that the “integration” or embedding of an EER/ET feedback power circuit “into” the SDR itself  (H.L. 3.0 or whatever) would be a mistake. It would probably be smarter if such a module could be independent or tied to the amplifier/PSU unit. This way, the same power amp could be used with several other rigs (Red Pitaya, Hermes/Angelia boards, HiQSDR, Hermes Lite etc)… as long as it could be possible for the SDR to deliver the envelope control signal.

73’

Marc f6itu

PA3GSB

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Oct 27, 2018, 3:48:45 AM10/27/18
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Steve

You are right, pihpsdr is also capable of using puresignal because it uses wdsp.

For radioberry iam switching to full duplex and i am also looking for puresignal!

73 Johan
PA3GSB

Wolfgang DL9UFB

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Oct 27, 2018, 8:08:36 AM10/27/18
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Hello Steve, Marc and group,

I am also very interested in EER.
In my opinion it would be right and important compatible with Hermes and OpenHPSDR,
a PWM signal with 250kHz clock.
There are already developments (e.g. DJ1MR) for the Hermes board and OpenHPSDR,
via a optocouplers are provided PWM potential-free.
I think there's an amplifier in beta already.

In my opinion, Marc's proposal is a another construction site, I think RedPitaya does.
There the analog signal would have to be evaluated and a PWM signal can be generated.
I see timing problems there.

Hermes, Hermes-Lite provided a PWM-Signal more or less at the same time as the transmit signal.
Steve could access the existing code.
That's my unimportant opinion.

Sorry for my bad english.

73, Wolfgang DL9UFB

Marc OLANIE

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Oct 27, 2018, 12:48:18 PM10/27/18
to Wolfgang DL9UFB, Hermes-Lite

Hi Wolfgang et all

 

>In my opinion, Marc's proposal is a another construction site, I think RedPitaya does.

 

Well…. Not exactly. I was “generally speaking”, without any preference concerning a platform or another… And I totally agree with you. The more we stick to the HPSDR “standard”, the less we risk to create an exotic fork with all the maintenance, compatibility, adaptation and evolution problems you can imagine. I just mentioned Manfred’s work FYI.

 

My remark was only concerning the electronic part of the power supply control and synch. between the disciplined “voltage” and the amp (the part described by DJ1MR). Except for testing and understanding EER/ET, I don’t see any real advantage to drive a low voltage, low current 5 or 10W PA supply. That’s a complete different story (and a bigger advantage) when dealing with EER designed for a 500 W (or more) SSPA. Efficiency is not the same in term of power waste, and EER is after all a matter of efficiency.

 

But indeed, let’s just begin with a QRP version of such a system. I’ll try to find. I’ll try to find the original paper that Rüdiger wrote in Funkamateur last year (Hochleistungs-Linearendstufe mit Envelope-Tracking-Steuerung, May and June issue)

 

VY 73’ to all

Marc

 

 

 

 

De : herme...@googlegroups.com <herme...@googlegroups.com> De la part de Wolfgang DL9UFB
Envoyé : samedi 27 octobre 2018 14:09
À : Hermes-Lite <herme...@googlegroups.com>
Objet : Re: EER support?

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Steve Haynal

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Oct 27, 2018, 10:39:48 PM10/27/18
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Hi Claudio,

I do remember that very informative post from you.

I suspect one of the challenges with ET is the latency to set the power supply Vpa to match the envelope. From what I understand of what the Hermes currently does, they send the IQ packets twice but shifted in time so that the "early" packets can define the envelope in time to for the "late" packets to be sent to the actual high speed DAC and synchronized with the power supply envelope. Buffer space on the FPGA is at a premium and there may not be sufficient space to delay a single stream of IQ packets for both purposes on the FPGA.

I'm thinking of just trying linhpsdr which I believe has puresignal, enabling puresignal during FT8 TX, and see how low I can adjust Vpa with still reasonable output, and then see how much power savings there is.

As usual I am super busy. Work is requiring a lot my time. I leave for a business trip to San Diego tomorrow. I seem to only have time to dream and comment on this list... It would be great to see others make progress here.

73,

Steve
kf7o

f6itu

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Oct 28, 2018, 6:32:41 AM10/28/18
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Hi Wolfgang

I've found the two main articles writen by DJ1MR (Hochleistungs-Linearendstufe mit Envelope-Tracking-Steuerung) on the FunkAmateur Website, in the free download section 
But I couldn't find the amp and "steuerung" schematic
Do you know if a "part 3" has been published in another issue of FunkAmateur ? It would be a good starting point. 

I'll try to send Rüdi a short email

73'
Marc

 

K Jones

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Oct 28, 2018, 1:47:49 PM10/28/18
to Marc F6ITU, herme...@googlegroups.com
I sent a email request out to DJ1MR and he just sent back a treasure trove of information that we can glean through in such regards as follows: 

 Hi Kyle,

So I would like to support your intensions to get experiences in ET and EER technologies. I suggest you to start with Envelope Tracking principle and later go the EER switching RF amps way with modern GAN mosfets.

To get familiar with these technolgies it is necessary to have a good pulse width modulator. So I have published a very simple modulator in the German magazine called „Funkamateur“  in August 2018.

So I think you should read the attachments in the following order:

1.       Hermes Adapter board providing PWM signal
2.       EER menu in Power SDR Software
3.       PWM
4.       ET power amplifier
5.       EER switching amplifier based on Kahn technology and Kee, Aoki, Rutlege

Get your experiences in the same order.

I send you also the speech from the HAM in Friedrichshafen 2018. In a second e-mail I will send you the layouts and circuit diagrams and unfavorably partially BOMs. A part oft the articles I wrote is unfortunately in German language.

Note: Keep in mind, that for the PWM are existing two Layouts, one for the mosfet type C3M0065090D (three pins)  and one fort the type C3M0065100K (four pins)

Best regards and 73

Ruediger
DJ1MR

--

K Jones

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Oct 28, 2018, 1:49:08 PM10/28/18
to Marc F6ITU, herme...@googlegroups.com
DJ1MR - Attachment 1
7MHz-1-1KW-EF.PDF

K Jones

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Oct 28, 2018, 1:49:39 PM10/28/18
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DJ1MR - Attachment  2 
Hermes-Interface-EER-Menu.pdf

K Jones

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Oct 28, 2018, 1:50:09 PM10/28/18
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DJ1MR - Attachment  3 
PWM-DJ1MR-2018.pdf

K Jones

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Oct 28, 2018, 1:50:54 PM10/28/18
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DJ1MR - Attachment  4 
Vortrag-HAM-2018-DJ1MR-V3.pdf

K Jones

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Oct 28, 2018, 1:51:27 PM10/28/18
to Marc F6ITU, herme...@googlegroups.com
DJ1MR - Attachment  5 
VRF3933-ET-PA-18-11-2016 (Automatisch gespeichert).pdf

K Jones

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Oct 28, 2018, 2:02:38 PM10/28/18
to Marc F6ITU, herme...@googlegroups.com
This is the second email I just received from DJ1MR that has the BOM, design files, etc... as follows:

Hi Kyle,

in this e-mail I send you the PCB layouts and circuit diagrams. I’m using Sprint-Layout and S-Plan from Abacom. You can download viewer from the WEB.

Best regards

Ruediger
DJ1MR

Endstufe-14-07-2016.spl
PWM-circuit-diagram-four-pin.spl7
PWM-circuit-diagram-three-pin.spl
PWM-Layout-vier-Pin-Mosfets-V3.lay6
PWM-three-pin-Layout.lay6
PWM-Prinzipschaltbild.spl
Richtkoppler-Layout.lay
Sequenzer-PA-DJ1MR.spl
Treiber-05-11-2016.spl
Att-Sequ.lay
BOM-PWM.XLSX
Blockschaltbild PA-DJ1MR.spl
Endstufe-Balun-zweistufig.lay
PWM-Aufsteckplatine.spl
Endstufe-einstufig-einstufig.lay
Filter.lay
PTT-Gatespannungserzeugung-14-07-2016.spl

K Jones

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Oct 28, 2018, 8:30:10 PM10/28/18
to Marc F6ITU, herme...@googlegroups.com

K Jones

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Oct 28, 2018, 8:32:13 PM10/28/18
to Marc F6ITU, herme...@googlegroups.com
I translated the German Language pdf's to English as well:


PWM-DJ1MR-2018.de.en.pdf
VRF3933-ET-PA-18-11-2016 (Automatisch gespeichert).de.en.pdf

Steve Haynal

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Oct 28, 2018, 9:41:25 PM10/28/18
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Hi Kyle,

Thanks for all the files. Does DJ1MR have a github or webpage that we can link to? Files often get buried in this list. Or do you want to host them on github wiki?

73,

Steve
kf7o
DJ1MR - Attachment  5 

DJ1MR - Attachment  4 

DJ1MR - Attachment  3 

DJ1MR - Attachment  2 

DJ1MR - Attachment 1

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Marc OLANIE

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Oct 29, 2018, 3:14:24 AM10/29/18
to Steve Haynal, Hermes-Lite

Hi Guys

 

I tried to find a repo belonging to DJ1MR… in vain.

 

I’ve created a repository on github

https://github.com/F6ITU/ET-EER-Project

 

…. May I encourage you to fork ?

 

Two projects have been mixed in this repo : the DJ1MR one, and the one from Manfred XQ6FOD (2 German guys… may I recall that the first VHF linear transponder with ET was also designed by the German section of the AmSat)

 

The XQ6FOD has just one goal : to “KiCadize” Manfred’s project

 

I hope we will do the same with DJ1MR project, as Sprint Layout is not free nor Open and not generally used among the ham community.

73’

Marc f6itu

 

De : herme...@googlegroups.com <herme...@googlegroups.com> De la part de Steve Haynal
Envoyé : lundi 29 octobre 2018 02:41


À : Hermes-Lite <herme...@googlegroups.com>
Objet : Re: EER support?

 

Hi Kyle,

DJ1MR - Attachment  5 

 

DJ1MR - Attachment  4 

 

DJ1MR - Attachment  3 

 

DJ1MR - Attachment  2 

 

DJ1MR - Attachment 1

 

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K Jones

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Oct 30, 2018, 7:47:59 PM10/30/18
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Marc, 

Add this DK7XL design the github repo as well. I received them from DJ1MR earlier today... see his message to me below with files attached.

Hi Kyle,

I send you additional the PCB layout for the  Hermes adapter board, developed from my friend Klaus, DK7XL and also  the circuit diagram.  I can't say if this layout is without any errors, because I haven't use it so far. May be it is helpful.

Best regards
Ruediger
DJ1MR


 
Adapter for HERMES.lay6
Hermes-Adapterboard.spl

Marc OLANIE

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Oct 31, 2018, 2:59:17 AM10/31/18
to K Jones, Steve Haynal, herme...@googlegroups.com

Done

I’m still reading Rüdi’s literature. As soon as I have some spare time, I’ll add at least a kicad schematic

Marc

 

De : herme...@googlegroups.com <herme...@googlegroups.com> De la part de K Jones
Envoyé : mercredi 31 octobre 2018 00:47
À : Marc OLANIE <marc....@decision.fr>
Cc : Steve Haynal <softerh...@gmail.com>; herme...@googlegroups.com
Objet : Re: EER support?

K Jones

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Nov 3, 2018, 10:01:38 PM11/3/18
to Marc F6ITU, Steve Haynal, herme...@googlegroups.com
Marc:

I got another gainful insight email from Ruediger and wanted to send it along so you could post the pdf to the Github repo as well:  

Hi Kyle,

 

to get very fast a PWM, providing the modulated supply  voltage (Envelope supply voltage) fort he RF amplifier stages you can get an Evaluation Platform (board) from GaN Systems. Main advantage, you can realise a dead time on the board so that no overlapping exists in the two phases. In other words, You do not have to build anything yourself to get a PWM for Envelope RF amplifiers. It’s a main advantage to save time. Keep this in mind.

 

Best regards

Ruediger

 

DJ1MR

GS665xxT-EVBDB_UserGuide_rev_20180126.pdf

Steve Haynal

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Nov 4, 2018, 1:02:14 AM11/4/18
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Hi Marc,

Thanks for setting up this repository. I will link to it soon, tomorrow when I do a little work on github, the wiki and web pages.

73,

Steve
kf7o

DJ1MR - Attachment  5 

 

DJ1MR - Attachment  4 

 

DJ1MR - Attachment  3 

 

DJ1MR - Attachment  2 

 

DJ1MR - Attachment 1

 

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Marc OLANIE

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Nov 4, 2018, 1:22:38 AM11/4/18
to Steve Haynal, Hermes-Lite

Thanks a lot, Steve

I’ll add asap the EER thread by DJ1MR, Phil Harman, K1LI and Warren Prat. Incredibly exciting and interesting.

 

Oh, by the way, as you intend to make some cleaning on your wiki and git…

 

The initial link you gave on your “community project” page concerning our “Alexiares Retrofit” just point on the less interesting board (the I2C/decimal interface).

Could you change the url with the main SPI interface

https://github.com/F6ITU/Alexandrie

and the main wiki page ?

https://wiki.electrolab.fr/Projets:Lab:2017:Peripheriques_Angelia

this page will be translated in English within the two next months , but so far, pictures and schematics will give a better idea concerning this full Alex frontend retrofit.

 

Thanks again, 73’

Marc f6itu

 

 

De : herme...@googlegroups.com <herme...@googlegroups.com> De la part de Steve Haynal

Envoyé : dimanche 4 novembre 2018 07:02

DJ1MR - Attachment  5 

 

DJ1MR - Attachment  4 

 

DJ1MR - Attachment  3 

 

DJ1MR - Attachment  2 

 

DJ1MR - Attachment 1

 

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Steve Haynal

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Nov 4, 2018, 1:47:12 AM11/4/18
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Hi Mark and Group,

Okay. I will update the links.

It is great to see all this activity and information regarding EER and ET. I hope this work continues to mature and spread. I just want to set some expectations regarding my involvement as some private e-mails suggested I would be very involved. I am very busy with work and other aspects of my life and will probably not do much. I may try to use linearization with FT8 and reduce the heat by lowering Vpa provided the signal quality remains good. I'm willing to provide some firmware help with efforts to use the existing switching Vpa we have on our HL2 to track the envelope. It would be wonderful to reduce the HL2 heat enough so that the bare PCB without case can be used during TX, or TX increased to 10W. I can probably be persuaded to add back the Hermes EER/ET logic if someone has some serious PowerSDR experiments to run. I am a QRP guy so am not interested in anything more than about 10W. For increasing power, I am more interested in running several coherent HL2s in TX. 

73,

Steve
kf7o

DJ1MR - Attachment  5 

 

DJ1MR - Attachment  4 

 

DJ1MR - Attachment  3 

 

DJ1MR - Attachment  2 

 

DJ1MR - Attachment 1

 

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Marc OLANIE

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Nov 4, 2018, 2:57:58 AM11/4/18
to Steve Haynal, Hermes-Lite

:- ))

 

Don’t worry Steve… you’ve already given so much of your time for the community, and we all thank you for this.

 

First of all, being able to pass the 80% efficiency barrier would be incredibly exciting, even with lower than 10W output power. Driving SSPA will be the next step, but I don’t think we’ll see this in the immediate future.

 

Tnks agn Steve

 

73’ Marc f6itu

 

De : herme...@googlegroups.com <herme...@googlegroups.com> De la part de Steve Haynal

Envoyé : dimanche 4 novembre 2018 07:47

DJ1MR - Attachment  5 

 

DJ1MR - Attachment  4 

 

DJ1MR - Attachment  3 

 

DJ1MR - Attachment  2 

 

DJ1MR - Attachment 1

 

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Marc OLANIE

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Nov 4, 2018, 4:35:11 AM11/4/18
to K Jones, Steve Haynal, herme...@googlegroups.com, Brian Machesney, ph...@pharman.org, rue.m...@t-online.de

Done

 

I’ve created a specific subdir that contained the datasheet and talks between DJ1MR, K1LI and VK6PH (without any contextual explanation, the GAN document alone is quite hermetic :- / )

 

Also changed the readme to make a reference to the old OpenHPSDR  “hammer of thor” project, even if the page is definitely outdated. It’s a clear and simple explanation of EER  mechanism for newcomers.

 

Added a URL pointing to another paper by K1LI published in QEX (“feature article”, free public download)

 

I had to “manually Rebase”  the git as it was becoming messy (I made a stupid git mistake when staging a mod)

 

I must admit, I never learned so much on such a short time about EER ; )

 

This project is definitely exciting, but I ‘m afraid I do not have the technical level and skill to help a lot the community (unless you need an archivist and a more than stupid beta-tester)

 

VY 73’

Marc f6itu

 

PS : I’m spamming quite a lot of people with this email. This is for a simple reason. I one of you considers that the content of this github is is contrary to his interests or intellectual property, please let me know. I’ll delete the conflicting content asap. Future emails will be limited to the small EER/Hermes Lite working group.

 

 

 

Steve Haynal

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Nov 4, 2018, 5:22:12 PM11/4/18
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Hi Group,


I updated the community wiki page with a link to the EER and ET repository as well as updating the France links: https://github.com/softerhardware/Hermes-Lite2/wiki/Community-Projects

It only takes a free github account to edit the wikis, so all are encouraged to contribute to and edit the wiki pages.

73,

Steve
kf7o

in3otd

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Nov 12, 2018, 5:23:58 PM11/12/18
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Hello,
FYI, I've started integrating back the Hermes EER/ET logic into the H-L, currently it seems to work but I did only very little testing.
Here below are a couple of scope screenshots showing the H-L PWM output and the same after a simple RC lowpass for a two-tone test signal generated by PowerSDR.

     

I'll try to do a pull request with the code changes soon - hopefully these modifications did not break too many things, hi.


73 de Claudio, IN3OTD / DK1CG

Brian Machesney

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Nov 14, 2018, 10:42:23 AM11/14/18
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This is great work, Claudio, many thanks for your efforts. Would you, please, point me to some documentation of the interface?

Based on earlier successful work, I have preliminary modulator, GaN class D amplifier and diplexer/LPF designs to bring 250W to 500W signals to the antenna. I would like to collaborate with other members to complete the project.

I assume I will have to wait to begin serious work until the next build of H-L hardware. Are there any thoughts on when this might occur?

73 -- Brian K1LI

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Steve Haynal

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Nov 14, 2018, 2:28:37 PM11/14/18
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Hi Claudio,

Thanks for working on this! I will definitely pull in your changes when ready.

73,

Steve
kf7o

in3otd

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Nov 18, 2018, 5:12:24 PM11/18/18
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Hello Brian,
I do not know of any specific documentation for the Hermes EER interface, I can only tell what I know/learned while integrating the EER code but likely you already know all this:
- the PWM output is a fixed frequency pulse train at 240 kHz with a variable duty cycle from (theoretically) 0 % to 100 % in 1024 steps (so 10 bit resolution). The output high level is currently at 2.5 V on the Hermes-Lite because I did not find a spare 3.3 V output but surely Steve knows if there is one still available.
- the PowerSDR SW controls the PWM and RF outputs in the EER mode: here below is the PowerSDR EER setup window:



Once you select "Transmit in EER mode" the PWM output will become active. For the RF output, if you select "Amplitude Modulate IQ" you will have the usual RF output (with the amplitude and phase modulation), while if you uncheck it you will get a constant amplitude sinewave with just the phase modulation. In any case the RF output amplitude is scaled by the "Phase Gain" factor while the signal used to modulate the PWM output is scaled by the "Env Gain" factor.
"Env Delay" add a delay to the PWM output and "Phase Delay" to the RF output for matching the respective paths delays.
In the "PWM Control" you can select the minimum and maximum PWM output, for example to keep some minimum voltage on the output stage.


73 de Claudio, IN3OTD / DK1CG




Steve Haynal

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Nov 19, 2018, 12:44:11 PM11/19/18
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Hi Claudio,

There are actually no 3.3V output pins still available. There are several spare input-only due to the FPGA architecture. If you need a 3.3V output pin, some options are:

1. Repurpose one of the LED outputs. They are 3.3V.
2. Use pin 105 from the FPGA. This currently connects to PGA[5] on the AD9866. It is there to support a future mode of operation but is not currently used. It may be hard to connect to this pin as there are no test pads on the trace.
3. Convert to 3.3V operation for Vlvds. This requires removing FB28 and connecting to 3.3V instead of 2.5V. In early boards there was a footprint for this, but I removed that to simplify things... Then the IO pins are 3.3V. Currently the IO pins are 2.5V to support LVDS communication, which doesn't work with 3.3V bank voltage. LVDS is what I plan to use to link and synchronize multiple HL2s.

73,

Steve
kf7o

in3otd

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Nov 21, 2018, 5:04:55 PM11/21/18
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Hello Steve,
I don't think that a 3.3 V level output for the envelope PWM is mandatory, using a 2.5 V output should be fine since it will be use either to drive a SMPS via a buffer/optocoupler or filtered and amplified to get an analog output. I was looking for a 3.3 V pin just to keep the same levels as in the original Hermes.

In the meantime I've also added the EER controls to linhpsdr, since I usually use Linux for all the ham radio stuff here.



the resemblance to the PowerSDR EER tab is not a coincidence, hi.

The code seems to work fine, below is a screenshot of the RF and the filtered PWM envelope output of a short section of speech when using linhpsdr:



73 de Claudio, IN3OTD / DK1CG

Steve Haynal

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Nov 23, 2018, 9:44:14 AM11/23/18
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Hi Claudio,

Thanks for this work! I saw you pull request. I am still traveling with limited internet. I will be home by next weekend and will do the merge then.

73,

Steve
kf7o

K Jones

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Nov 27, 2018, 11:17:31 AM11/27/18
to Steve Haynal, herme...@googlegroups.com
Guys.... I wanted to pass the following along that Ruediger sent me yesterday .... very nice work he is doing:


He Kyle,

Thank you for passing the information. In the meantime  have improved my PWM converter with some new  features.

The features are:

·         Dead time controller

·         Over current controller

·         Smaler heatsink

·         Overcome some further miscellaneous shortcomings

 

The new PWM version shell drive my new GAN EF2,odd  power amplifier stages with Infineon GAN Fets with a 100 volt Envelope supply votage. Also I have developed a centralized digital predriver for the EF2,odd amplifier stages, so I need only one driver for all EF band moduls. I hope Phil and Warren will find time to integrate the predistortion feature for the unmodulated phase signal in EER mode soon.

In the attachments you can find all the new moduls.

 

Best regards

Ruediger

DJ1MR


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PWM-Basic-PCB.JPG
EF-Endstufe-digital-GAN-Fets.jpg
Digital-Treiber.jpg
Controller-PWM-Current.jpg
Erster Test EF Digitaltreiber DJ1MR.PDF
Current-Controllert.jpg
PWM-circuit-diagramTotzeit.jpg

Steve Haynal

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Dec 2, 2018, 11:02:58 PM12/2/18
to Hermes-Lite
Hi Claudio,

I merged you pull request. Thanks!

To all, this is very experimental code. It may not work exactly as expected and/or may cause issues for other pieces of code. We will resolve any issues over time.

73,

Steve
kf7o
 

On Wednesday, November 21, 2018 at 2:04:55 PM UTC-8, in3otd wrote:

Brian Machesney

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Jan 31, 2019, 11:25:16 AM1/31/19
to Hermes-Lite
Claudio,

In your experience, how should the 2.5V driver carrying the PWM signal be connected to the optocoupler? For example, can it drive  several inches of miniature coax or twisted-pair to a neighboring board that carries the isolator? Or, should the isolator be located on a tiny daughterboard that is mounted just above the HL2 board?

Thanks for your work on this,

Brian K1LI

in3otd

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Feb 1, 2019, 12:36:46 PM2/1/19
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Hello,
I don't actually have much experience here :) ; I think that a twisted pair should be ok, coax will likely present a larger capacitance but should also work. The pin used for the PWM output can drive up to 8 mA, IIRC, so you may need an additional buffer if you need a higher current.


73 de Claudio, IN3OTD / DK1CG

in3otd

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Jul 4, 2019, 3:58:43 PM7/4/19
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Hello,
as Steve mentioned a few days ago, I've recently added a Wiki page about the Hermes-Lite 2.0 and EER, https://github.com/softerhardware/Hermes-Lite2/wiki/Enabling-EER-PWM-Output with the main things discussed in this thread, please take a look and add/correct anything missing.

I'm enclosing here a custom gateware for the H-Lv2b5 and later, based on the 20190616 release, which has EER enabled, in case someone wants to play with it.
(.rbf for updating via Ethernet, .jic for Flash programming, .sof for volatile programming - see here for programming instructions). This gateware has one HW RX less (3 instead of 4) to make room for the EER logic.

73 de Claudio, DK1CG / IN3OTD


hl2b5up.jic
hl2b5up.rbf
hl2b5up.sof

Steve Haynal

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Jul 7, 2019, 10:12:02 PM7/7/19
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Hi Claudio,

Thanks! I will try to merge your changes into the main branch this week. Were you able to merge?

73,

Steve
kf7o

in3otd

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Jul 8, 2019, 1:38:03 AM7/8/19
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yep, I did merge already :)


73 de Claudio, DK1CG / IN3OTD

Steve Haynal

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Sep 9, 2019, 12:23:37 AM9/9/19
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Hi Claudio and Brian,

How is the EER work going? Let me know if/when you want me to include building gateware images with this feature turned on.

73,

Steve
kf7o

in3otd

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Sep 9, 2019, 11:21:41 AM9/9/19
to Hermes-Lite
Hello,
I'm not actively working on EER at the moment, too many projects on the bench. Not sure if I mentioned this already but some time ago I did some experiments to see if the existing DC/DC converter for the PA could be used for EER, injecting the filtered PWM on its feedback pin but it seems it's not suitable as it does not have enough bandwidth to follow the envelope modulation.

Not sure if there is already a need to regularly release a gateware with EER enabled, I have the impression there are not many users needing that currently.


73 de Claudio, DK1CG / IN3OTD

Brian Machesney

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Oct 11, 2019, 6:37:37 AM10/11/19
to Hermes-Lite
What is the preferred way to get the PWM signal off the board and onto a connector that can drive a short cable (~1m?) to drive a switchmode amplifier?

Brian K1LI

Brian Machesney

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Oct 11, 2019, 6:41:11 AM10/11/19
to Hermes-Lite
Is it necessary to run the HL2 SSB output through the LPF bank before using it to drive a switchmode PA? It seems to me that it should not be necessary as long as I filter out the clock frequency and operate the HL2's output amplifier at a level where it is very linear.

Brian K1LI

Steve Haynal

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Oct 12, 2019, 1:07:03 AM10/12/19
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Hi Brian,

One simple way would be to make a small change and spin one of the front or back endplate PCBs. You can add a proper footprint for your desired connector. You can add a bit or circuitry on the inside of the endplate. You will only have to run a few wires internally. You can also make a small daughter board that mates with some of the extra internal IO connectors on the HL2 and is position near an endplate.

No, you can skip the LPF bank. This is one reason the N2ADR board can be separated from the HL2.

73,

Steve
kf7o

Steve Haynal

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Oct 12, 2019, 2:54:13 PM10/12/19
to Brian Machesney, herme...@googlegroups.com
Hi Brian and Group,

for endplate PCBs.

Claudio has already assigned IO pins for this EER option in the gateware:
  output          io_lvds_txn, // also TX envelope PWM inverted
  output          io_lvds_txp, // also TX envelope PWM

These are pins 2 and 3 of CN5.

This is yet another example of why forking the gateware becomes a mess. It is very difficult to coordinate how these pins are used if a fork that uses these pins but does not submit pull requests or patches to the main github repository.

73,

Steve
kf7o



On Sat, Oct 12, 2019 at 2:44 AM Brian Machesney <nekv...@gmail.com> wrote:
Now that I'm having a good look at the PCB and schematic together, I see numerous "DBxx" scattered around the board. Is there one you would recommend, offhand, for this purpose?

I'm also thinking about simply replacing the filter board with the EER PA. I guess that could include stake pins along the edge of  the HL2 board, in the vicinity of the prototyping area, to push the envelope PWM signal over to the EER PA.

On Sat, Oct 12, 2019 at 5:27 AM Brian Machesney <nekv...@gmail.com> wrote:
Steve -- What's an "endplate PCB?"

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Brian Machesney

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Oct 12, 2019, 5:32:11 PM10/12/19
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I don't mean to seem dense, Steve, but searching the schematic turns up no CN5 and Claudio's EER page states that complementary PWM signals are brought out to pins 1 and 2 on DB12. Have I taken a wrong turn?

Steve Haynal

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Oct 12, 2019, 5:38:41 PM10/12/19
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Hi Brian,

Sorry, you are correct. I was looking at an old schematic. These are pins 1 and 2 on DB12.

73,

Steve
kf7o
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Steve Haynal

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Nov 7, 2019, 2:05:03 AM11/7/19
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Hi Claudio and Brian,

I am working on a small IO board. What type of circuit will you need between the FPGA pin and the PA EER? Is a level shifter up to Vsupply sufficient?

73,

Steve
kf7o

Brian Machesney

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Jan 1, 2020, 10:05:13 PM1/1/20
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Claudio,

I wish to use the HL2 PWM output with a gate driver that has separate high and low input lines, HI and LI, respectively. The manufacturer recommends control of the dead time between the HI and LI signals to prevent "shoot through" current in the switching FETs. Is it possible to control the HI-LI dead time, or should I use only the HI or the LI signal and generate dead time with hardware?

Brian K1LI

in3otd

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Jan 2, 2020, 5:48:32 AM1/2/20
to Hermes-Lite
Hello Brian,
the original Hermes had only one PWM output and the same code is also used in the H-Lv2; I added an inverted PWM output just because it could be useful in some cases but there is no way to add/control the dead time between the regular and the inverted PWM output.
I think it's more practical to generate and adjust the dead time in the external hardware.

73 de Claudio, DK1CG / IN3OTD

Brian Machesney

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Jan 2, 2020, 8:47:00 AM1/2/20
to Hermes-Lite
Thanks, Claudio. That is as I suspected, since there is no dead-time entry in the software. Hardware dead-time is fine.

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Brian Machesney

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May 13, 2020, 5:01:55 PM5/13/20
to Hermes-Lite
As I close in on a 100-W EER prototype, I wanted to alert the group to off-the-shelf modules and easy-to-build kits that are saving me considerable time and effort.

TI's LMG5200-EVM accepts a digital PWM input and produces a PWM output of up to 80-V at 10-A (with adequate added thermal measures). The board includes circuitry that adds dead time to the HI and LO signals to maintain the high efficiency of the LMG5200 integrated circuit, which combines a high-low driver with a pair of GaN HEMT in the usual class D half-bridge configuration. The on-board output filter is not appropriate for EER, so some minor modification is required. I'm pretty confident that the circuitry, sans output filter, can be fit into the board area currently occupied by the N2ADR filter, which should not be required for an EER implementation.

This 7-band LPF board comprises 7-th order Chebyshev filters for 160m through 6m. I will check it with a VNA when it arrives, but the seller says he used Microwave Office to design it, so I expect it should meet expectations. Digital inputs activate relays for band selection, as usual.

The N7DDC 100-W ATU kit will help maximize efficiency by maintaining a near-50-ohm load on the LPF outputs. The functionality one can obtain for this low price is quite impressive.

That leaves "only the PA" to develop. Please, don't ask when I'll have this project working! I've solved several thorny problems that seem to be unique to a five-octave switchmode RF generator, but everything takes much longer than you expect and summer isn't usually the best time to make fast progress. I'm working on the PCB layout now but, realistically, I don't expect to fire it up until late in 2020.

73 and good health to all ... Brian K1LI



Steve Haynal

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May 15, 2020, 1:04:02 AM5/15/20
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Hi Brian,

Thanks for the update and the links!

73,

Steve
kf7o

K J

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May 15, 2020, 9:26:44 AM5/15/20
to Brian Machesney, Hermes-Lite
Kudos Brian for your and the groups ongoing EER efforts!

Looking forward to hear how prototype works out.

Kyle
KJ4QAL

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Don Rudolph

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Jun 18, 2021, 5:32:29 PM6/18/21
to Hermes-Lite
Hello,
I am new to this group and I am very interested in the development of an EER amplifier.
I have an ANAN 7000DLE which has the Orion MKII board.
I have found the EER output header on the Orion board marked J48.
Is anybody working on this project presently?
Please let me know.
Thanks,
Don W9BHI

Steve Haynal

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Jun 21, 2021, 1:28:43 AM6/21/21
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Hi Don,

You found the right thread. Brian and Claudio have worked on this in the past. I don't think there is any recent activity. EER would be very helpful to reduce heat and conserve power!

73,

Steve
kf7o
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