Balanced rx input

[Alan Hopper]

Hi Group,

In looking at using multiple HL2s I've been pondering receive antenna and wonder if there is anything to be gained from connecting the balanced and typically >50ohm output from a small loop directly to the AD9866 balanced input.  Will this in anyway help avoid common mode currents or make the antenna pattern more predictable? What would happen with lightning and static? I'm hoping to be told it is a waste of time as I don't need another project but it is something I've wondered since the HL1 and its pluggable front end.

73 Alan M0NNB

[Joe LB1HI]

Hi Alan,
Hi Alan,

There are no benefits from this solution. in fact quite the opposite. In my free time I will write more with explanation. And now briefly e.g.

Risk of damage to FPGA, contrary to appearances and common beliefs that are a myth, a greater risk of noise as a result of common mode currents when using a symmetrical feeder line direct to receiver input. 

73, Joe
lb1hi

[Steve Haynal]

Hi Alan,

There is TVS diode in place to handle high voltages. You could still use one if connecting high impedance balanced line directly to the balanced input to the AD9866. Also, the existing transformer provides some voltage gain. You might have to run the LNA at a higher setting to compensate for this which may then add noise. I really haven't thought much about this and any possible benefits. Maybe others with RF expertise can add more.

73,

Steve

kf7o

[Alan Hopper]

Hi Joe & Steve,

thanks for your responses, Joe that is sort of what I wanted to hear:) but I would be very interested in understanding the reasons. Just for a bit more context, I'm pondering setting up 3 or 4 HL2s to have a fully steerable receiving setup (tx is a project down the road).  I was thinking about placing the HL2 near each antenna but the clock sync cables make this harder.

I did once pull an HL up a tree in the middle of a vertical dipole with a lipo battery and mini wifi router and operated from a MS Surface, it made a very neat wilderness setup as the only cable carried was the antenna. I make no claims for how well it worked as I have nothing to compare it to but have often wondered if it was worth pursuing further.

I've realised the new clock sync feature has benefits for side by side receive antenna comparison using wspr,JTxx,FTxx spot counts. This removes the errors caused by signals on the edge of the band being missed by one or other decoder, in the past decodes were +- 1Hz with ntp calibration but they should be perfect now.

73 Alan M0NNB

[Joe LB1HI]

Hi Alan,

Yes, I will do it as soon as I catch my breath.

I'm temporarily limited. Due to various travels and social activities (dugnad) in connection with Covid 19.

Even if I wanted to write briefly and give only links to the literature, it will not be short.

73, Jozef

lb1hi

[Alan Hopper]

Hi Joe,

thanks, I'll look forward to it. Dugnad is a nice word (new to me) I don't think there is anything as concise in English.

73 Alan M0NNB

[Joe LB1HI]

Hi Alan and Steve,

In many supposedly symmetrical antennas, even small loop ones, e.g. the small loop design presented in ARRL book is not symmetrical. Often this drawback occurs in a large number of other small loop designs.

The symmetrical feed line remains symmetrical only when the conditions of the layout with respect to the antenna and the environment are met. And this is often simply very difficult or even impossible. And bringing inside to the shack and further inside the transceiver while maintaining the principles of proper layout that does not disturb symmetry is even more difficult.
 And every disturbance of electrical symmetry (balance) means common mode currents and local noise pickup.

On the concentric feed line (coax), it is much easier to control common mode currents. And it is much easier to bring it to the radioshack.

The symmetry of the small loop was well described by W8JI.here

And common-mode noise here 

 

By the way, this undoubted benefit of the symmetrical line is most noticeable in transmission paths. Low-loss for long-distance transmission, and low loss even in the face of high SWR, which enables multi-band applications (e.g. non-resonant doublet or large loop). By using such an asymmetrical feed line the best is to stop where the possibilities of fulfilling the proper layout condition end. And from this point to go over to coaxial feedline. But by use of a truly symmetrical tuner. I emphasize once again, truly symmetrical. Because the most common problem of the presence of common-mode currents in symmetrical antenna systems is the use of poor quality tuner. It is not about quality workmanship. But for the quality of meeting the requirement of true symmetry in the entire range of frequencies supported.

The second issue is HL2 itself

Bringing the symmetrical feed line directly to the FPGA would require the construction of a new, different type, antialias low pass filter.

Only one protection against damage will be diodes and this is small protection.

Additional protection is easier to implement on a coaxial feedline.

Damage to the discrete frontend element is cheaper and easier to repair than replacing the FPGA in the event of damage.

For the purposes you have given, we only need to control the amplitude and phase of the signal from two different antennas. Both types of symmetrical and concentric feed lines ensure these parameters equally.

The only benefit using symmetrical would be to increase the IP3 parameters by eliminating the analog elements included in the current antialias filter  and T2 transformer

RX input in HL2 FPGA has a very good dynamic range and only the T2 transformer is the IP3 parameters bottleneck (and lowpass filter elements ..)

If someone would care about increasing the IP3 parameter then T2 can be replaced with yourself wound transformer.

Preferably on a core with a diameter of T68 but considering the small amount of space, a core with a diameter of T50 will be compromised minimum.

And by the way Steve, by the way, what is the input impedance of the FPGA pins ... Logic suggests that roughly in the range of 300-500 Ohm which would result from the parameters of the T2 transformer (current 1:7.84 Z ratio ). And how is it really? Thank you in advance for your answer.

Alan, Bearing in mind CR publication restrictions, if more details are needed, I will send you a private e-mail.

73, Joe
LB1HI

[Steve Haynal]

Hi Joe,

Thanks for the details. The AD9866 input impedance is 400 Ohms. See Table 2 on page 4 of the datasheet:

https://www.analog.com/media/en/technical-documentation/data-sheets/AD9866.pdf

We do use a balanced filter on the TX path which could be repurposed for RX.

I have not strong desire or motivation to switch to balanced RX input, and am just answering questions and discussing with you and Alan.

73,

Steve

kf7o

[Joe LB1HI]

Hi 
   And, of course, a correction.
 Because there was my slip of the tongue. Not FPGA but ADC U7 pin 37,38 :-).

Of course, it was clear what was going on. But instead of ADC. The FPGA name was entered incorrectly.

So let it be explained to future readers.

73, Joe

[Joe LB1HI]

Hi Steve,

Thank you for the link.

I also do not have the desire or motivation to use balanced RX input and I see more difficulties and threats than benefits.

However, it does not interfere with the implementation of the idea of digital beamforming

73, Joe

[Alan Hopper]

Hi Joe,

thanks very much for that, it all make sense to me (I might still put a loop on an old HL1 just to expel the idea from my head:) ).  I am still intrigued by the possibilities the HL2 offfers of placing the radio closer to or at the feedpoint of an antenna.  None of these thoughts really relate to beamforming due to the need to connect the radios to sync them, thinking about receive just stirred up some old thoughts.

Thanks again,

73 Alan M0NNB