C0
0 0 1 0 0 1 0 x
C1
0 0 0 0 0 0 0 0
| |
+-------------+------------ Second Alex filters – needs documenting
C2
0 0 0 0 0 0 0 0
| |
+-------------+------------ Second Alex filters – needs documenting
C3
0 0 0 0 0 0 0 0
| |
+-------------+------------ Firmware Env Gain (bits [15:8])
C4
0 0 0 0 0 0 0 0
| |
+-------------+------------ Firmware Env Gain (bits [7:0])
I don't see anything in the doc for case 11, TX buffer size.
This probably doesn't matter to anyone that doesn't use > 7 receivers, but I thought I'd point it out that these bits used by HL2 for RX8-RX12 are being used for other things.
If you change the code to skip the last two command, > 7 receivers works again:
1642 if(current_rx==0) {
1643 command++;
1644 //N1GP if(command>11) {
1645 if(command>9) {
1646 command=1;
1647 }
1648 }
-Rick / N1GP
a) More than 7 RX is HermesLite-II only (not in the HPSDR protocol).
b) The 0x2E command is HermesLite-II only. It should not be used
if there is no HermesLite-II. More severe, the values used there are NOT OK,
especially the "low water mark" filling of the TX buffer is too small.
I use:
case 11:
// DL1YCF: HermesLite-II only
// specify some more robust TX latency and PTT hang times
// A latency of 40 msec means that we first send two buffers
// of TX iq samples (assuming a buffer length of 1024 samples,
// that is 21 msec) before HL2 starts TXing. This should be
// enough to prevent underflows and leave some head-room
// my measurements indicate that the TX FIFO can hold about
// 75 msec or 3600 samples (cum grano salis).
output_buffer[C0]=0x2E;
output_buffer[C3]=20; // 20 msec PTT hang time, only bits 4:0
output_buffer[C4]=40; // 40 msec TX latency, only bits 6:0
On Thursday, February 10, 2022 at 12:27:15 PM UTC-5 "Christoph v. Wüllen" wrote:a) More than 7 RX is HermesLite-II only (not in the HPSDR protocol).
True but unfortunate as the Angelia and Orion FPGAs can handle more rx slices as well as Gige.I had put modifications in to support it, but I guess there is not much of a desire for many RX slices:A good use case would be SkimSrv to do 8 band CW decoding:
b) The 0x2E command is HermesLite-II only. It should not be used
if there is no HermesLite-II. More severe, the values used there are NOT OK,
especially the "low water mark" filling of the TX buffer is too small.
I use:
case 11:
// DL1YCF: HermesLite-II only
// specify some more robust TX latency and PTT hang times
// A latency of 40 msec means that we first send two buffers
// of TX iq samples (assuming a buffer length of 1024 samples,
// that is 21 msec) before HL2 starts TXing. This should be
// enough to prevent underflows and leave some head-room
// my measurements indicate that the TX FIFO can hold about
// 75 msec or 3600 samples (cum grano salis).
output_buffer[C0]=0x2E;
output_buffer[C3]=20; // 20 msec PTT hang time, only bits 4:0
output_buffer[C4]=40; // 40 msec TX latency, only bits 6:0
OK, I see the 0x2E is OK but perhaps it should have a clause to only do it for HL2
c) The 0x24 command is legal but probably only relevant for orion-II boards.
But when this is completed, one should come back to case 1 (code from
pihpsdr showing the roll-back):
case 10:
//
// This is possibly only relevant for Orion-II boards
//
output_buffer[C0]=0x24;
if(isTransmitting()) {
output_buffer[C1]|=0x80; // ground RX2 on transmit, bit0-6 are Alex2 filters
}
if(receiver[0]->alex_antenna==5) { // XVTR
output_buffer[C2] |= 0x02; // Alex2 XVTR enable
}
if(transmitter->puresignal) {
output_buffer[C2] |= 0x40; // Synchronize RX5 and TX frequency on transmit (ANAN-7000)
}
//
// This was the last command defined in the HPSDR document so we
// roll back to the first command.
// The HermesLite-II uses an extended command set so in this case
// we proceed.
if (device == DEVICE_HERMES_LITE2) {
command=11;
} else {
command=1;
}
break;
>
I have had a look at this. I am guessing from the code you post that you are using G0ORX's code. The case reset that Christoph is talking about is accounted for in my fork. However, there is no code to send NCO freq for RX8 or RX9.
You might not have seen it the HL2 wiki details the protocol and compliments to the USB protocol doc you mention. This explains output_buffer[C0]=0x2E, see ADDR 0x17 per HL2 doc:I am surprised if you only had to modify the lines you quotes in the G0ORX code. For example, the maximum number of receivers is coded to 8, see:
I am curious what you want to do with the 10 receivers? I have found that with > 4 RXs in linHPSDR the performance really suffers to the point it is not unusable. This is related to the waterfall display update code (I believe I tracked this down to some sort of blocking call within GetPixels in the update_receiver function). If you set the FPS on each RX to 1 FPS you can squeeze a bit more out. However, I have just modified some code in my fork and run some tests (with the gateware you link), even with 1 FPS per RX and the number of pixels on each waterfall at min settings, it was missing processing a lot of packets (in my fork I report via the command line the EP6 sequence number linHPSDR thought it was getting vs the number it received in the packet).
In the past I have wondered about an option to not display the waterfall for lots of receivers. This might work, but if you then want to connect 10 pulse audio sinks to digi mode software, there maybe another wall to hit...73 Matthew M5EVT.
Hi Matthew,I'm using the 192Khz 10RX (no TX) from here:-Rick / N1GP
On Friday, February 11, 2022 at 9:29:44 AM UTC-5 Matthew wrote:
I would be interested to have a look at this. Can you point me to the HL2 gateware you are using?73 Matthew M5EVT.
