Thoughts on AI

[Steve Haynal]

Hi Group,

To state the obvious, AI is dramatically changing how projects like the Hermes-Lite 2 can be developed, as well as daily work life for FPGA/software engineers such as myself. I believe it is the most significant change I will see in my career, even bigger than the internet or smart phone. I am generally positive about AI, use it more and more at my day job, and am excited to see what it might do for projects like the Hermes-Lite 2.

A few weeks ago, a highly-capable and mysterious AI called Ox Alpha anonymously appeared on openrouter.com. For one week they offered free unlimited use. I decided to see what it could do with the Hermes-Lite 2 project. I asked it to first create 3 documents: an architectural overview, the 5 top bugs, and the 5 best opportunities to refactor code for clarity, conciseness and FPGA resource savings. I liked what it generated so had it fix 4 of the 5 bugs (1 was not real but design intent) and perform the 5 refactors. Then I had it generate a plan to add a full spectrum with full resolution mode using ethernet jumbo packets, something I've long dreamed of doing. Unfortunately, the free period ran out before I could ask it to implement that plan. When I find the time, I want to review and test the bug fixes and refactors, and if everything looks pretty good, I will pay to have it do more work on the Hermes-Lite 2. I have added the architectural document to the wiki:

https://github.com/softerhardware/Hermes-Lite2/wiki/Architecture

I also just recently received two AI-generated issue submissions to github. These always look very professionally formatted, and are detailed and verbose. In this case, I just skimmed and determined they were not true bugs but some architectural features the AI was not aware of. One thing I don't like about AI is the amount of noise it can generate. Please carefully review and cross check this Google Group before having an AI submit an issue. It is easy to have an AI submit issues, but costly to then require a human to review them all. 

One AI project I've dreamed of is to prime an AI's context with the full contents of this Google Group and make it a contributor to this list as an agent. It would then be an expert and could answer the many repeated questions or variations of questions that come up in this group!

73,

Steve

kf7o

[Graeme Jury]

That is a very interesting post and I have also been using Cursor AI for development. I'll never develop at the level that you do Steve and I'm thrilled to see that you are getting bitten by the HL2 development bug.

I think of the hundreds of hours that you put into the project and never asked a penny from anyone and in fact made donations of equipment to others interested in furthering the development with code or hardware. I reckon that there are enough people on this site who appreciate all that you have done in the past who would be prepared to shout you the price of a coffee (or a second one if the first does not raise enough) which accumulated would pay a subscription to Ox Alpha for you if you would be prepared to accept it. You really should because all the givers will receive the benefit of your research and enhancements so it is a two way thing but there are no strings, if you get the subscription you are not bound to produce anything for the HL2 project unless you want to. Its how it has always been and how it should stay.

Are you up for it Steve?

73, Graeme ZL2TE

[John Williams]

I will contribute!

John W9JSW

---

From: herme...@googlegroups.com <herme...@googlegroups.com> on behalf of Graeme Jury <gvj...@gmail.com>
Sent: Sunday, September 6, 2026 5:23 PM
To: Hermes-Lite <herme...@googlegroups.com>
Subject: Re: Thoughts on AI

 

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[Dalton Williams]

I will contribute 

Dalton 

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[Nikos Magafourakis]

I completely agree with Graeme Jury and I would also like to help in any way I can in this effort.

73, Nikos de SV9CVJ

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[Jwahar Bammi]

+1 glad to help completely agree with the sentiment.

 

..

73 de ws1m

Bammi

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[Ed Grafton]

+1

The last computer I programmed was a TRS-80 color computer. I am now able to come up with an idea & Claude makes it work for me. Truly amazing. 
I will contribute, to keep Steve from having to answer the same questions again & again.

Ed

[Jim KD4YLQ]

An outstanding idea and I'll be happy to contribute!

73  Jim  KD4YLQ

[randol...@gmail.com]

Steve, 

I suggest you setup a contribution link like N8SDR has for LYRA. I just sent $100 to it. If 100 of us contribute $25, it starts making a useful pile of $$$ to support Hermes LIte work.

Ransdy

W7CPA

[Phil]

I will also. 

Phil 

KB3UUL

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[James Ahlstrom]

I have also been using AI, namely the free Google AI mode in the Chrome browser. I am astounded at how useful it is. I mainly use it to sift through the terabytes of Microsoft documentation looking for standard answers. It can provide code snippets to drop into place. I don't let it write major code yet.

I find it necessary to ask precise grammatical questions, or else you are likely to get vapid generic answers. And it is confused by technological progress. If the correct way of doing something lasted five years, and now there is a better way available for one year, it will likely reply with the old way because there is more text describing it. And it once replied to a question on HL2 CW with a lengthy, highly detailed and believable reply that was completely wrong. It doesn't lack confidence.

Still, I hope I never have to write software without it.

Jim

N2ADR

[Sid Boyce]

I tried generating a circuit diagram and Arduino code for a NE17 Stepper motor driver and it all checked out. Next try is to generate HL2 I/O board code for the DXWorld 1200W LPF board.

73 ... Sid.

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[Clifford Heath]

I have found Claude Code (I’m using Sonnet) to be good value for some of the routine stuff I want to do (mostly not involving writing code - when I do that I use very small fragments and scrutinise the output closely, hand editing it to get it to a state that’s acceptable to me). It is excellent at reverse engineering, setting up Docker images for porting packages, and other things.

However, I think it’s a mistake to expect an LLM to generate a sensible circuit or PCB, even if it worked once.

LLMs work on linear sequences of tokens, one-dimensional. PCBs are multiple 2-dimensional layers, and schematics have arbitrary dimensionality.

Any attempt to simulate multi-dimensional data in a one-dimensional form is fraught, to say the least. And that’s before you recognise the dearth of good training inputs, or quality metrics on any inputs which might be available. Software is written in linear languages, is incredibly plentiful, but mostly is subject to extensive review and commentary on its quality.

Clifford Heath

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[Ken Milnes]

I have recently designed a circuit and PCB for a Yaesu rotor controller to servo the router to a commanded angle using Kicad. I asked ChatGPT to conduct a design review on both the schematic, BOM, and PCB.  It did an excellent job of finding errors and made good suggestions on potential improvements.  An example was that I had 7400 series logic gates powered by 5V but the gate inputs were 3.3v.  It correctly suggested using the 7400 series designed to be compatible with 3.3v inputs.  

I have not tried asking AI to design a circuit, but it was sure helpful in the design review process.  I am confident that it will do a good job at design in the near future. 

Ken Milnes AI7LF

On Sep 9, 2026, at 4:31 PM, Clifford Heath <cliffor...@gmail.com> wrote



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[Sid Boyce]

Point taken, Thanks.

73 ... Sid.

[Franz]

Hi Steve,

AI is indeed a game changer for coding. There has been a step change since around November 2025 when the models suddenly advanced from being relativelky compenent coders who needed a some guidance and correction to competent software architects. I develop a lot of code for a SAAS business I own and have literally not written any code since the beginning of the year! AI has literally written hundreds of thousands of lines of production ready code. Once you learn how to guide these things and how to identify code/design smell then it all goes relatively smoothly. But you have to be using the frontier models - OpenAI and Claude Opus 5/Fable 5.1.

Anyone who is considering or hesitant to get onboard with agentic coding, I cannot recommend it more. All those small projects you thought of, but never had time to build, now you can. In literally one or two days! I have already built and released several open sourced projects (www.zeroz4j.com and www.swarmcoder.dev) which literally tooks a few days on the side. And for those of you who are perfectionists on how their code looks, my advice is to get over it. I also struggled/fought in the beginning with code that didn't look the way I wanted it to, even if it did work. Then I realised the real game. Any non-optimal code that is written now by a AI agent will be easily repaired in two years time for peanuts. So live with it for the next two years and dont let that stop you from realising your projects.

But for real coding you will need a proper coding agent. Dont try and do anything more than a one file program with the chat version of the LLMs. Get a subscription to Claude Code or Codex, or the Deepseek coding agent (I dont recall the name) is getting a lot of good reviews and that is more affordable. Or use Hermes and OpenRouter. This is the best money you will spend on a subscription product! I eventually got the $200/month Claude Code Max and haven't looked back. I had a subscription to a embedded html editor that I use in the SAAS platform that was costing me $275/month. Fable 5 wrote me a new one in literally two days! And it rocks, better than the paid version. So on one small project it has already paid for itself. Now not all of you will have this situation, but to be able to build emebedded controller firmware to web apps, to building web sites (using Claude Design - for an example check out my website at www.schoning.com) to a project I will release soon which is a free drumming player (www.drummingforfun.com - coming soon for any drummer out there). I have never been as productive in my life at getting all those cool projects that I never had time to do before in addition to my day job, and relatively effortlessly!

As you probbaly know Ox Alpha was a prerelease test of Z.AI GLM 5.3 which is competent but still not at the level of Claude when it comes to architecture. I sometimes have extra tokens at the end of my weekly budget on my Claude Code Max subscription and Fable 5.1 is supposed to be the best model for verilog. @Steve if you send me the rough prompt you used and remind me of the github page where the HL2 verilog code is, then I can run it through Fable 5.1 and let you know the results. 

The AI's apparently struggle a bit with timing and concurrency on verilog, but if there is a simulator software attached, the agent will iterate until it gets it right. Is the HL2 toolchain setup for such simulator s/w?

73,
Franz

[Dalton Williams]

I used Open Ai to write a realtime interface between my HL2 running Thetis and my Palstar HL-Auto tuner. I now control the tuner to follow my receiver recalling to its memory stored settings and antenna selection as I listen and when I click tune to validate the SWR and key my amp only when the SWR is acceptable.

It works like a charm protecting my 1Kw amp?

Dalton 

W5EIM 

Dalton Williams

DeFever 41 MV Easy Living

20 Years & 34,800 Miles on the water

Amateur Radio W5EIM

Capital Yacht Club Member

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[John Harper (AE5X)]

Since this group is a part of Google, are its contents not already available within Gemini?

[Jerry Aaronson]

I went round and round with ChatGPT AI trying to do programming, and every time I added a new feature it would break another feature, so our network security guru told me to try claude.ai and it fixed the code the first time and added some additional, better features. All that to say, every AI engine has its specialties.  ChatGPT was good at finding Syntax problems and doing research, and but couldn't do simple formulas like parallel resistance. 

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[Franz]

I had spare tokens and ran the HL2 gateway through Fable 5.1 on Extra mode.

Here are the results:

https://claude.ai/code/artifact/bf884a3e-c2e0-4fa7-863e-e135c49acb82?org=0eb92504-fcbd-49f4-a92a-b17779d5724c

Markdown files are attached for

• Architcteure documentation
• Bugs and improvements
  
• Comparison to Steves original GLM 5.3 analysis

Because agents are becoming more capable it opens up a lot of new possibilities. For e.g. I have always wanted to get into FPGA design but cannot afford the time for the learning curve, so I have never done any FPGA projects. Now this becomes a possibiltiy. One such project I am toying with is to get a Sipeed GoWin 138T board which is a beast of a FPGA at the price (~€160). Then the HL2 cyclone could be programmed to transmit the raw 12 bit RF to the HL2 J4 over 3 serial lines (to keep rf interference minimal) to the Gowin over a twisted pair ribbon cable. If this is posisble it could unlock a massive FPGA with something like 460 DSP units, and a hardware onboard RISV processor to handle the s/w. If Claude can write this code it could open up a lot of fun experiments - it would for example be feasible to use the GoWin AI libraries to do FPGA based AI signal processing - you could use it to instantly identify spurious transmissions, clean up poor audio etc.

As a matter of interest, this is what it would have cost at normal API token rates. But on the Claude Code max subscription ($200 / month), it cost me ~$1.50.

This session

Cost$21.97API41m 5sActive41m 34s

Lines+860 −0Fable 5.1100%Cache hit87%

BreakdownFable 5.1Input3.6kOutput1.7kCache read31.2MCache write4.8M

[Steve Haynal]

Hi All,

Thanks for the interesting discussion on AI. I haven't even found the time yet to review the changes I had Ox Alpha/GLM 1.3 make yet. If and when I get around to using more AI, I will post how much I use. You can always make a contribution via the PayPal link on the main www.hermeslite.com page.

Thanks Franz for the additional AI documentation. May I post them on the wiki? I didn't read everything in detail, but the claim that rtl/cmd_bus.vh and rtl/cmd_slave.v are missing is because that is a result of a refactor GLM 1.3 made. I like the idea of using a less expensive AI to do more of the straight-forward work, but then have a more expensive AI check and do the harder stuff.

73,

Steve

kf7o

[Steve Haynal]

Hi All,

One more thought. AI companies have an incentive to make the output verbose as they are paid per generated tokens. I think this is seen in the posted AI generated architecture documents. At work, a colleague has started using AI to generate code commit descriptions. What used to be one or two sentences is now several paragraphs. I no longer read them. I need my AI to create a summary of what their AI generated! If you want a human to read something, it needs to start with or be one or two sentences that capture the entire intent of what you are saying. Most people will not read the detailed and verbose output from AI or human, although it may be nicely formatted and structured. (I'm guilty of this when posting the AI generated HL2 architecture documents. :))

73,

Steve

kf7o

[Franz Schöning]

Hi Steve,

Yes you are welcome to post the analysis.

Concerning the verbositry of AI models this is actually not financially motivated. All commercial models these days are heavily subsidised (usually though massive investments into the AI companies) and they are in turn trying to buy their way into the market. This is the AI bubble you hear about on the news. When these subsidies run out then expect the token costs to potentially rise significantly, so make hay while the sun shines. Essentially the verbosity costs the provider so they are incentivised to reduce token usage for the same outcomes. The verbosity comes from the actual models training,a nd some are better than others.

As an aside and I may post this here as well if anyone is interested. I wanted to experiment to see how good AI is at hardware, fpga and PCB design. So I tried my project example and Claude has come up with whats looks like a workable solution. I have not looked in detail at the actual outputs yet. The idea is to connect the HL2 to a Sipeed Gowin Tan 138T fpga dev board. So that maximum number of experiments can be conducted on the gowin, I want to send raw RF to and from the board. The solution was to use multiple high speed serial busses between the HL2 and the gowin. A interface board will connect to the HL2 DB1 and J4 (I think) connectors and the gowin with a 16 pair high speed cable. The design also allows the same board to connect two HL2s together and join the radios (as was your original intention for the DB1 port if I understand correctly).

Anyway Claude code has done following so far, with only direction and oversight from me:

• Installed the gowin and cyclone tool chains (I only had to download them)
  
• Installed kicad
• Designed the schematic for the connectors.
  
• Designed a PCB for the connectors and priced it automatically at JCLPCB. To be fair it has only designed the board layout and placement of critical things like headers etc. Other parts are currently still just placed in rows. I need 1 to 2 millions tokens for the place and route task, so I may hand it over to a more traditional EDA tool instead? Any suggestions? Quilter?
  
• Designed a new 55mm front facia panel with the cutout for the connector cable - SlimSAS (SFF-8654 8i)
• Wrote gateware for both cyclone and gowin fpgas and ran serial bus speed simulations using the tools and simulators - all simulations passed.
• Gave me a graphical diagram and instructions on caliper tests to measure th HL2 dimenstions ensure the boards and connector will fit (meaning the AI has understood the 3D requirement)
• Boards were priced automatcially by the AI using JCLPCB tools. All components were first check for stock and pricing using JCLPCB - Claude searched and found the free usage components and seelcted those. The two interface boards are priced at $153 for first 5 boards (it is actually a single board for both interface PCBs and a snapoff groove). Front panel not yet priced. Claude even recommeded I prebuy certain connectors now as it noticed the stock dropped considerably during design.
• And probably a bunch of stuff that I have not remembered.

If anyone is interested I can post the results here when I am a step further? But essentially I think that frontier models may well be up to the task? If so making new gateware might become a weekend task? Still relatively early days though, but looking very promising.

73,

Franz

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[David Ricciardi]

It is pretty crazy what you can accomplish with AI these days. I had been experimenting with local llm running Qwen 3.8 27b with OpenCode on my dev machine for the last few weeks just seeing how far I could get, and the answer is apparently surprisingly pretty far. I have managed to get a HL2 client running on a Teensy 4.1 micro controller with waterfall and audio demod all working, while  it is a proof of concept and RX only today i imagine you could make a neat little portable controller for the hl2 radio with it. https://github.com/nricciar/hl2-rs/tree/master/teensy if anyone wants to mess around with the code.

[Aaron]

I sort of wanted to see a design with a 14 bit ADC just for fun, and Claude was able to give me a BOM and design under the $20 plan.  However, I am a bit afraid to order a board designed by AI without testing significantly first.

Also prompted it to create a built in ATU and 100W output, and wanted to add 6M, 2M, and it did in theory do this for around $400 on the BOM.

Definitely interesting, but I don't know enough to certainly say it will work?

The daughter board theory is interesting - e.g. could we add a board to the HL2 to increase the ADC bit level, add more bands, etc. - the possibilities are really endless.

The idea we can take native language ideas and turn them into FGPA engineering is just fascinating.  I think we are on the edge of something but there are definitely some hurdles hanging around, particularly the AI credit limitations

[Jim Basu]

Curious why 14bit or 16bit, compared to 12bit. when atmospheric noise floor is so high.  It would be interesting if AI could share some thoughts on that...

Jim

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[Don [N5SKT]]

I personally purchased a Strix Halo AMD AI system with 128G of unified memory. (DAMN are Apples expensive). Running that, Hermes Agent, Llama.cpp, and Qwen 3.5. It works great and I have not spent a dime on AI so far. Much better to do it all locally. 

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[Clifford Heath]

On 15 Sep 2026, at 10:06 am, Jim Basu <jimb...@gmail.com> wrote:
> Curious why 14bit or 16bit, compared to 12bit. when atmospheric noise floor is so high. It would be interesting if AI could share some thoughts on that…

I don’t know if an AI would explain, but I can tell you why.

The HL2 is digitising the entire HF bandwidth, containing all the atmospheric noise and all the strong signals (after whatever analog filtering has been applied) that may be out-of-band for any receiver slice. So it must reduce gain to avoid clipping on those strong signals, which reduces gain (increasing quantisation noise) on any signals that will appear in-band for any receiver slice. There’s no such thing as a free lunch.

That’s why things like KiwiSDR and the original HPSDRs use 16 bits.

Clifford Heath.

[Dalton Williams]

I have this crazy idea of reducing noise at the RF level by sampling the noise at band edge and immediately on both sides of the current tuned frequency and/or the quiet period of normal SSB transmission and subtracting it from the received signal in real time before it gets being converted to audio and trying to filter it.

I have a EE friend who uses to clean up old vital records with amazing clarity.

Crazy… perhaps but with the addition bits and compute power and AI research ability why not?

Dalton 

W5EIM 

Dalton Williams

DeFever 41 MV Easy Living

20 Years & 34,800 Miles on the water

Amateur Radio W5EIM

Capital Yacht Club Member

MTOA Member 

AGLCA Member

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[Jim Basu]

I have noticed that I have difficulty in pulling out weak signals using the HL2. 

As I gently increase the RF gain, in order to hear the weak signal, I keep getting OVLD errors, so I back off.

I wonder how Anan or Brick2 radios with their 14bit and 16bit ADCs are performing, for weak signal capture, compared to 12bit in the HL2.

Does anyone have a Brick2 or Anan to comment on this?

These other radios seem to have a larger gate size FPGA to handle more IQ samples, but they use the same Thetis/deskhpsdr/quisk etc. to manage data.

(Consequently, more power draw as well, leading to needed thermal management - fans etc). I see some users moving from HL2 into the Anan's and Brick2's

I always wondered, why?

[Franz Schöning]

This is an interesting problem that I have been thinking about as well with my new side project. Its also the 12 vs 16 bit debate.

The RF fetches the entire spectrum that the filter board lets through. If there is a strong signal in that band then the RF receiver can overload and it basically clips the time domain signal. Then due to the sharp edges the freq domain sees this somewhat like a square wave and fills the spectrum with harmonics noise. So either one can:

1. Use a ADC with more bit resolution to get a higher dynamic range, and so weaker signals get more bits
   
2. Filter the stronger signals out of the input band.
3. Try and work around the clipped signal to avoid the generated harmonics. I am aware of a few options - as I understand it anyway:
1. Whenever the signal is clipped just drop it to zero. This avoid the harmonics and introduces a short static like noise burst.
2. Try and recreate the original signal by filling in the missing curve that would have been there.
3. Compress the bandwidth and increase the effective resolution - cant remember what this method is called.

For those following: I have been making progress with the side project which is likely to run into the above problem as well.
Claude has been very good at being able to create at least smaller verilog programs.
Instead of waiting for a JCLPCB to be made, I decided to try somehting else. The interim idea is to now push the entire raw RF down the ethernet to the Tang board. 1Gbps up and 1Gbps down is enough to carry the raw rx and tx RF as well as about 50Mbps auxilliary data.

So Claude has already written:

• The verilog code to transmit a 1Gbps generated signal to my PC to test if the bandwidth is available and if the ethernet introduces interference at this continuous speed (see below image) - it supposedly does not significantly.
  
• Write the PC C code to test the incoming data. Zero dropped packets!
  
• Wrote a small utility to flash the gateware from command line.
• Removed several sections of uneeded features in the gateware - like receiver etc to free up logic and memory.
  
• Then I realised that I had a lot of spare space so Claude is currently writing in a small riscv processor - it is busy with this step as I write this.
• The riscv processor can upload its firmware from the PC side using GDB command over the aux serial channel, as well as over the I2C from a Pico companion board. The firmware will control all aspects of the radio. 

So basically it is quite able to manage the HL2 gateware and modify it and flash it all without any support from me. The riscv block is a predefined library that works with the cyclone IV so I dont expect problems there either. So far the logic I have programmed is probably still quite basic without intricate concurrent data paths. But certainly as a tool to play with HL2 gateware it has proven itself and for me anyway opened up the possibility for all sorts of interesting stuff.

Coming back to the original point, one idea of mine is to push the entire raw rf to the gowin tang fpga and have a full spectrum panadapter there. But then we run into the problem of strong signals. But becuase the tang is so powerful and has so many dsp units, I can try one or more or all of the mitigating solutions.

This graph shows the spectrum with the 1Gbps ethernet running. Generetaed by Clause automatically.

Interesting times :-)

73,

Franz

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[Ed Marciniak]

It is useful to look at the power spectral density of an ADC and the particulars of filtering, digital downconverters and decimation to get a general idea of how an SDR is likely to compare to another.

In particular, the processing pipelines need to have enough bit width to benefit from oversampling.

Some of us use SDR for an IF from a transverter amd we may have thermal noise floors.

With conversion gain to wash out the noise figure of mixers and filters, strong signal handling can become important. I’ve operated 10GHz from hilltops, with 15W transmitters 10m or so away from me, and had RX power of -30dbm while hearing a distant station about 10KHz offset.

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From: herme...@googlegroups.com <herme...@googlegroups.com> on behalf of Jim Basu <jimb...@gmail.com>
Sent: Tuesday, 15 September 2026 06:41:04

To: Hermes-Lite <herme...@googlegroups.com>
Subject: Re: Thoughts on AI

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[Franz Schöning]

So the first experiment is complete and it seems that Claude at least definitely has the capabiltiy to perform these kinds of fpga tasks.

For those interested the gateware and all associated test programs are here: https://github.com/fschoning/Hermes-Lite2/releases/tag/hl2-rawfront-release-v0.1

Results of each program and noise level test are here: https://github.com/fschoning/Hermes-Lite2/blob/hl2-rawfront-release-v0.1/docs/rawfront/RESULTS.md

The project has:

• Created gateware that works on my HL2 radio
• Created a set of utility programs to test and exercise the gateware - see screenshots on the results page.
• Implemented a NEORV32 RISCV core on the HL2 running at 25Mhz and ~16MB to 24MB user program space.
• Written bootloader and firmware for the riscv core.
• GDB debugger and gateware flasher utilties.
• Written a C test program that runs on the RISCV that does a bunch of status and health stuff based on the radio sensors and configuration.
• Tested noise levels while the raw rf is flooding the ethernet - see utiltiy program and screenshot.
  
• There is extensive documentation on all aspects of the project - this is excellent to pass into another AI agent fo anoen who wants to use it as the basis for further work.
• Also there is a CLAUDE.md file to help any other agent get its teeth into this project.

At no point did I ever look at the code or verilog or even manually run any of the programs except to download the respective FPGA tools. Claude did everything else, write and built the gateware, ran the simulations, flashed the radio, developed the utilties, ran tests etc. I did the entire project from the claude code chat screen and watched leds blink on my HL2.

My time commitment was probably around 3 maybe 4 hours of actual time spent including writing these posts. On the whole it was a lot of fun, and I was able to do it on the side of a very busy period in my day job.

So next step will be when the gowin tag fpga board I have on order arrives.

If anyone is interested in specific aspects, just give me a shout.

@Steve - one issue that Claude did bring up was that there is no consistent license on the HL2 github page. Some files in the gateware are marked as GPL 2 and later, but there is no license anywhere for all the other files. I released the gateware under the same GPL license and all the other code as Apache 2.

73's
Franz

[mr.ri...@gmail.com]

I wonder if the HL2 raw ADC data would fit in well with a project called ubersdr: https://ubersdr.org/

I have used it with my RX888Mk2 USB3 SDR device sampling @ 61.44MHz.

Ubersdr uses Phil's ka9q-radio server app here:
    https://github.com/ka9q/ka9q-radio

    the specific rx888mk2 handler is:
    https://github.com/ka9q/ka9q-radio/blob/main/src/rx888.c

underneath to provide to many multiple clients a full spectrum for
listening and skimming.

Maybe claude could come up with a hl2raw_client.c in ka9q-radio tree which could be used by

ubersdr, it would then connect to the HL2?

-Rick / N1GP