Hermes-Lite 2.0 with Filter Board

[Steve Haynal]

Hi Group,

I completed my Hermes-Lite 2.0 beta5 tonight. Here it is in the target enclosure and with Jim's filter board attached. My WSPR signal was heard on the South Pole tonight. It is starting to look and feel like a real radio.

73,

Steve

KF7O

[Steve Haynal]

Hi Group,

I added a wiki page with spectrum plots for the output of the hl2b5 with the N2ADR filter board. I think it looks pretty good. Most bands have more than 5W outputs even after the filters, except for 15M and 12M which are just under 5W. Most bands have worst harmonics that are still -50dBc, except for 12M and 10M which are in the -45dBc range. The 12 and 10M filter may need some tweaking. Also, these measurements are with my DS1054 scope acting as a spectrum analyzer. Ignore some of the known scope artifacts at 125MHz and other standard frequencies. We should repeat and verify these measurements with several other setups.

73,

Steve

KF7O

[John Williams]

Need to start a beta on the filter board... Based on past work, IMHO, Stew N8VET produces excellent filter data...

John

On 2/11/2018 6:39 PM, Steve Haynal wrote:

Hi Group,

I added a wiki page with spectrum plots for the output of the hl2b5 with the N2ADR filter board. I think it looks pretty good. Most bands have more than 5W outputs even after the filters, except for 15M and 12M which are just under 5W. Most bands have worst harmonics that are still -50dBc, except for 12M and 10M which are in the -45dBc range. The 12 and 10M filter may need some tweaking. Also, these measurements are with my DS1054 scope acting as a spectrum analyzer. Ignore some of the known scope artifacts at 125MHz and other standard frequencies. We should repeat and verify these measurements with several other setups.

73,

Steve

KF7O

On Friday, January 26, 2018 at 9:24:56 PM UTC-8, Steve Haynal wrote:

Hi Group,

I completed my Hermes-Lite 2.0 beta5 tonight. Here it is in the target enclosure and with Jim's filter board attached. My WSPR signal was heard on the South Pole tonight. It is starting to look and feel like a real radio.

73,

Steve

KF7O

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[Steve Haynal]

Hi Group,

DK1CG has provided his measurements of the N2ADR filter board. They are posted on this wiki page. Thanks Claudio!

73,

Steve

KF7O

 

On Sunday, February 11, 2018 at 4:39:24 PM UTC-8, Steve Haynal wrote:

Hi Group,

[Heikki Ahola]

Steve,

I have made and connected MCP23008 circuitry to my HL2 beta 5, basically two  i2c lines (SCL and SDA) and 3.3 V for power, readily available in DB13. Address pins all grounded. Not working ! I wonder if the filter selection option was already included in the firmware version I received with my HL2 as shipped from China ?

73 de Heikki (OH2LZI)

[Steve Haynal]

Hi Heikki,

Yes, the filter selection support with the MCP23008 is supported in the firmware installed at Elecrow. You can find links to a schematic of the N2ADR filter board on the community projects wiki page. This is an example of a working setup. Does you use of the MCP23008 match what is seen in that schematic?

73,

Steve

KF7O

[Heikki Ahola]

Hi Steve (et al),

I am using 18-pin DIP package which is basically the same as the 20-pin surface mount package. My plan is to drive NPN-switches by the output signals (GP0 - GP7) of MCP23008. In my opinion, 3.3 -0.7 V = 2.6 V output voltage is sufficient for this purpose. Furthermore, my assumption is that in MCP23008  all GP's  are programmed as outputs and active high. I have not purchased any ULN2003 but that is just an array of darlingtons, right ?

73 de Heikki (OH2LZI) 

[Steve Haynal]

Hi Heikki,

Yes, we are only using the MCP23008 in output mode. The ULN2003 is just an array of darlingtons. Have you measured directly at the output pins of the MCP23008? You should at least see switching there based on software bandselection.

73,

Steve

KF7O

[Heikki Ahola]

Steve, 

No signs of any switching ! I also checked the SDA and SCL lines while changing bands, both sit on 3.3 V. I still suspect that my firmware does not support filter switching. I would like to update with Quartus/USB Blaster, are there any instructions available ?

73 de Heikki (OH2LZI)

[Steve Haynal]

Hi Heikki,

Do you have different band data set for the different bands in the software as described in the Quisk video?

How are you checking for activity? You should see a short burst of activity only when the bands change. I have to use a scope with a trigger set at ~1.5V on the SCL line. Then I can capture the activity.

The bias setting uses the same I2C line. I think that has worked for you. You can adjust the bias even without the TX on and see activity on the I2C bus. Just don't write the new bias settings and power cycle your hl2b5 before transmitting again.

I will post a video on how to update the firmware this weekend. There are some instructions on the Hermes-Lite 1.0 wiki pages.

73,

Steve

KF7O

[Heikki Ahola]

Steve,

I will recheck the i2c activity, just to make sure ! I have a Fluke oscilloscope. My band data is as described in the QUISK video. Bias setting is working OK => i2c traffic in the very line should be also OK.  I have connected the MCP23008 to the pins 1 and 3 in DB13, the same connector is being used for external T/R switching (pin 2 or 4).

73 de Heikki (OH2LZI)

[Steve Haynal]

Hi Heikki,

Just to make sure of the pins you are using, attached is a picture. Did you see any I2C activity when you adjust the bias?

73,

Steve

KF7O

[Heikki Ahola]

Steve, 

Sri but could not find any attachment !

73 Heikki

[Heikki Ahola]

Steve, found it, sri !

Heikki

[Heikki Ahola]

Steve,

Did check the i2c pins ( as displayed in the attachment) with bias adjust => a clear burst in both lines when changing the bias with one increment or more. When repeating this with band change => nil.

I have installed the good old rotary switch and quite happy with that, at least for the time being. I will wait for your video to upload the latest firmware, just to be sure ...

73 de Heikki (OH2LZI)

 

[Heikki Ahola]

Steve,

Tks for the video on uploading the firmware for HL2 ! I did upload the latest version (date 20180106) and the filter board switching started to work right away ! Obviously there was something wrong with the firmware setup and not my circuitry as I assumed first ...  Anyways, now I can abandon my rotary switch and apply more modern technology, hihi. I might try also the N2ADR SWR-bridge , is this already supported by the firmware  ?

73 de Heikki (OH2LZI) 

[Steve Haynal]

Hi Heikki,

FB on the filter switching working now. I still don't understand how your unit had older firmware. I just checked the Raspberry PI image that Elecrow used and it has the 20180106 firmware. Given your experience, others who purchased a HL2B5 may also have to update the firmware for the MCP230008 support to work.

The raw slow ADC values for the N2ADR bridge are being sent to software. Software support just needs to be added.

73,

Steve

KF7O

[Sid Boyce]

quisk says Code version 60.
What release does that signify?
73 ... Sid.

--
Sid Boyce ... Hamradio License G3VBV, Licensed Private Pilot
Emeritus IBM/Amdahl Mainframes and Sun/Fujitsu Servers Tech Support
Senior Staff Specialist, Cricket Coach
Microsoft Windows Free Zone - Linux used for all Computing Tasks

[Steve Haynal]

Hi Sid,

Unfortunately, the version number of 60 just identifies this as a beta5 firmware. I haven't been updating the version number often, but only for major firmware changes. Maybe I should update it more frequently...

73,

Steve

KF7O

[Alan Hopper]

Steve,

it would be neat to have some sort of build number separate to to the version number for error tracking. I don't know if quartus can embed something automatically on build or if a script could patch in a hash of the code. At the moment the version number is effectively being used for two different jobs, feature identification to software and a rough build identifier. Personally I'd like all new features identified individually in the discovery packet and then a unique build identifier.

73 Alan M0NNB

[John Williams]

From my software days, it just feels right that we have a way to identify a 1 to 1 correspondence between bitfiles on github and what is loaded on the device. Either overtly in a major/minor/revision number, or in some sort of VPD (vital product data) that can be queried from SparkSDR or other radio app. I am a bit downlevel on my 1.x hardware and am running an "unknown" level of firmware (that was known at one time). It would be nice to be able to have a definitive indication of what is loaded on the board.

Just my two pence,

John W9JSW

[Steve Haynal]

Hi John and Alan,

I agree with you that we need better version identification. From my day job, I understand versioning. The problem is I am overwhelmed. Recently my day job has been very busy. I spend only 5 to 10 hours a week on this project. Most of that time has been preparing for group buys, answering questions, etc. I'd prefer to just to focus on more interesting technical problems like synchronized RX/TX, more RX receivers, predistortion, clean and extensible RTL etc. I've considered just disappearing for 6 months. to do that... Anyway, I'll need help with these tasks to get everything done and will start another thread with ways others can help.

73,

Steve

KF7O

    

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[in3otd]

Hello,
I've made some measurement on the forward/reflected power detector on the N2ADR filter board; measurements were done with a H-Lv2b3 with the ADC circuitry modified to match the one on the later revisions.
The filter board RF output was connected to a spectrum analyzer to measure the actual RF power output and the H-L output power was changed over a relatively large range by changing the drive level in Quisk; the slow ADC readings were recorded for every power level and for different bands.
The ADC readings were converted to the corresponding input voltages using the formula
ADC_Vinput = (3.25 * (ADC_code/4096.0))
the 3.25 is the scale factor that better matched the actual input voltage.
Then the detector voltages computed using the formula above were used to determine the RF power using the formula
Pdet_W = 1.96 * Vdet * Vdet + 0.179 * Vdet
whose coefficients were chosen to have the best with the actual RF power output level.

The graph below shows a comparison of the power output computed from the detector reading vs the measured output power:


the error in the detector readings is around ±5 % (in linear units) maximum:



As expected, with the output terminated to 50 ohm, the reflected power readings are quite small; here is the SWR computed

the apparently higher readings at low output levels are due to "1 count" noise on the ADC output code.

73 de Claudio, IN3OTD / DK1CG

[Steve Haynal]

Hi Claudio,

Thanks for the measurements. I also made some measurements tonight. First, what Quisk thought was forward power for me was actually reverse due to the way the toroid is wound. Second, I computed ADC_Vinput like you but used the equation Jim sent me to compute true Vrms from this:

RF_rms_volts = 11.165 * AIN_DC_volts + 0.26088 volts.

Then I computed power in the standard way assuming a 50 Ohm load. I also adjusted RV1 so that the power measured in Quisk agreed with what my scope was saying yet SWR into the 50 Ohm dummy load was minimized. I spot checked on various bands and power levels against my scope. In general Quisk and the scope agreed on power to within 5% on the lower frequency bands. For higher frequency bands, I saw disagreement in the 10% to 12% range. You didn't see this roll-off? Quisk was consistently reporting lower power. Maybe it is my inexpensive scope... SWR was 1.1:1 or 1.0:1 on all bands. I didn't test as comprehensively as you, or at the lowest power levels.

73,

Steve

KF7O

[James Ahlstrom]

Hello Group,

Here is an update on the filter board.  Claudio found a logic fault on the rev E1 board, and Steve suggested using a NAND gate to fix it.  The new schematic with this fix is attached.  Claudio and Steve, please review it to make sure it fixes the problem. Then I will make a new PCB and test it.

There are three filter boards with this problem, one for Steve, Claudio and myself.  Claudio suggested this idea.  To fix these three boards, cut the INTTR trace between pin 13 of P12 and P14. Then insert a Schottky diode that can pass 50 ma with a low voltage drop.  A SOD-123 package is a good fit, and a suitable part is Diodes Incorporated B0520LW-7-F, but there are many others.  I am ordering this part, and can send you one if you don't have a suitable diode. This is an easy fix, and the rev E1 boards should then work fine.

The original filter used an HSMS-2825 for D1 and D2.  I just got an end-of-life notice for this part, so I am substituting a BAS40-07,215 on the newest boards. Claudio and my board already use this part, but Steve has the HSMS part.  The change should not matter much, but for consistency Steve should change to the new part because it might affect the calibration.  I can send you two new diodes.

The rev E1 boards have a trimpot RV1.  It must be adjusted for a 1:1 SWR when a 50 ohm load is attached.  I measured RV1 as 22 ohms on all three boards, so I am planning to not mount RV1, and mount a 22 ohm resistor at R1 instead.  This is cheaper, and eliminates a source of error.  I will leave the pads on the board.

I will get my HL2 working and perform further tests when I get a chance.  I haven't unpacked from my ski trip yet!

Jim

N2ADR

[Takashi K]

Hi all,

For Naidu's companion board (that includes Jim's filter circuit), I will fix this issue by changing the firmware with cutting INTTR connection. The reason is,
- Originally, when switching between reception and transmission with two or more receivers, it is necessary to control the LPF to match the transmission band. Since the LPF is controlled, the HPF also can be controlled  at the same time.
- In the case of firmware control, time lag is an issue. But in my experiment, the time lag of filter control was about 0.32 ms. It is enough short time.

73, Taka  ji1udd

[in3otd]

Hello,
I used a different formula to compute the power just because it seemed to fit the measurements a bit better better than the one from Jim. Which is actually a bit strange, because his formula matched well the measurements I did previously on a stand-alone diode detector, except for a scale factor.

I adjusted RV1 to read the minimum reflected voltage with a 50 ohm load; the best trimmer value here has always been between 26 ohm and 29 ohm, so a bit higher than what Jim reported. OTOH, the theoretical value should be about 26 ohm, if I did the math correctly.
The trimmer adjustment seems to be slightly band-dependent and the SWR on the higher band always seems a bit higher and increases with the output level; here is a zoom-in of the SWR computed from the detector readings:

I've tried to see if this can be improved by using some compensation network on the bridge or using a coax cable (grounded on one end only) for the single turn thru the toroid but I didn't find anything which was clearly better.
One thing I forgot to say is that all the data above were taken averaging 16 readings from the slow ADC for every point.
As you can see in the graphs above I saw some frequency dependence in the detectors output, but less than the 10% you saw.

One comment on the power value we show in Quisk: it's correctly called forward power because it's the power that's carried by the forward wave and this is the power that a 50 ohm load will absorb but for a mismatched load the actual power absorbed will be P_forward-P_reflected and this quantity is maybe more interesting for the user.

73 de Claudio, DK1CG

[Naidu B N A M]

Hi all, 

On the HL2 companion board the foot print of 74LVC1G04 and 74LVC1G00 is the same. we can cut the tract at DB7 Pin1 and connect DB7 PIN1(INTTR) to the PIN1 of changed component (74LVC1G00). I think this should fix the problem in hardware way. Takshi already suggested firmware method with out modifying the board in anyway.

73, B N A M Naidu (VU2ZAZ)

[Steve Haynal]

Hi Jim,

Thanks for the update and the schematic change. 

Regarding RV1, I found that there were a range of values that essentially had a 1:1 SWR but that some values improved accuracy of the FWD power measurement. Claudio found 26 to 29 Ohms, with 26 being theoretical best. What are your thoughts on this?

Thanks for the offer of parts, but I am fine with this filter board as is for now. I plan to build up a new filter board (I have multiple HL2s...) once you release the next revision.

Any progress with your Hermes-Lite 2.0?

73,

Steve

KF7O

[Steve Haynal]

Hi Claudio,

Good point about the fwd power being fwd-rev for general use. Is this what most radios report? There is enough room on the Quisk line where we could have fwd,rev,fwd-rev and total PA power displayed. Also, my changes to Quisk haven't been averaging, but I think we should average, maybe 16 samples like you suggest.

I measured the SWR of my attic dipole with the Hermes-Lite 2.0 and I thought the SWR was higher than I remembered. For example, I though 20M was 2:1 but it measured at 2.8:1. I need to borrow a good SWR meter to compare with, but have your measurements of the Hermes-Lite 2.0 found good accuracy into the 2 or 3 to 1 SWR range?

73,

Steve KF7O

On Thursday, March 8, 2018 at 12:35:34 PM UTC-8, in3otd wrote:

Hello,

[Steve Haynal]

Hi B N A M Naidu and Taka,

Thanks for your work on this alternate board and maintaining firmware. I've added VU2ZAZ's github to the community projects wiki page. 

I also added a link to Dani's GNU Radio module.

73,

Steve

KF7O

[James Ahlstrom]

Hello Steve,

I just got my HL2 working and have attached and tested it with my filter board.  See http://james.ahlstrom.name/hl2filter/ for new photos. I had another short circuit between the headphones when I couldn't get full 5 watt output, but it was caused by my current limiting 12 volt supply being set to one amp max.  As I do more tests I will update the web page.

Regarding RV1, it should be set to zero volts reverse with a 50 ohm load.  The SWR readout is not precise enough. My measurements on my and Claudio's board showed a value of 22 or 24 ohms, lower than he measured. The adjustment is quite broad, and I plan to eliminate RV1 and choose a 1% resistor for R1. I don't like leaving adjustments that might go wrong.  All the bridge resistors are 1% and since the transformer turns ratio is fixed, no adjustment should be required.

In Quisk 4.1.14 I added almost-final code for the HL2 power etc. display.  The power reported is forward minus reverse. Since we don't know whether AIN1 or AIN2 is forward, the higher power is always chosen as forward.

Jim

N2ADR

[in3otd]

Hello Steve,
I don't think that Pfwd-Prev is what's usually reported but I didn't check with the radios I've here to see what these do. It makes only a little difference if the antenna is well matched, of course.
I used averaging just to have a better precision for the reflected readings, since those should ideally be zero with a matched load, I'm not sure if averaging is actually needed in practice.
IIRC, the current Quisk code simply updates the slow ADC values every 100 ms, I don't know how many different readings are actually averaged if the averaging is done using every received packet, I guess the slow ADC sampling is not synchronized with the IQ data, I assume that the same slow ADC reading is likely repeated for many packets.

I also wanted to check the accuracy of the reflected readings with mismatched loads but I did not yet find the time to build the different test loads needed. In theory the inductance of the sensing coils and their actual coupling factor influence the reflected voltage reading and a simulation shows things can be slightly improved at the lower end with a 1 nF capacitor in series with the voltage sensing divider, but I'm not sure how much difference it makes in practice. Above 1 MHz the permeability of the 77 material falls quite rapidly, I wonder how this impacts the coils coupling.

You could add a few meters of coax and remeasure the SWR of your dipole; of course the SWR should remain the same (ignoring the small losses increase) but the different phase may change the actual reading if the bridge is not well balanced.

73 de Claudio, IN3OTD / DK1CG

On Monday, March 12, 2018 at 2:18:57 AM UTC+1, Steve Haynal wrote:

Hi Claudio,

[James Ahlstrom]

Hello Group,

After a bit more testing, I have one issue and a non issue.  The non-issue is that my AD9866 does not run hot and does not need a heat sink.  If someone's chip runs hot I suspect either its pad is not soldered down properly, or its IAMP is not disabled.

I have seen a rare intermittent problem with the low power output.  Normally it can be adjusted from 8.4 to 16.1 dBm by adjusting the Tx Level on the Bands config screen.  But sometimes it is stuck at 8.4 dBm and the Tx Level has no effect.  This also results in a max power amp output of 1.2 watts.  Has anyone else seen that?

Jim

N2ADR

[Alan Hopper]

Hi Jim,

I'm not sure if it is the same problem, but I have very occasionally had a situation where the radio is sending data ok but ignores all settings sent to it, including tuning, when you have the tx level issue do other controls work?

73 Alan M0NNB

[James Ahlstrom]

Hello Alan,

I am not sure.  When it happens again I will test that.

Jim

N2ADR

[Dani EA4GPZ]

El 12/03/18 a las 22:05, in3otd escribió:

> IIRC, the current Quisk code simply updates the slow ADC values every
> 100 ms, I don't know how many different readings are actually averaged
> if the averaging is done using every received packet, I guess the slow
> ADC sampling is not synchronized with the IQ data, I assume that the
> same slow ADC reading is likely repeated for many packets.

Hi Claudio,

I would have to check the code to be sure, but I have the impression
that Quisk doesn't average the slow ADC values.

73,

Dani.

[in3otd]

Hello Dani,
what I understand from the Quisk code is that the slow ADC values are currently not averaged, simply extracted from every packet received. Then there is a thread that updates the values shown in the GUI every 100 ms or so with the latest read value, IIRC. I'm not familiar with the HPSDR data protocol and wondered if every slow ADC value sent from the H-L is really the result of a new conversion from the ADC or if the same conversion result can be sent multiple times, while waiting for the slow ADC to produce a new results. In this latter case averaging may not help much.

73 de Claudio, IN3OTD / DK1CG

[Steve Haynal]

Hi Jim,

Your new pictures look great. Having a fixed value for RV1 sounds simpler too, especially if you think there is no advantage to adjusting it. Thanks also for the latest Quisk release.

Regarding the heat from the AD9866, you are in a slightly different boat. First, the firmware you are running has the ADC in low power mode which does reduce heat. Claudio found some RX degradation when doing this, but I have been experimenting with it. You have the latest unposted firmware I was running when I shipped the unit. Most others are running the last posted firmware from early January. Second, your AD9866 was replaced by Elecrow. They may have done a better job at soldering the thermal pad than Elecrow, and I also soldered the thermal pad via the large hole. I was doing comparative heat experiments with your board while it was here. Third, your AD9866 has a recent date code, 1544. I'm not convinced older parts run hotter as I have a HL2 with a 2007 part that runs coolest. It may be that some date code batches just run hot. Fourth, your part was known to be fairly moisture free when it was soldered as it just came out of a package. I have a theory that if the AD9866 is not properly moisture free when soldered to a board, there may be some degradation of the contact between the die and the thermal pad due to heated and expanding moisture.

No one should be running firmware without the IAMP disabled as there has been none released for the HL2.

Although the hot AD9866s are just an annoyance in my opinion, I have taken steps to hopefully reduce heat in future runs:

* Parts ordered directly from factory in moisture sealed packaging. For the current build, the factory sent date code 1544.

* Instructions to Elecrow to bake parts to remove moisture if they ever use unsealed or older AD9866 parts.

* Instructions to Elecrow to make sure the assembly house is properly soldering the thermal pads.

* Removal of the large hole on assembled runs so that there is more thermal pad surface area and a more traditional and expected PCB footprint.

* 2 small changes to the PCB layout to allow for better heat flow away from the AD9866 on the inner ground layers.

I have also noticed that sometimes one of the I2C or SPI busses does not work after power up. I would say this happens maybe 1 out of 50 power on cycles for me. I think there may be something timing critical about the reset sequence for the i2c or SPI busses in the FPGA. I have been varying some things but it is hard to repeat this problem. It will be helpful if you or anyone else can provide more information: How often the bug occurs, under what conditions, does it it affect AD9866 LNA setting too or just the TxDAC output level, do slowadc updates (temperature, PA current, power, SWR) freeze too.

73,

Steve

KF7O

[Steve Haynal]

Hi Claudio, Dani and Jim,

There are 3 rates to consider here.

First, the MAX11613 ADC is running with a 400kHz I2C clock and internal conversion clock. This results in a total conversion rate of roughly 3.5ksps. There are 4 slow adc values being collected, so each value is updated about 900 times a second. The RTL that does this is independent of the samples sent to the PC and runs as fast as possible, so the 4 registers for these values inside the FPGA are really updated at a rate of about 900 times a second.

Second, there is the rate at which these samples are sent back to the PC. A slow adc value is sent back to the PC every 4 frames. A frame consists of about 75 IQ samples. So the update rate depends on the number of receivers and receiver bandwidth setting. At 1 48kHz receiver, a value is updated about 160 times a second. At 3 384kHz receivers, a value is updated about 3840 times a second. When this update rate is faster than the slow adc, duplicate values are sent.

Third, software may only update the display at a slower rate. For example 10 times a second.

It appears we have enough values to average and still update the GUI 10 times a second. The openhpsdr protocol accommodates 16-bit values but we are currently sending only 12-bit values. One options would be to add up 16 12-bit values in the firmware and then send that 16-bit value. We'd still see an effective rate of >50 updates per second.

I measured the AIN1 and AIN2 values from the filter board on my scope during TX. I see quite a bit of signal from the TX. I'm not sure if this is just my scope. There are footprints for a LPF for AIN1 and AIN2 right at the input of the slow adc. Do you think populating these would be helpful?

73,

Steve

KF7O

[James Ahlstrom]

Hi Steve,

On Tuesday, March 13, 2018 at 11:28:21 PM UTC-4, Steve Haynal wrote:

I have also noticed that sometimes one of the I2C or SPI busses does not work after power up. I would say this happens maybe 1 out of 50 power on cycles for me. I think there may be something timing critical about the reset sequence for the i2c or SPI busses in the FPGA. I have been varying some things but it is hard to repeat this problem. It will be helpful if you or anyone else can provide more information: How often the bug occurs, under what conditions, does it it affect AD9866 LNA setting too or just the TxDAC output level, do slowadc updates (temperature, PA current, power, SWR) freeze too.

I just powered up HL2 and it happened again. The max power is 1.1 watts, PA current is 660 ma, and changing the Tx Level on the bands screen from 255 to 0 changes the output by only 1.6 dB, not the expected 7.5 dB.  I am using Spot at 1.000 level. The temp, PA current, PA watts and SWR are all active.  The RfNla is operational as I see the noise floor vary. I power cycled, and now everything works again. I wonder is starting Quisk too soon after power up can cause this. Maybe IO from Quisk is interrupting startup. 

Jim

N2ADR

[James Ahlstrom]

Hello Steve, Claudio, Dani and Group,

I do not see a need to do any averaging of PA forward and reverse power.  At 5 watts and a 50 ohm load, the forward power code from HL2 varies from 1766 to 1779, less than a 1% variance. This was with Spot, so it applies to a CW carrier.  For SSB, the power fluctuates, but that is normal.  For SSB, Quisk displays a sequence of readings depending on the PEP at the time of measurement, and they are all much lower than 5 watts. That just means that SSB rarely has 5 watt peaks, and the average power is low.

Averaging the power during SSB would be meaningless.  The relevant measure is the peak power.  But that is not of interest either because we already know it is 5 watts.  HL2 is digital, and the peak power is set in software.  Is there some advantage to averaging the measurements that I am missing?

Jim

N2ADR

[James Ahlstrom]

Hello Group,

For a 5 watt output, the forward power code from HL2 is 1770 corresponding to a voltage of 1.4 volts.  The MAX11613 ADC reference voltage is Vdd, or 3.3 volts.  So the forward voltage should be higher to more fully use the range of the ADC.  I designed the power circuit assuming that the ADC would use its internal reference voltage of 2.048 volts.

I am not sure why we are using Vdd as a reference, but changing to use the ADC internal reference would require changing the temperature and current circuits.  But if I increase the gain of my op amp, I can increase AIN1 and AIN2 and gain a little over one bit in precision.  But it would require changing the calibration and changing resistors on the three existing E1 filter boards.  I am not sure it is worth it. Does anyone have a strong opinion? If we do change it, it must be now.

Jim

N2ADR

[Heikki Ahola]

Jim et al,

I prefer the current situation as  AIN1/AIN2 = 3.3 V corresponds to 25W+ output power and this enables the SWR bridge to be used also at higher power levels, e.g with linear amplifier. This is exactly  what I am planning to do ! 

73 de Heikki (OH2LZI)

[John Williams]

Which also implies that there needs to be a correction mechanism for these external power sensors. PowerSDR has them implemented every 10 watts up to a max of 100W.

John

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[Steve Haynal]

Hi Jim,

Averaging may just help to smooth out the readings. For example, temperature readings tend to bounce around among 3 to 4 ADC codes. Very little technical value but maybe some aesthetic value.

Regarding the 2.048V versus 3.3V reference, I went with 3.3V to match the full expected range from the INA199A1DCKR current sense amp. External reference voltage it is also the default configuration of the slow ADC when powered on. As it turns out, we still had to scale the voltage from that sense amp to fit within the 0 to 3.3V range. The datasheet for the slow ADC specifies that the internal reference can vary from 1.968V to 2.128V, about +/-4%, which is not that great. The 3.3V regulator we have with 1% precision resistors to set the output and specified 2% DC output voltage tolerance gives us a comparable variation. To test if the internal reference has less noise and more stable readings, I enabled it in the firmware and compared temperature measurements. For both internal and external references, I saw the temperature reading bounce around among 3 or 4 ADC codes. I didn't think one was better than the other. With an external reference, the slow ADC uses slightly less current. One can always measure the external reference voltage and set it in software for more calibrated calculations. Switching to the internal reference would require changing the scaling resistor for current measurements as well as software changes. I would like to stay with the 3.3V reference unless others have strong objections and good reasons.

I am in favor of updating the filter board to make fuller use of all the slow ADC codes. I don't mind changing the resistors on my unit. There are only 3 units out there. For those wanting to measure higher power, you can specify some alternate resistor values on your schematic.

73,

Steve

KF7O

[James Ahlstrom]

Hello Steve,

I think your reasons for the 3.3 volt reference are good ones, and we should not change to use the 2.048 volt reference.

I am uncertain what to do about changing the op amp gain on my filter board.  More opinions please.

In any case, anyone using a different power sensor will need to keep the sensor voltage within the range zero to 3.3 volts.  And each sensor will in general need a different calibration function to display the power reading.  My latest Quisk puts the conversion from the slow ADC reading to watts in its own method.  It is easy to replace this conversion by writing your own hardware file.  If we believe that any power sensor measures voltage, and that the sensor is linear, then power = A * V**2 + B * V + C, and the constants can be entered on a configuration screen.  If someone could describe how PowerSDR does this, it may be useful.

Jim

N2ADR

[John Williams]

Jim,

Here is the facility that PowerSDR uses, along with some raw data from my external sense board. This setup allows my PowerSDR screen to agree with my MFJ Tuner. This allows for some non-linearity on lower power levels but a linear correction would be good enough in my opinion. Ignore the drive power. On the 1.2 boards, there is an extra adc input that is used for power drive into the amp. I have mine reading the drive between the 1.32 frontend and my 5W amplifier board.

John W9JSW

[in3otd]

Hello,
I thought that using the slow ADC internal reference we could improve the accuracy, but Steve pointed out that this is not necessarily the case, and maybe reduce the readings noise but also this seems not to be the case. BTW, Steve, can you share the code modifications to enable the slow ADC internal reference? I looked at that some time ago and was not able to find any initialization code for the slow ADC.

Increasing the opamps gain on the filter board may help in reducing a little the noise contribution of the slow ADC; on one end this is not really needed, as for averaging, on the other end it's a pity to waste the ADC 12th bit, hi. The output DC offset from the opamps on the board I have is about 0.8 mV on one channel and 0.6 mV on the other, IIRC, so even with a little more gain it will remain below 1 ADC LSB.
For 5 W output here I get a raw ADC count of about 1920, not sure if this is due to the fact that I use a modified H-Lv2beta3, even if I have reworked the analog conditioning part to be as in the beta 5; I need to double check that.

A general power detector linearization may require more than a few terms for the Pout(Vdet) equation; the one on the filter board is quite well-behaved but other detectors with plain silicon diodes and low impedance loads can be a lot more non-linear, see e.g. the last picture at http://www.qsl.net/in3otd/electronics/power_detectors/power_detectors.html . I've thought at the possibility of some "autolinearization" by recording the detector readings while changing the output power using the drive level, as this should give quite precise steps; it does not really work in practice since the PA gain depends on the input level so even if the PA input is known precisely its output could easily be a dB or so off. But maybe this could be solved using PureSignal to linearize the PA, then just one single power measurements with an external reference wattmeter would be enough to linearize the detector over its entire dynamic range. Some more stuff for the future...

73 de Claudio, IN3OTD / DK1CG

[in3otd]

Hello Steve,

I measured the AIN1 and AIN2 values from the filter board on my scope during TX. I see quite a bit of signal from the TX. I'm not sure if this is just my scope. There are footprints for a LPF for AIN1 and AIN2 right at the input of the slow adc. Do you think populating these would be helpful?

I think they may help when using an external power detector, since the connections will be longer than when using the filter board power detector and could pick up more noise. If the caps are not too big they should not hurt in any case. If we also move the series resistors on the detectors opamp outputs on the H-L board, this would give some protection in case of overvoltages coming from an external power detector.

[Steve Haynal]

Hi Claudio,

I sent the code to you. Any further testing you do would be appreciated. After I posted, I was thinking that with a Vdd reference the ADC codes very near Vdd may not work as well.

73,

Steve

KF7O

[Dani EA4GPZ]

El 14/03/18 a las 05:46, Steve Haynal escribió:

> It appears we have enough values to average and still update the GUI 10
> times a second. The openhpsdr protocol accommodates 16-bit values but we
> are currently sending only 12-bit values. One options would be to add up
> 16 12-bit values in the firmware and then send that 16-bit value. We'd
> still see an effective rate of >50 updates per second.

Hi Steve,

Thanks for the explanation. I don't think that averaging (or summing)
ADC readings in the FPGA is necessarily a good idea, since one
interesting thing to do is to detect peak-envelope power. This should be
fairly easy to do in the software by getting the maximum reading over
some window (say 1 second or 0.1 seconds), even if the software is not
getting all the ADC readings.

However, averaging in the FPGA defeats this purpose up to some extent
(though averaging 16 samples taken at 900Hz probably wouldn't hurt
much). On the other hand, doing both averaging and peak detection
(storing the maximum over some window) in the FPGA would be ideal (but
it would use up some FPGA resources).

73,

Dani.

[James Ahlstrom]

Hello Claudio,

On Thursday, March 15, 2018 at 4:50:01 PM UTC-4, in3otd wrote:

A general power detector linearization may require more than a few terms for the Pout(Vdet) equation; the one on the filter board is quite well-behaved but other detectors with plain silicon diodes and low impedance loads can be a lot more non-linear, see e.g. the last picture at http://www.qsl.net/in3otd/electronics/power_detectors/power_detectors.html . 

Your graphs demonstrate that my equation for my power detector will not work with the more common single Schottky detectors that most amateurs use.  Different power detectors will need some sort of calibration screen.  So I made these changes to the next version of Quisk.

I added a new item "Power meter calibration" to the Config/radio/Hardware screen. It selects a table of power versus ADC code for each power detector.  The table "HL2FilterE3" is for version E3 of my filter board.  By selecting "New" a calibration screen pops up that enables you to enter your own calibration and save it.  The idea is to attach a power meter to the HL2, vary the output level with "Spot", and record a series of power measurements.  Intermediate values are interpolated using the spline method.  This should work with any power detector and any power level. If other power detectors become popular, I can add their table to Quisk so the user does not have to measure it.

I decided to change the gain of my op amp from 2.0 to 3.8 for version E3.  This changes the code for 5 watts to 3400, which is 83% of the maximum value of 4095, and makes better use of the full ADC range. To change the existing E1 boards to this new gain, change R10 and R13 to 2200 ohms 1%, and change R11 and R14 to 6200 ohms 1%.  Then you can use the builtin HL2FilterE3 calibration table.  I have the E1 table, but I hesitate to include it.

I added averaging for the temperature, forward and reverse power and PA current.  It works by adding up the received values and the count, and dividing and resetting to zero when a value is requested.  Values are requested for display about ten times a second. This feature was needed to make sure a good value for the ADC code was used for calibration. I think it is good enough that changes to the firmware should not be necessary.

I am still waiting for my PC boards so I can test the NAND gate fix.

Jim

N2ADR

[James Ahlstrom]

Hello Group,

On Wednesday, March 7, 2018 at 12:18:49 PM UTC-5, James Ahlstrom wrote:

There are three filter boards with this problem, one for Steve, Claudio and myself.  Claudio suggested this idea.  To fix these three boards, cut the INTTR trace between pin 13 of P12 and P14. Then insert a Schottky diode that can pass 50 ma with a low voltage drop.  A SOD-123 package is a good fit, and a suitable part is Diodes Incorporated B0520LW-7-F, but there are many others.  I am ordering this part, and can send you one if you don't have a suitable diode. This is an easy fix, and the rev E1 boards should then work fine.

I fixed the logic fault in my version E1 filter board using Claudio's Schottky diode idea.  Here is a photo of the diode soldered on the bottom of the board. The end with the bar (cathode) goes to P12.  I am still willing to send a diode to Claudio and Steve if you want one.

Jim

N2ADR 

[in3otd]

Hello,
I've tested the slow ADC noise when using the internal reference, in the same way as done for the previous experiments: the ADC input was connected to a battery (as low-noise DC source), about 10000 readings were collected and the corresponding histogram was calculated.
Here is a reference measurements still done with the Vdd reference:

The 3.3 V supply mas measured to actually be 3.25 V (1 % low) and this value was used to compute the error above.

Same conditions but with the PA at 1 W output, to check whether this caused any additional noise

the result is practically the same as when in RX only.

Now when using the internal reference:

the noise is about 2.5 times lower than with the Vdd reference; this means we need to average about 6 times less samples to obtain the same performance.
The DC error is higher, but here the internal reference is assumed to be exactly 2.048 V, since it cannot be measured. Anyway, it's just 0.22 % low.

I've also tried adding 100 pF in parallel with the ADC input but didn't see any difference, maybe also because of the low impedance of the source.

I'll measure the ADC linearity at the high end with the Vdd reference later.

73 de Claudio, IN3OTD / DK1CG

[in3otd]

Hello,
I've tried to test the slow ADC linearity with the Vdd reference and with the internal reference; I've applied at the input a varying DC voltage from a relatively clean power supply and recorded the code from slow ADC (actually the average of 16 readings) and the voltage level read by a good ol' HP 3478A.

Here is the difference between the multimeter and the slow ADC readings (when using a Vref value that minimizes the overall error, about 3.25 V):

the slow ADC output seems to deviate somewhat in the upper half of the input range.

Here is the same graph when using the internal reference

note the change in the Y scale and the lower noise on the readings. The response seems quite more linear.

73 de Claudio, DK1CG / IN3OTD

[in3otd]

Regarding the SWR readings, I've measured a "complex load at the end of a long cable" over the HF range with both a calibrated VNA and with the SWR bridge on the filter board. To be able to do a wideband measurements, the input of the SWR bridge was disconnected from the last filter and connected directly to the Hermes-Lite PA output. The PA power was set to about 1 W to limit the stress on the devices, as the load was far from a good match on most of the HF.

The SWR computed from the forward and reflected readings from the bridge matched quite well the VNA measurement, at least when the SWR was not too high.
Here below are a couple of graph with the VNA-measured load reflection coefficient from 1 to 31 MHz, to show that it covered most of the Smith chart, and with the SWR from both the VNA and the H-L

there are some small differences towards the higher frequencies which I think may not be so important. I'm trying to model and simulate the SWR bridge circuits to see if and how this can be improved but the real circuit already works quite better than the simulation, hi.

73 de Claudio, DK1CG / IN3OTD

On Monday, March 12, 2018 at 2:18:57 AM UTC+1, Steve Haynal wrote:
[snip]

[Steve Haynal]

Hi Jim,

Thanks for the fix. I can order a B0520LW-7-F when I order all the parts for my next filter board build.

73,

Steve

KF7O

[Steve Haynal]

Hi Claudio,

You have convinced me that the using the internal reference of the slow ADC is better. One question, did your measurements with 3.3V reference include FB22 on the 3.3V power supply to the MAX11613? FB22 is not normally on the HL2b3 that you have, but I think you recommended this and may have added it to your HL2b3.

It is messy to switch to the internal reference as there are already 20+ units in the field expecting a 3.3V reference, and another 25 units on the way. (I have asked Elecrow if there is time to switch a resistor value.) I don't think any changes are required for the temperature input, but  R108 for the PA current input and Jim's op amp values would have to be set for 2.048V reference. I'm not sure what the cleanest way is, but here are some ideas. Groups, please share other ideas.

1. I provide facility in the firmware to turn the slow ADC internal reference on and off by setting/clearing a bit in the existing memory map. Software is in charge of using this or not. Software will need to be told (configuration entry box values) the value or R108 and companion filter board settings for proper computation. Alternatively, the value of R108 can remain as is, and software can enable the internal reference when a user wishes to "zoom" in on more accurate lower voltage readings.

2. The firmware switches to always use a 2.048V reference. The firmware revision number is incremented so that software knows when the change occurred. Either: 

a) values for R108, etc., are entered into the software configuration and can be dynamic

b) we decide on new fixed values for R108, etc., and expect people with existing units to update to these new fixed resistor values. 

Please let me know what you think. We need to decide soon before there are more HL2 units around and Jim's companion filter board is finalized.

73,

Steve

KF7O

[Steve Haynal]

Hi Claudio,

Thanks for checking this. It is good to know that this is working well for more mismatched loads. I need to redo my attic antennas before the weather becomes hot and will use this. I need to add an additional antenna for multiple unit synchronized RX/TX tests.

73,

Steve

KF7O

[James Ahlstrom]

Hello Steve, Claudio and Group,

On Wednesday, March 21, 2018 at 11:34:27 PM UTC-4, Steve Haynal wrote:

It is messy to switch to the internal reference as there are already 20+ units in the field expecting a 3.3V reference, and another 25 units on the way.

 According to Claudio's graph, the maximum error when using the 3.3 volt reference is 2 mv at the 2.5 volt level.  This error is 0.08%. We are not measuring anything at near this level of accuracy, and the error is irrelevant. And the 3.3 volt reference has more immunity from board noise and cable noise from a remote power sensor. So I don't think the complications of multiple reference levels are worth it.

The graphs show there is something to be gained from averaging the ADC readings, especially at low voltages. The latest Quisk 4.1.15 averages the four ADC readings.

Jim

N2ADR

[James Ahlstrom]

Hi Steve,

Don't forget the 2K2 1% resistors for R10 and R13.  And the 6K2 1% for R11 and R14.  With this change to your rev E1 board you can use the built-in calibration table for the final E3 board.

Jim

N2ADR

[James Ahlstrom]

Hello Claudio,

I attached a 100 ohm load and measured an SWR of 1.95, but your test is much more complete.  For my 100 ohm load at an indicated 1 watt, I measured 10.4 Vrms across the load.  This is a power of 1.0816 watts. The power indication in Quisk shows forward power minus reverse power, so it seems this equals the actual power to the load, at least at 100 ohms.  Perhaps you could check a few other values?

Jim

N2ADR

[Alan Hopper]

Jim,

your table/curve fitting approach to calibration sounds very good to me. If you have no objection I'd like to use the same table in my software, this way filter/amp board creators can specify a baseline calibration that can be shared between different software.  Perhaps the Hermes Lite website or Github could have a machine readable list of known front end calibrations so software could automatically update the options.

73 Alan M0NNB

[in3otd]

Hello,
the FB on the slow ADC supply was present, I added that some time ago while doing the first measurements on the ADC.

I don't think we need to switch to the internal reference *now*, it's not about a design flaw that must be corrected but just a small optimization on something which is already working well. IMHO, this can be postponed to the build 7; the SW will need to be able to know to which build is talking to and apply the appropriate scale factors, so of course we would need some way to get the PCB version (and ideally also the related BOM version).

73 de Claudio, DK1CG / IN3OTD

[James Ahlstrom]

Hello Alan,

On Thursday, March 22, 2018 at 1:29:07 PM UTC-4, Alan Hopper wrote:

Jim,

your table/curve fitting approach to calibration sounds very good to me. If you have no objection I'd like to use the same table in my software, this way filter/amp board creators can specify a baseline calibration

You are certainly welcome to the table.  It is in quisk_conf_defaults.py as power_meter_std_calibrations.  I can add more calibrations if that helps.

Jim

N2ADR 

[Steve Haynal]

Hi Claudio,

I would like to keep the slow ADC 3.3V reference as is. It is just too much of a hassle to change this now. Although your data shows the internal reference is better, I agree with Jim that the realized improvements are small. But I would like to make it possible to turn the internal reference on via software. In the future, software can enable this for a bit better accuracy, especially for low voltage measurements from the PA current sensor and FWD/REV power. It takes 10ms for the internal reference to stabilize, so software can actually switch the internal reference on and off to obtain readings with both references.

73,

Steve

KF7O

[James Ahlstrom]

Hello Group,

I got my filter boards from OshPark and tested one. Here is an update.

There was one remaining problem with the boards. The INTTR signal from the HL2 has a large voltage spike from the relay coil when the T/R relay switches off. I thought the NUD3124 switch would suppress this, but it does not.  The INTTR signal is connected to a NAND gate, so the spike is a problem. We need a free-wheeling diode across the T/R relay coil. I patched my test board by adding a 1N914 diode from 3.3 volts to INTTR. This limited the spike to 1 volt. This is acceptable because the NAND gate is 5 volt tolerant. I then added a 1N4148 SOD-123 diode to my filter board. With this change I think the board is ready, so I updated my web page with the new schematic plus all the KiCad design files and gerbers. The version is E4.

Other accessory board designers should recognize that INTTR is not a valid logic signal unless a voltage clamp is added.

Could someone please take a look at the files and check for problems? I am always a bit worried when I create gerbers. OshPark accepts a KiCad board file so no gerbers are required. But 4-layer boards are expensive from OshPark. So the next step is to order some boards from Elecrow. Anyone who wants one should email me at jahlstr at gmail and give me your address. Cost will be the Elecrow cost plus postage, and I can accept PayPal (I think).

I am not sure what to do about assembled boards. The boards are not difficult to assemble so maybe providing bare boards is enough. Or maybe we should see if Elecrow could assemble them.

Jim

N2ADR

[Steve Haynal]

Hi Jim,

Great news. I will review the Gerber files and order some boards this week.

With the next build by Elecrow, I'll ask how much it would be to build some filter boards or provide bare filter board PCBs.

73,

Steve

KF7O

[James Ahlstrom]

Hello Steve,

Please review the gerbers, but you need not order any boards.  I will order some and send you a couple. I need to place an order and send them to others who have requested them.

Jim

N2ADR

[Steve Haynal]

Hi Jim,

I used gerbv to inspect the gerber files and I think they are fine for Elecrow, EasyEDA or Makerfabs. My only concern was the J4 silkscreen outline protruding outside of the edge cuts, but I think an PCB house will just cut at the edge cuts.

73,

Steve

KF7O

[Alan Hopper]

Hi Jim, group

does anyone have a bom for the filter board? I'm very much looking forward to having a complete radio and would like to order the parts in readiness.

73 Alan M0NNB

[James Ahlstrom]

Hello Alan and Group,

The BOM was in the zip design files.  I added a separate link to it on my web page.  The BOM is here.

Jim

N2ADR

[Alan Hopper]

Jim,

thanks, I missed that, sorry for being lazy.

73 Alan M0NNB

[James Ahlstrom]

Hello Group,

I received my version E4 filter boards from Elecrow, and they test good. The current design files and BOM is on my web page.  The cost of 25 boards was USD 94.13 so that is USD 3.77 each.  Shipping from China was 26.82.  I am surprised by this cost, as three boards from OshPark was much more per board.

Shipping is more expensive than the boards, so here are the prices in USD:

One board to USA              6.58

One board international      8.78

Two boards international   13.53

I sent out boards to four people who sent me their address.  If you want a board, please send me your address.  I have seven more people on the list without addresses.  Please PayPal to jah...@gmail.com.

Jim

N2ADR

[James Savage]

Hi James,

I would be very interested in a board shipped to the UK.

Kind regards,

James

[James Ahlstrom]

Hello Group,

Almost all boards are gone.  To get one, please email me but don't send payment until I can be sure I have a board for you.

I will order more boards.  I didn't think there would be so many requests.

Jim

N2ADR

[James Ahlstrom]

Hello Group,

All boards are gone.  But I need addresses for F6EHP, J. Gailer and S. West-Fisher.  If you have sent a payment, assume you are getting a board.  They will all be mailed first class by Monday.

I want to move all this board ordering chatter off this list.  This list should be for issues with the board, filter component values, etc.  I will put an order form on my web page james.ahlstrom.name/hl2filter.

Jim

N2ADR

[Sid Boyce]

Hi Jim,
Is there a supplier that can supply all/most of the parts in the BOM?
73 ... Sid.

On 13/04/18 18:16, James Ahlstrom wrote:
> Hello Group,
>

> All boards are gone.  But I need addresses for F6EHP, J. Gailer and
> S. West-Fisher.  If you have sent a payment, assume you are getting a
> board.  They will all be mailed first class by Monday.
>
> I want to move all this board ordering chatter off this list.  This

> list should be for issues with the board, filter component values,

> etc.  I will put an order form on my web pageÂ
> james.ahlstrom.name/hl2filter <http://james.ahlstrom.name/hl2filter>.
>
> Jim
> N2ADR
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[James Ahlstrom]

Hello Sid,

Yes. Mouser.com.

Jim

N2ADR

[Sid Boyce]

Thanks Jim,
That's great.
73 ... Sid.

[Alan Hopper]

Hi Jim and Group,

my filter pcb arrived yesterday, it looks very good, thanks very much.

I did try to find the bom parts on Farnell and RS as they tend to be cheaper and quicker here in the UK but gave up with the inductors, (someone with more patience might do better) so ordered most parts for Mouser. I got the toroid from Qubits which just turned up having ordered it yesterday afternoon.

73 Alan M0NNB

[James Ahlstrom]

Hello Alan,

There are suggestions for substitute parts on the web page james.ahlstrom.name/hl2filter.

Jim

N2ADR

[Steve Haynal]

Hi All,

Thanks to Jim, I now have 2 of the filter boards. I am noticing that with a filter board connected to the HL2, the RX pickup of the switching regulators is worse. I see the same result across HL2 b2 b3 b5 and b6 units and for both filter boards. Below are screenshots.

We have the option on all HL2 versions to produce the switching frequency from the FPGA, although it has not been enabled or tested yet. The idea was to be able to move any spurs, apply spread spectrum and even use this as a source of dither. This is something I should try out. Even with this option, it would still be good to understand if we can reduce the RX pickup of the switching regulators on the filter board.

Below is a HL2 without the filter board but connected to a dummy load 10 cm away. Without the dummy load connected, it is hard to see any switching regulator spurs.

Below is a HL2 with filter board and dummy load 10 cm away connected. With or without the dummy load doesn't make much difference.

73,

Steve

KF7O

[James Ahlstrom]

Hello Steve,

I can see the switching regulator harmonics as shown on your screen shots if I raise my RF LNA gain to +26 dB. I didn't notice it before. If I switch to the 80 meter graph, I see the noise at 3.75 MHz and -104 dB on the S-meter. If I attach my 60/40 meter dipole, the band noise increases to -90 dB, and the regulator noise is well below the noise floor. Presumably, if I had a real 80 meter antenna, the regulator noise would be even farther below the noise floor.  So on 80 meters, I think we are OK.

On 160 meters, I had to lower the LNA to +14 dB to avoid clipping. The regulator noise is -81 dB and the noise from my 60/40 antenna is -96 dB, so the noise is still visible. Again, a real 160 meter antenna would be better. I don't see noise on any other bands.

So adjusting the regulator switching frequency could have some benefit on 160 meters. All the grounds on the filter board are at the RF connectors. I put another ground at J3 to add a ground at the middle. Unfortunately, adding a jumper here does not reduce the noise. It seems to be pickup from the regulators to the lengthy signal path through all the relays.

Jim

N2ADR

[in3otd]

Hello,
I have the filter board connected to a beta3, via some not-so-short wires so it may behave a little different but I can also clearly see the DC/DC noise. Putting a small SMD choke in series with the 3.3 V supply on pin 18 seems to help quite a bit here. There might be some coupling with the supply traces crossing the RF path on the filter board.

73 de Claudio,  IN3OTD / DK1CG

[Rod Wall]

Hi Steve and James,

1st thanks for all the work everyone is putting into this project, it's great.

My thoughts on the switch mode powder supply problem. Rather than switching the frequency to skip and jump around the harmonics problem. Jumping and hoping may cause other problems that we now can't see.

Would it be better to either:

(1) Make the switch mode powder supply so that it doesn't generate harmonics. This may not be possible?

(2) Use a linear mode power supply that doesn't generate harmonics.

I haven't followed this on how much power is delivered by the power supply. And if a linear mode power supply is possible. As they say, the devil is in the details.

Thanks,

Best regards,

Roderick Wall, vk3yc.

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[Rod Wall]

Hi again,

In my last email I should have also indicated. To kill the electrical noise at the source where it is being generated. Do not generated any electrical noise that may cause problems.

Best regards,

Roderick Wall, vk3yc.

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[Steve Haynal]

Hi Jim,

Agreed this is most likely only a problem on 160M. With an 80M antenna connected, I can't find the noise, even with the high processing gains of WSJT-X. Once I have an antenna connected, there are many more worse diffuse spurs from various cheap switching power lumps in my house and at my neighbor's. These seem to radiate from the electrical wiring. I would experience much more improvement if I could get rid of these.

73,

Steve

KF7O

[Steve Haynal]

Hi Claudio,

What RF choke did you use? My filter board abutts right up to the HL2 and connects with a female header. I cut the power line and saw the spurs on 160M go down by about 8 dB with no power (maybe since the HPF was inline). I tried two types of ferrite beads and a pretty hefty RF choke I had in my spare parts bin, but never saw big improvement. Maybe the proximity of the board plus the amount of metal in the female header just makes things worse. 

73,

Steve

KF7O

[Steve Haynal]

Hi Rod,

No argument here that reducing the harmonics at the source is best. The 3.3V and 1.8V supply designs follow the ST1S10 datasheet and haven't been tweaked or experimented with much. I suspect one could make improvements by varying some of the component values or component brands. Please let me know if you or anyone finds some improvement we can easily adopt.

We are using switching regulators as they are less expensive (important for a budget radio) and dissipate substantially less power. Some of the linear regulators used with the Hermes-Lite 1 ran very hot. Also, the quality of switching regulators has improved recently. There are whitepapers referenced on this list from Analog Device and Texas Instruments describing how to design clean power supplies for ADC-based designs with switching regulators. As said earlier, other common power supplies in my house generate much worse noise even though they are farther away from the radio.

I don't think generating the switching frequency from the FPGA is as complex or cumbersome as some may think. Take the simplest case where there are two modes. The default mode would run the oscillator at 1.14 MHz. All multiples of this miss amateur bands until 28.5 in the 10M band. this 26th harmonic is very weak and doesn't matter. The second mode would use a different frequency such that no spurs land in the same place as the default mode. One would just check a box in the software to use this when needed, maybe to do some shortwave listening, etc. Again, the biggest reason would be to avoid diffuse spurs only in the the <3 MHz range.

73,

Steve

KF7O

[Rod Wall]

Hi Steve,

Ok on why switch mode regulators are used, they do have some advantages. And that once a antenna is connected that household electrical noise is greater.

As the whitepapers from Analog Devices and Texas instruments describes ways to design clean power supplies. Then this maybe possible and the way to go.

To keep it clean for when Hermes Lite is also or only used as a VNA.

Thanks for all the work you are doing for Hermes Lite.

Roderick Wall, vk3yc.

[in3otd]

Hello,
I used one of the MPZ1608S601ATA00 beads used also elsewhere on the board; using a 100 uH inductor gave a little more suppression.
I noticed that here the DC/DC converters spurs amplitude depends on the selected filter; when the lowest bands filters are selected the spurs are stronger and much lower when the highest band filters are selected.

73 de Claudio, IN3OTD / DK1CG

[Steve Haynal]

Hi Claudio,

I also see the spurs diminish when highest band filters are selected. Does proximity make any difference for you? How much does the bead suppress the harmonics versus applying no power to the filter board?

73,

Steve

KF7O

[Steve Haynal]

Hi Rod,

I did follow the whitepapers, but there is always the possibility for improvement or chance I made mistakes.

73,

Steve

KF7O

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[in3otd]

Hello,
my filter board is on the opposite side from the DC/DC converters and I have connected only the RF I/O on pins 1 and 2 with a coax cable and pins 12, 13 and 16 to 20 with some wires about 20 cm long.
I usually see the spur from the 3.3 V converter at a (much) higher level than from the 1.2 V converter. If I move the board around I can null out the spurs (!) and also increase their level significantly, when the board and wires are near or above the DC/DC converters. I have the impression that the wires position is more important that the board position here.

Here is a small table with the measured DC/DC spurs amplitudes in dB, done using the FM mode on Quisk (15 kHz BW) and 10 dB of RF gain:

                      3.3 V spur    1.2 V spur
default                 -86.5        -105.4
pin 18 disconnected    -104.5        -106.1
100 uH on pin 18       -103.5        -105.8

the noise floor was about at -106.5 dB .
I tried a ferrite toroid (FT240-31) on the ethernet cable but it made no difference. Same around the wires to the filter board seemed to help a little.

73 de Claudio, IN3OTD / DK1CG

[Steve Haynal]

Hi Claudio,

Very interesting. I'm planning to make an order of N2ADR boards with a few modifications to try and reduce this noise. Please let me know if you have any specific recommendations.

73,

Steve

KF7O

[Alan Hopper]

Hi Jim and group,

I finally got round to building my filter board and cobbling it onto my HL2 Beta3. I modified the beta3 forward and rev power inputs to match the beta5 and get good power readings. It all works very well and was painless to assemble, so thanks very much Jim.

73 Alan M0NNB

[in3otd]

Hello Steve,
while there may be multiple coupling mechanisms for the DC/DC converters spurs in my setup here since I can null them out by moving the filters board around, the fact that the filters for the lower bands give worse spur levels might suggest there is some coupling with the magnetic field from the DC/DC converters inductors. Those inductors are described as semi-shielded, maybe using a fully shielded version could improve things. Or similarly, another kind of inductor in the filters board, like a standard toroid could also be tried.

73 de Claudio, IN3OTD / DK1CG

On Tuesday, May 22, 2018 at 7:14:33 AM UTC+2, Steve Haynal wrote:

Hi Claudio,

[Steve Haynal]

Hi Claudio,

Thanks for the suggestions. Will add them to the list of things to try.

73,

Steve

KF7O