CPLD FPGA programmable logic

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Paul Cohen

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Apr 22, 2014, 3:53:50 AM4/22/14
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Hi,
Is here someone that can help me start "tasting" the subject and guide me on buying something on ebay (less than $50 board and download cable
Paul

Udi Finkelstein

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Apr 22, 2014, 8:21:08 AM4/22/14
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Summary:
For absolutely cheapest go with Altera EPM240 or EPM570 CPLDs for slightly more. - $20 to $30.
For "Best under $50"  - $47.25 for EP4CE6 with peripherals , SDRAM and built-in USB cable (recommended!).
For "Best vapourware deal under $99" go with parallella. (They are just shipping their boards, 1.5 years late for their kickstart).(http://www.adapteva.com/), if you order now it will still take a few months to ship, as they have to finish the kickstart boards first (a few thousands).

The long version:
Are you aiming for cheapest possible, or "best I can get for $50"?
You have 2 options, Xilinx and Altera. There other vendors (lattice, etc.) but they are niche players.
For each, you need to decide if you want a CPLD board (Altera: EPM240/570, etc. Xilinx - Coolrunner-II or XC9500XL) or an FPGA board (Altera - Cyclone II/IV/V, Xilinx - Startix 3/3E/6).

Some performance ballpark numbers:
Spartan-3E CLB Flip-Flops Block RAM Bits
XC3S100E 1,920 73,728
XC3S250E 4,896 221,184
XC3S500E 9,312 368,640
XC3S1200E 17,344 516,096
XC3S1600E 29,504 663,552
Spartan-6 LX CLB Flip-Flops Block RAM (Kbits)
XC6SLX4 4,800 221,184
XC6SLX9 11,440 589,824
XC6SLX16 18,224 589,824
XC6SLX25 30,064 958,464
XC6SLX45 54,576 2,138,112
XC6SLX75 93,296 3,170,304
XC6SLX100 126,576 4,939,776
XC6SLX150 184,304 4,939,776
Cyclone III Flip Flops Block RAM Bits
EP3C5 5,136 423,936
EP3C10 10,320 423,936
EP3C16 15,408 516,096
EP3C25 24,624 608,256
EP3C40 39,600 1,161,216
EP3C55 55,856 2,396,160
EP3C80 81,264 2,810,880
EP3C120 119,088 3,981,312
Cyclone IV E Flip Flops Block RAM Bits
EP4CE6 6,272 276,480
EP4CE10 10,320 423,936
EP4CE15 15,408 516,096
EP4CE22 22,320 608,256
EP4CE30 28,848 608,256
EP4CE40 39,600 1,161,216
EP4CE55 55,856 2,396,160
EP4CE75 75,408 2,810,880
EP4CE115 114,480 3,981,312

So:
XC3S250E ~= XC6LX4 < EP3C5 < EP4CE6 < XC3S500E < EP3C10 < EP4CE10 < XC6LX9
There are variations due to different architecture, but # of RAM bits and number of flops are first-order approximations for which device is bigger.
(2nd order is simply trying to fit your verilog/vhdl design into each vendor tool and see actual device usage, 3rd order is to optimize your design for the specific FPGA arch and see which fits the best under these optimizations).

As a general rule always prefer newer technology as it has lower power and higher frequency. (e.g. XC6 over XC3 and EP4CE over EP3CE), which is why I marked EP3C10 below EP4CE10. flops and RAM bits are not everything.

Altera CPLD:
The cheapest you can get from eBay is $6.57 for an AlteraUSB cable, and $10 for an EPM240 (240 macrocell) CPLD board (chip + I/O pins).
http://www.ebay.com/itm/USB-Altera-Blaster-Programmer-Cable-For-FPGA-CPLD-JTAG-Development-Board-GE-/111293749591?pt=LH_DefaultDomain_0&hash=item19e99fd957
http://www.ebay.com/itm/1PCS-NEW-EPM240-Altera-MAX-II-CPLD-Development-Board-/271159389579?pt=LH_DefaultDomain_0&hash=item3f225bed8b
Alternatively you can buy this, which includes on-board Altera-compatible programmer and an Arduino adapter:
http://www.ebay.com/itm/UnoProLogic-Altera-CPLD-Development-Board-/121322220882?pt=LH_DefaultDomain_0&hash=item1c3f5e2d52
This looks like a nicely supported board, with a 150-page manual.

These chips are large enough so that you can hook up an external async SRAM chip (simple 32Kx8 with address/data/cs/wr/oe signals) and be able to fit a simple 8-bit CPU inside.

Altera FPGA:
Add a $6-$7 for a USB cable and you're set, well below $50
Many peripherals onboard, SDRAM onboard (for interesting projects). You still need a USB programming cable as the USB onboard is just for serial comm.

Xilinx CPLD:
Cheapest Xilinx boards you will find are $10 for a tiny XC2C64 (CoolRunner-II) boards intended for Console modding, and is totally not cost effective compared with Altera.

Xilinx FPGA:
(Ignore "Vivaldo" in the board description, it is suppoerted only by the older ISE software).

Both boards requires an additional Xilinx platform cable, which makes them a bad deal - A Xilinx platfiorm cable starts at $37:
http://www.ebay.com/itm/Xilinx-Platform-USB-Download-Cable-Jtag-Programmer-for-FPGA-CPLD-C-Mod-XC2C64A-/390809652326?pt=LH_DefaultDomain_0&hash=item5afe120c66
If you are adventerous you can program these without a platform cable if you have a JTAG cable and an appropriate SW. I did it in the past with a Bus Pirate. Slower, but it works. Later I ended up buying a 5-in-1 cable (Altera/Xilinx/Lattice/Salea/AX) for $40-$50.

If you go with a build-in programmer, cheapest one is from seeed (gadgetfactory reseller):
http://www.seeedstudio.com/depot/Papilio-One-250K-p-809.html?cPath=6_10 . For $38 you get an XC3S250E with a built-in USB programmer.

---

When you start crossing the $50 line, you can get some interesting board in the $50-$100 range, that include both a more powerful FPGA as well as on-board external memory and build-in programming cable. check the boards from numato.com, xess.com, gadgetfactory.net, you also have the Altera based DE0 Nano from terasic.com.tw
---
The link below is frequently updated with new/updated boards:
http://www.joelw.id.au/FPGA/CheapFPGADevelopmentBoards



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Yair Reshef

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Apr 22, 2014, 8:32:14 AM4/22/14
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wow

Guy Ovadia

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Apr 22, 2014, 12:14:29 PM4/22/14
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what Yair said. thanks!

Udi Finkelstein

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Apr 22, 2014, 12:24:51 PM4/22/14
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Small correction - the low end  xilinx FPGA series is of course Spartan, not Stratix, which is the high-end Altera series,  out of scope here.

On Apr 22, 2014 3:21 PM, "Udi Finkelstein" <udi.fin...@gmail.com> wrote:

Paul Cohen

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Apr 22, 2014, 12:28:59 PM4/22/14
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I am trying to digest the information.
Thanks,
Paul

Will it be possible to come at TAMI for a visit and see some of you there?


בתאריך יום שלישי, 22 באפריל 2014 15:21:08 UTC+3, מאת Udi Finkelstein:

Udi Finkelstein

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Apr 23, 2014, 1:28:57 AM4/23/14
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I ran a small benchmark, using a 6502 core from the Internet (one of the 6502 cores that is considered the smallest among the ~10 I ran onto).
http://ladybug.xs4all.nl/arlet/fpga/6502/
https://github.com/Arlet/verilog-6502

I used the latest Altera Quartus-II Web edition, and the Xilinx ISE 12.2 Web Edition software (quite ancient).
For each family I chose the smallest FPGA that can fit the 6502 core.

Device

Macrocells

Out of

Pterms

Out of

Registers

Out of

Slices

Out of

CLBs

Out of

4-bit LUTs

Out of

 

Notes

Xc2C512

400

512

1169

1792

188

512

 

 

 

 

 

 


 

Spartan XC3ES100


 

 

 

156

1920

286

960

 

 

517

1920


8 LUTs used as 16x1 RAM

Spartan XC6SLX4


 

 

 

158

4800

 

 

113

600

374

2400


 

Altera EPM570


 

 

 

188

570

 

 

 

 

526

570


Turned out that MAX-II series is more like FPGA

Altera EP3C5


 

 

 

178

5136

 

 

 

 

489

5136


LUTs cannot be used as memory (Xilinx Patent)

Altera EP4CE6


 

 

 

178

6272

 

 

 

 

489

6272


LUTs cannot be used as memory (Xilinx Patent)


You can look at these numbers to get a coarse feeling for the efficiency of these chips.

A few notes:
1. Altera MAX-II series (EPM240/570 that are so common on eBay) are actually more like dumbed down FPGAs with non volatile configuration memory. Instead of using product terms like most CPLDs, they use 4-bit LUT (Look Up Tables), Hence it is not surprising it took about the same number of 4-bit LUT as their FPGA counterparts.
2. It is the number of 4-bit LUTs that actually determines device utilization. Since the number of flops is usually fixed as 1-per 4-bit LUT, then either you have LUTs for combinatorical logic, or that they end up with a flop at the end, so the amount of logic equations you have and the number of inputs they use actually determines the space occupied.
3. Spartan 3E CLBs are groups of four slices, with two 4-bit LUTs each (total of 8 flops/LUTs per CLB).http://www.xilinx.com/support/documentation/data_sheets/ds312.pdf (page 22) . The tool doesn't report the number of CLBs used
4. Spartan 4 CLBs are groups of two slices, with four 4-bit LUTs each (total of 8 flops/LUTs per CLB). http://www.xilinx.com/support/documentation/user_guides/ug384.pdf The tool doesn't report the number of slices used
5. Comparing the Spartan 3E and the Spartan 6, it is clear that the spartan 6 architecture takes about 25% less LUTs to implement the same design, so you can use this factor when comparing spartan 3E vs 6 devices of various sizes.
6. Altera seems to be less efficient than Xilinx when comparing by LUT count.
7. I expected the XC2C512 to fare much better due to its product-term architecture that can handle wide expressions, but it seems I was wrong, at least for that example.

A number of Spartan 6 boards:
LX9 with 64MB SDRAM, $79 https://www.sparkfun.com/products/11838 (comes with a soft-core AVR and an Arduino IDE fork tailored to it).
LX9 with SDRAM and Ethernet, but very little general purpose I/O, $89 http://www.em.avnet.com/en-us/design/drc/Pages/Xilinx-Spartan-6-FPGA-LX9-MicroBoard.aspx
Huge LX25 with SDRAM and micro-SD socket, $119 http://www.xess.com/shop/product/xula2-lx25/

Just remember that interfacing an SDRAM is not trivial - you need a some logic to handle the refresh and that sometimes your logic has to wait for the DRAM due to refresh.
The free Spartan 6 core made by Xilinx only works on the large-pinout chips (FT256 and above) that contains a dedicated hardwired SDRAM controller. The Xula2 and Avnet boards above use those chips.
The papilio pro uses free open cores that do this instead, at the cost of some of your LUTs.

My original recommendation still stands - the Cyclone 4 board below is within the $50 budget, comes with on-board RAM and has interesting I/O.
The boards above are for those that need a bigger FPGA.

Udi

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