Altair 5x Manual Pdf

[Elisa Rathrock]

Hostingof these manuals is possible because of the hard work of people like Rich Cini, John Monahan, Dave Dunfield, Tom Sanderson and others. Their efforts in originally collecting and hosting this information has beeninvaluable. Thanks also to Theo Karagiris who created searchable versions of each of these document scans.

The ALTAIR 8800 has 78 basic machine language instructions. Sincemany of the instructions can be modified to affect different registersor register pairs, more than 200 variances of the basic instructionsare possible.

A detailed description of the ALTAIR 8800 instruction set isprovided in the remainder of this operating manual. For the purposeof this description, the 78 basic machine language instructions havebeen grouped into seven major subdivisions:

Each instruction is presented as a standardized mnemonic or machinelanguage code. Instructions may occupy from one to three sequential(serial) bytes, and the appropriate bit patterns are included. Acondensed summary of the complete instruction set showing themnemonics and instructions in both binary and octal is included asan Appendix.

The ALTAIR 8800 has nine special purpose command instructions whichare used to service the remaining instructions. These special purposeinstructions occupy four catagories: Input/Output Instructions(IN, OUT), Interrupt Instructions (EI, DI, HLT,RST), Carry Bit Instructions (STC, CMC), and the NoOperation Instruction (NOP).

Example: Assume an input device contains the following data byte:00 001 000. Implementation of the IN instruction (includingdevice number) will cause the data byte to replace the contentsof the Accumulator.

Example: Assume the Accumulator contains the following data byte:00 001 000. Implementation of the OUT instruction (plus devicenumber) will cause the data byte to be sent to the specifiedexternal device.

Operation: Implementation of the HLT instruction stepsthe Program Counter to the next instruction address and stops thecomputer until an interrupt occurs. The HLT instructionshould not normally be implemented when a DI instruction hasbeen executed. Since the DI instruction causes the computerto ignore interrupts, the computer will not operate again untilthe main power switch is turned off and then back on.

Operation: The data byte in the Program Counter is pushedonto the stack. This provides an address for subsequent use bya RETURN instruction. Program execution then continues atmemory address: 00 000 000 00 (exp) 000 where exp rangesfrom 000 to 111.

The RST instruction is normally used to service interrupts.The external device may cause a RST instruction to be executedduring an interrupt. Implementation of RST then calls a specialpurpose subroutine which is stored in up to eight 8-bit bytes in thelower 64 words of memory. A RETURN instruction is included toreturn the computer to the original program.

Example: Assume the following RST instruction is present:11 001 111. Implementation of the instruction will cause theProgram Counter data byte to be pushed onto the stack. The programwill then continue execution at the subroutine located at memoryaddress: 00 000 000 00 001 000. Upon completion of thesubroutine, a RETURN instruction will return the computer to thenext step in the main program.

The ALTAIR 8800 has four single register instructions. Eachinstruction occupies a single byte. Two of the instructions, INRand DCR, have eight variances each. The variances are specifiedaccording to any desired register, and the following register bitpatterns apply:

If Memory Reference M (110) is specified in the instruction byte,the memory byte addressed by the contents of the H and Lregisters is processed. The H register contains the mostsignificant 8 bits of the memory address and the L registercontains the least significant 8 bits of the address.

Example: Assume the following instruction is present: 00 000100. According to the table of register bit patterns given above, thebyte in register B is to be incremented by 1. If the initial byteis 00 000 000, the incremented byte will be 00 000 001.

Example: Assume the following instruction is present: 00 001101. According to the table of register bit patterns given above, thebyte in register C is to be decremented by 1. If the initial byteis 00 000 001, the decremented byte will be 00 000 000.

If the least significant 4 bits in the accumulator byte (bits0-3) represent a BCD digit greater than 9 or if the AuxiliaryCarry Bit is set to 1, the four bits are automaticallyincremented by 6. If not, the accumulator is unaffected.

If the most significant 4 bits in the accumulator byte (bits 4-7)represent a BCD digit greater than 9 or if the Carry Bit is set to1 after the previous operation, the four bits are automaticallyincremented by 6. If not, the accumulator is unaffected.

Example: Assume the accumulator byte is 10 100 100. The DAAinstruction will automatically consider the byte as two 4-bit bytes:1010 0100. Since the value of the least significant 4 bits is lessthan 9, the accumulator is initially unaffected. The value of themost significant 4 bits is greater than 9, however, so the 4 bits areincremented by 6 to give 1 0000. The most significant bit sets theCarry Bit to 1, and the accumulator now contains: 00 000 100.

Each instruction occupies a single byte. Five of the instructions,PUSH, POP, DAD, INX, and DCX, have four varianceseach. The variances are specified according to any desired registerpair, and the following register pair bit patterns apply:

Operation: The contents of the specified register pair(rp) are stored in two bytes of memory at an addressindicated by the Stack Pointer. The contents of the firstregister are PUSHed into the address one less than theaddress in the Stack Pointer. The contents of the second registerare PUSHed into the address two less than the address inthe Stack Pointer.

Example: Assume PUSH BC is implemented. The instruction bytewill have the following format: 11 000 101. The contents ofregister pair BC will be stored in memory thusly: B will bestored at the address in the Stack Pointer less one; C will bestored at the address in the Stack Pointer less two. The StackPointer will then be decremented by two.

Operation: The contents of the specified register pair (rp)are retrieved from the two bytes of memory at an address indicatedby the Stack Pointer. The contents of the memory byte at the StackPointer address are loaded into the second register of the pair, andthe contents of the byte at the Stack Pointer address plus one areloaded into the first register of the pair.

If the Status Bit Register and Accumulator (register pair PSW) pairis specified, the contents of the byte at the Stack Pointer addressplus one are used to set or reset the status bits according to theformat provided in the description of the PUSH instruction.

Operation: The 16-bit number formed by the two bytes in thespecified register pair (rp) is added to the 16-bit numberformed by the two bytes in the H and L registers. Theresult is stored in the H and L register pair.

Example: Assume the H register byte is 10 001 111 and theL register byte is 10 000 011. Assume the D and Eregister bytes are both 00 000 000. Implementation of the XCHGinstruction will exchange the contents of the two register pairs sothat the H and L register bytes are both 00 000 000 and theD and E register bytes are, respectively, 10 001 111 and 1010 000 011.

Operation: The byte stored in the L register is exchangedwith the memory byte addressed by the Stack Pointer. The byte storedin the H register is exchanged with the memory byte at theaddress one greater than that addressed by the Stack Pointer.

Operation: The accumulator byte is rotated one bit positionto the left. The 7 bit position now occupies the 0 bit positionand the Carry Bit is set with the value of the 7 bit beforerotation.

Operation: The accumulator byte is rotated one bit positionto the right. The 0 bit position now occupies the 7 bit positionand the Carry Bit is set with the value of the 0 bit beforerotation.

Operation: The accumulator byte is rotated one bit positionto the left through the Carry Bit. The 7 bit position thenoccupies the Carry Bit and the Carry Bit occupies the 0 bitposition.

Example: Assume the accumulator byte is 10 001 000, the CarryBit is 1, and the RAL instruction is present. The contents of theaccumulator are rotated one bit left through the Carry Bit. The 7bit now occupies the Carry Bit (1) and the Carry Bit now occupiesthe 0 bit: 00 010 001.

Operation: The accumulator byte is rotated one bit positionto the right through the Carry Bit. The 0 bit position nowoccupies the Carry Bit and the Carry Bit occupies the 7 bitposition.

Example: Assume the accumulator byte is 10 001 000, the CarryBit is 1, and the RAR instruction is present. The contents of theaccumulator are rotated one bit position right through the CarryBit. The 0 bit now occupies the Carry Bit, and the Carry Bit nowoccupies the 7 bit: 11 000 100.

Data can be conveniently transferred between registers or between thememory and registers of the ALTAIR 8800. Certain of these operationsare direct data transfers and no other operation is involved. Forexample, the MOV instruction causes a byte of data to betransferred from one register (the source register) to anotherregister (the destination register). Other data transfers areaccompanied by an arithmetic or logical operation. For example, theADD instruction adds the contents of a specified register to thecontents of the accumulator.

Still another class of data transfer instructions concerns only theaccumulator and the H and L register pair. For example, theSTA instruction causes the contents of the accumulator to replacethe byte of data stored at a specified memory address.

3a8082e126